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Stuck-at fault

About: Stuck-at fault is a research topic. Over the lifetime, 9707 publications have been published within this topic receiving 160254 citations.


Papers
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Proceedings ArticleDOI
01 Jan 1995
TL;DR: A hybrid sequential circuit test generator is described which combines deterministic algorithms for fault excitation and propagation with genetic algorithms for state justification to allow for identification of untestable faults and to improve the fault coverage.
Abstract: A hybrid sequential circuit test generator is described which combines deterministic algorithms for fault excitation and propagation with genetic algorithms for state justification. Deterministic procedures for state justification are used if the genetic approach is unsuccessful, to allow for identification of untestable faults and to improve the fault coverage. High fault coverages were obtained for the ISCAS89 benchmark circuits and several additional circuits, and in many cases the results are better than those for purely deterministic approaches.

56 citations

Journal ArticleDOI
TL;DR: In this article, the authors study the testability of analog circuits in the frequency domain by introducing the analog fault observability concept, which combines a structural testing methodology with functionality verification to increase the test effectiveness and consequently the design manufacturability and reliability.
Abstract: We study the testability of analog circuits in the frequency domain by introducing the analog fault observability concept. The proposed algorithm indicates the set of adequate test frequencies and test nodes to increase fault observability. This approach combines a structural testing methodology with functionality verification to increase the test effectiveness and consequently the design manufacturability and reliability. We analyze the case of single fault, double, and multiple faults. Concepts such as fault masking, fault dominance, fault equivalence, and non observable fault in analog circuits are defined and then used to evaluate testability. The theoretical aspect is based on the sensitivity approach.

55 citations

Journal ArticleDOI
TL;DR: A simple yet accurate stationary reference frame q-d-0 model of SIT-faulted induction machine, including the fault location parameter, is developed and the steady-state analysis indicates that the inclination of the current vector locus and the phase angle of the negative-sequence current phasor are the strong indicators of the SIT fault location.
Abstract: Locating the stator interturn (SIT) fault on the motor winding structure adds an important feature in the fault diagnosis. This motivates to study the effects of SIT fault location on the induction machine. In this paper, a simple yet accurate stationary reference frame q-d-0 model of SIT-faulted induction machine, including the fault location parameter, is developed. The fundamental components of winding functions (WFs) are used to calculate the machine inductances for the proposed model. These inductances in stationary reference frame q-d-0 variables are rotor-position-independent expressions and functions of fault severity and fault location. The proposed model is as accurate as the multiple-coupled-circuit model for fault location study. It does not require the recalculation of machine inductances in each integration step to solve the model. The experimental validation of the model is presented. The steady-state analysis based on the proposed model indicates that the inclination of the current vector locus and the phase angle of the negative-sequence current phasor are the strong indicators of the SIT fault location.

55 citations

Journal ArticleDOI
TL;DR: In this article, a fault detection, isolation and fault tolerant control for an spark ignition engine is investigated for an IC engine, where the integrated design of control and diagnostics is achieved by combining the integral sliding mode control methodology and observers with hypothesis testing.
Abstract: Fault detection, isolation and fault tolerant control are investigated for an spark ignition engine. Fault tolerant control refers to a strategy in which the desired stability and robustness of the control system are guaranteed in the presence of faults. In an attempt to realize fault tolerant control, a methodology for integrated design of control and fault diagnostics is proposed. Specifically, the integrated design of control and diagnostics is achieved by combining the integral sliding mode control methodology and observers with hypothesis testing. Information obtained from integral sliding mode control and from observers with hypothesis testing is utilized so that a fault can be detected, isolated and compensated. As an application example, the air and fuel dynamics of an IC engine are considered. A mean value engine model is developed and implemented in Simulink®. The air and fuel dynamics of the engine are identified using experimental data. The proposed algorithm for integration of control and diagnostics is then validated using the identified engine model. Copyright © 2001 John Wiley & Sons, Ltd.

55 citations

Patent
27 Oct 2004
TL;DR: In this paper, a method, apparatus, and computer program product diagnosing and resolving faults is disclosed, and a disclosed fault management architecture includes a fault manager suitable having diagnostic engines and fault correction agents.
Abstract: A method, apparatus, and computer program product diagnosing and resolving faults is disclosed. A disclosed fault management architecture includes a fault manager suitable having diagnostic engines and fault correction agents. The diagnostic engines receive error information and identify associated fault possibilities. The fault possibility information is passed to fault correction agents, which diagnose and resolve the associated faults. The architecture uses logs to track the status of error information, the status of fault management exercises, and the fault status of system resources. Additionally, a soft error rate discriminator can be employed to track and resolve soft (correctible) errors in the system. The architecture is extensible allowing additional diagnostic engines and agents to be plugged in to the architecture without interrupting the normal operational flow of the computer system.

55 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202336
202298
20219
20206
20199
201846