Stuck-at fault

About: Stuck-at fault is a research topic. Over the lifetime, 9707 publications have been published within this topic receiving 160254 citations.

An artificial neural network based digital differential protection scheme for synchronous generator stator winding protection

Abstract: This paper describes a new artificial neural network (ANN) based digital differential protection scheme for generator stator winding protection. The scheme includes two feedforward neural networks (FNNs). One ANN is used for fault detection and the other is used for internal fault classification. This design uses current samples from the line-side and the neutral-end in addition to samples from the field current. Fundamental and/or second harmonic present in the field current during a fault help the ANN, used for fault detection, to differentiate between generator states (normal, external fault and internal fault states). Results showing the performance of the protection scheme are presented and indicate that it is fast and reliable.

Online Detection of Induction Motor's Stator Winding Short-Circuit Faults

Abstract: The main objective of this paper is to develop a new technique for detecting turn-to-turn short-circuit faults in one or two stator phases of an induction motor. Hence, modeling a turn-to-turn short-circuit fault in more than one phase and a phase-to-ground fault is the first novelty of this paper for calculating phase currents under faulty conditions. This strategy uses the extracted features from the corresponding three-phase current pattern in 3-D space. Identification of faulty phases and of the severity of the fault is the outcome of this technique. This technique is also capable of detecting a phase-to-ground fault. This method just requires current sensors that are available in most drive systems to provide good controllability, and details of the machine design are not necessary. Experimental results are included to show the ability of the proposed strategy for detecting and locating phase/phases under different faults and load conditions.

Delay-fault testing and defects in deep sub-micron ICs-does critical resistance really mean anything?

Abstract: This paper reflects on some recent results that show the value of delay-fault tests on a deep sub-micron process. However, the results also suggest that untargetted test patterns perform almost as well as those targetted on a transition fault model, despite appearing to have a much lower fault coverage. This leads to an examination of the defect mechanisms in deep sub-micron ICs, in particular the relationship of crosstalk and power-rail coupling to resistive opens and resistive bridges. A number of new fault mechanisms are described. The paper shows the importance of initialization conditions for resistive opens and the importance of noise margins with resistive bridges. These noise margin considerations throw doubts on the idea used by other authors of the "critical resistance" of a bridge.

Optimal stochastic fault detection filter

Abstract: Properties of the optimal stochastic fault detection filter for fault detection and identification are determined. The objective of the filter is to monitor certain faults called target faults and block other faults which are called nuisance faults. This filter is derived by keeping the ratio of the transmission from nuisance fault to the transmission from target fault small. It is shown that this filter approximates the properties of the classical fault detection filter such that in the limit where the ratio of the transmissions is zero, the optimal stochastic fault detection filter is equivalent to the unknown input observer if all invariant zero directions are included with the nuisance fault directions. Detection filter designs can be obtained for both linear time-invariant and time-varying systems.

Fault-Tolerant Five-Leg Converter Topology With FPGA-Based Reconfigurable Control

Abstract: Fast fault detection and reconfiguration of power converters is necessary in electrical drives to prevent further damage and to make the continuity of service possible. On the other hand, component minimized converters may provide the benefits of higher reliability and less volume and cost. In this paper, a new fault-tolerant converter topology is studied. This converter has five legs before the fault occurrence, and after fault detection the converter continues to function with four legs. A very fast fault detection and reconfiguration scheme is presented and studied. Simulations and experimental tests are performed to evaluate the structure requirements, the digital reconfigurable controller, and fault detection scheme. For experimental tests, the control and the fault detection and reconfiguration schemes are implemented on a single field-programmable gate array (FPGA) chip. Experimental and simulation results show the effectiveness of the proposed fault-tolerant topology and its FPGA-based control.