Stuck-at fault

About: Stuck-at fault is a research topic. Over the lifetime, 9707 publications have been published within this topic receiving 160254 citations.

Self-timed is self-checking

Abstract: Self-checking circuits detect (at least some of) their own faults. We describe self-timed circuits, including combinational logic and sequential machines, which either halt or generate illegal output if they include any single stuck-at faults. The self-timed circuits employ dual rail data encoding to implement ternary logic of 0, 1, andundefined states; the fourth state is used to signal illegal output and is shown to result only from certain circuit faults. The self-timed circuits also employ four-phase signaling according to a well-defined protocol of communications between the circuit and its environment; failures due to certain faults prevent the circuit from communicating properly, thus causing the circuit to halt. We show that any single stuck-at fault falls in either the first or the second category, thus providing complete fault coverage through self checking. No hardware needs to be added to our circuits to achieve the complete self-checking property; further, the circuit is guaranteed to never generate a legal but erroneous output if it contains a fault. Minimal hardware is needed to detect that a circuit has either halted or has generated an illegal output.

A Test Generation Framework for Quantum Cellular Automata Circuits

Abstract: In this paper, we present a test generation framework for quantum cellular automata (QCA) circuits. QCA is a nanotechnology that has attracted recent significant attention and shows promise as a viable future technology. This work is motivated by the fact that the stuck-at fault test set of a circuit is not guaranteed to detect all defects that can occur in its QCA implementation. We show how to generate additional test vectors to supplement the stuck-at fault test set to guarantee that all simulated defects in the QCA gates get detected. Since nanotechnologies will be dominated by interconnects, we also target bridging faults on QCA interconnects. The efficacy of our framework is established through its application to QCA implementations of MCNC and ISCAS'85 benchmarks that use majority gates as primitives

Using a neural/fuzzy system to extract heuristic knowledge of incipient faults in induction motors: Part II-Application

Abstract: The use of electric motors in industry is extensive. These motors are exposed to a wide variety of environments and conditions which age the motor and make it subject to incipient faults. These incipient faults, if left undetected, contribute to the degradation and eventual failure of the motors. This paper uses a hybrid neural/fuzzy fault detector to solve the motor fault detection problem. As an illustration, the neural/fuzzy fault detector is used to monitor the condition of a motor bearing and stator winding insulation. The initialization and training of this fault detector is in accordance with the procedures outlined in Part I of this paper. Once the neural/fuzzy fault detector is trained, the detector not only can provide accurate fault detector performance, but can also provide the heuristic reasoning behind the fault detection process and the actual motor fault conditions. With better understanding of the heuristics through the use of fuzzy rules and fuzzy membership functions, a better understanding of the fault detection process of the system is available, thus better motor protection systems can be designed. >

Signal Model-Based Fault Coding for Diagnostics and Prognostics of Analog Electronic Circuits

Abstract: Analog circuits have been extensively used in industrial systems, and their failure may make the systems work abnormally and even cause accidents. In order to monitor their status, detect faults, and predict their failure early, this study proposes a signal model-based fault coding to monitor the circuit response after being stimulated to perform a fault diagnosis without training a large amount of sample data and fault classifiers. Manifold features extracted from circuit responses are associated with a fault-indicating curve in the feature space, in which a group of fault bases are uniformly and continuously distributed along with gradual deviation from the nominal value of one critical component. These bases can be deployed in a factory setting but used during field operation. Fault coding is converted to a novel optimization problem, and the optimized solution forms a fault code representing fault class, suitable for realizing fault detection, and isolation for different components. A fault indicator based on comparison between fault codes can describe performance degradation trends. To improve the prediction accuracy, historical degradation data are collected and considered as a priori exemplars, and a novel exemplar-based conditional particle filter is proposed to track a degradation process for the prediction of remaining useful performance. Case studies on two analog filter circuits demonstrate that the proposed method achieves relatively high fault diagnosis and prognosis accuracy. The main advantages of our study are two-fold: first, the high diagnostic accuracy can still be obtained even if there is no large amount of training data; second, the prognostic effect remains relatively stable whenever triggering prognosis module.

Fault diagnosis apparatus

Abstract: A fault diagnosis section activates a driving component alone, measures an operation state signal and a paper passage time, and stores feature values (Vm, σv, Tqs, σts) extracted as a determination reference in a storage medium. A paper passage fault determination section determines whether or not a fault has arisen on the basis of the paper passage time when an apparatus is under normal operating conditions. A diagnosis target block determination section determines an order to operate a detail fault diagnosis when it is determined that there is a plurality of diagnosis target blocks. When the driving component is activated alone under actual operation conditions, the operation state signal Vf is obtained, and an operation state fault determination section conducts diagnosis on whether or not a fault has arisen on the driving component and a state of the fault, and whether or not a fault has arisen on other power transmission components and a nature of the fault with reference to the feature values as the determination reference on the basis of a degree of deviation from a normal range.