Topic
Stuck-at fault
About: Stuck-at fault is a research topic. Over the lifetime, 9707 publications have been published within this topic receiving 160254 citations.
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TL;DR: Designs of fault-detecting test sets to detect all multiple faults in these networks are presented and are independent of the function realized and hence can be generated easily.
Abstract: The fault-detection problem in AND-EXOR arrays is formulated in a new framework. The arrays considered are more general compared to those by the previous researchers. Designs of fault-detecting test sets to detect all multiple faults in these networks are presented. The designs are independent of the function realized and hence can be generated easily.
49 citations
08 Jul 1992
TL;DR: A formalism is introduced that represents the fault tolerance algorithms and mechanisms by means of a set of assertions that provides a framework for the generation of a functional deterministic test for programs implementing complex fault tolerance protocols and mechanisms.
Abstract: The authors address the issue of the use of fault injection for explicitly removing design/implementation faults in fault tolerance algorithms and mechanisms. A formalism is introduced that represents the fault tolerance algorithms and mechanisms by means of a set of assertions. This formalism enables the execution tree to be presented, where each path from the root to a leaf of the tree is a well-defined formula. It provides a framework for the generation of a functional deterministic test for programs implementing complex fault tolerance algorithms and mechanisms. This methodology has been used to extend a debugging tool aimed at testing fault tolerance protocols developed by BULL France. It has been successfully applied to the injection of faults in the inter-replica protocol supporting the application-level fault tolerance features of the architecture of the ESPRIT-funded Delta-4 project. The results of these experiments are discussed and analyzed. >
49 citations
TL;DR: A new algorithm named adaptive fault diagnosis algorithm for CAN (AFDCAN) is designed for low-cost resource-constrained distributed embedded systems and proves that the algorithm uses a definite and bounded number of testing rounds and messages to complete one diagnostic cycle.
Abstract: A controller area network (CAN)-based distributed system may develop faults at run-time. These faults need to be detected and diagnosed. This paper proposes a new algorithm named adaptive fault diagnosis algorithm for CAN (AFDCAN). It is designed for low-cost resource-constrained distributed embedded systems. The proposed algorithm detects all faulty nodes on the CAN. It allows new node entry and reentry of repaired faulty nodes during a diagnostic cycle. AFDCAN is found to provide high fault tolerance and to ensure reliable communication. It uses single-channel communication deploying the bus-based standard CAN protocol. A hardware implementation of the proposed algorithm has been used to obtain the results. The results show that the proposed algorithm diagnoses all faults in the system. Analysis of the proposed algorithm proves that the algorithm uses a definite and bounded number of testing rounds and messages to complete one diagnostic cycle.
49 citations
06 Nov 1994
TL;DR: In this paper, a generic MOS circuit primitive and analytical solutions of node differential equations are used to perform transistor level simulation with accurate MOS-FET models, and the transient fault is modeled by a piecewise quadratic injected current waveform.
Abstract: Transient fault simulation is an important verification activity for circuits used in critical applications since such faults account for over 80% of all system failures. This paper presents a timing level transient fault simulator that bridges the gap between electrical and gate-level transient fault simulators. A generic MOS circuit primitive and analytical solutions of node differential equations are used to perform transistor level simulation with accurate MOS-FET models. The transient fault is modeled by a piecewise quadratic injected current waveform; this retains the electrical nature of the transient fault and provides SPICE-like accuracy. Detailed comparisons with SPICE3 show the accuracy of this technique and speedups of two orders of magnitude are observed for circuits containing up to 2000 transistors. Latched error distributions of the benchmark circuits are also provided.
49 citations
17 Jun 2001
TL;DR: In this paper, the authors propose a fault-tolerant induction motor drive system, where the fault mode is the case in which a misfiring does occur in one of the power switches and the fault tolerance is obtained by reconfiguration of the inverter topology.
Abstract: This paper proposes the possibility of developing fault diagnosis and remedial operating strategies, which enable a fault tolerant induction motor drive system. The fault mode investigated is the case in which a misfiring does occur in one of the power switches. The fault diagnosis is achieved by using a strategy that permits both identification and isolation of the faulty components. The fault tolerance is obtained by reconfiguration of the inverter topology. This allows for continuous free operation of the drive even with complete loss of one of the legs of the inverter. Experimental results demonstrate the validity of the system proposed.
49 citations