Topic
Stuck-at fault
About: Stuck-at fault is a research topic. Over the lifetime, 9707 publications have been published within this topic receiving 160254 citations.
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07 Jul 2003
TL;DR: A novel mathematical model is presented to accurately estimate the possible propagation of transient fault-due glitches through a CMOS combinational circuit, which is suitable to be used into a new simulation tool able to provide good accuracy, while significantly speeding up simulations, with respect to HPSICE.
Abstract: Transient faults (TFs) are increasingly affecting micro-electronic devices as their size decreases. During the design phase, the robustness of circuits for high reliability applications with respect to this kind of faults is generally validated through simulations. However, traditional HSPICE like simulators are too slow for the task of simulating the effects of TFs on large circuits. In this paper, we present a novel mathematical model to accurately estimate the possible propagation of transient fault-due glitches through a CMOS combinational circuit, which is suitable to be used into a new simulation tool able to provide good accuracy, while significantly speeding up simulations, with respect to HPSICE. In particular, our model allows approximately 90% accuracy with respect to HSPICE simulations.
129 citations
TL;DR: The concept of sensitivity is discussed, and a fault/failure model that accounts for fault location is presented, and the relationship of the approach to testability is considered.
Abstract: Sensitivity analysis, which estimates the probability that a program location can hide a failure-causing fault, is addressed. The concept of sensitivity is discussed, and a fault/failure model that accounts for fault location is presented. Sensitivity analysis requires that every location be analyzed for three properties: the probability of execution occurring, the probability of infection occurring, and the probability of propagation occurring. One type of analysis is required to handle each part of the fault/failure model. Each of these analyses is examined, and the interpretation of the resulting three sets of probability estimates for each location is discussed. The relationship of the approach to testability is considered. >
129 citations
TL;DR: In this article, the authors present a method for estimating the direction of fault in a radial distribution system using phase change in current, where the difference in phase angle between the positive-sequence component of the current during fault and prefault conditions is found to be a good indicator of the fault direction in a three-phase system.
Abstract: When a remotely sited wind farm is connected to the utility power system through a distribution line, the overcurrent relay at the common coupling point needs a directional feature. This paper presents a method for estimating the direction of fault in such radial distribution systems using phase change in current. The difference in phase angle between the positive-sequence component of the current during fault and prefault conditions has been found to be a good indicator of the fault direction in a three-phase system. A rule base formed for the purpose decides the location of fault with respect to the relay in a distribution system. Such a strategy reduces the cost of the voltage sensor and/or connection for a protection scheme which is of relevance in emerging distributed-generation systems. The algorithm has been tested through simulation for different radial distribution systems.
129 citations
11 Nov 1991
TL;DR: The difficult problem of identifying the equivalence of two faults, analogous to the problem of redundancy identification in ATPG, has been solved and the efficient algorithm is demonstrated by experimental results for a set of benchmark circuits.
Abstract: The authors present an efficient algorithm for the generation of diagnostic test patterns which distinguish between two arbitrary single stuck-at faults. The algorithm is able to extend a given set of test patterns which is generated from the viewpoint of fault detection to a diagnostic test pattern set with a diagnostic resolution down to a fault equivalence class. The difficult problem of identifying the equivalence of two faults, analogous to the problem of redundancy identification in ATPG, has been solved. The efficiency of the algorithm is demonstrated by experimental results for a set of benchmark circuits. DIATEST, the implementation of the algorithm, either generates diagnostic test patterns for all distinguishable pairs of faults or identifies pairs of faults as being equivalent for each of the benchmark circuits. >
129 citations
TL;DR: A class of count-and-threshold mechanisms, collectively named /spl alpha/-count, which are able to discriminate between transient faults and intermittent faults in computing systems and adopt a mathematically defined structure, which is simple enough to analyze by standard tools.
Abstract: This paper presents a class of count-and-threshold mechanisms, collectively named /spl alpha/-count, which are able to discriminate between transient faults and intermittent faults in computing systems. For many years, commercial systems have been using transient fault discrimination via threshold-based techniques. We aim to contribute to the utility of count-and-threshold schemes, by exploring their effects on the system. We adopt a mathematically defined structure, which is simple enough to analyze by standard tools. /spl alpha/-count is equipped with internal parameters that can be tuned to suit environmental variables (such as transient fault rate, intermittent fault occurrence patterns). We carried out an extensive behavior analysis for two versions of the count-and-threshold scheme, assuming, first, exponentially distributed fault occurrencies and, then, more realistic fault patterns.
129 citations