Stuck-at fault

About: Stuck-at fault is a research topic. Over the lifetime, 9707 publications have been published within this topic receiving 160254 citations.

Computational complexity issues in operative diagnosis of graph-based systems

Abstract: Systems that can be modeled as graphs, such that nodes represent the components and the edges represent the fault propagation between the components, are considered. Some components are equipped with alarms that ring in response to faulty conditions. In these systems, two types of problem are studies: fault diagnosis and alarm placement. The fault diagnosis problems deal with computing the set of all potential failure sources that correspond to a set of ringing alarms. Single faults, where exactly one component can become faulty at any time, are primarily considered. Systems are classified into zero-time and non-zero-time systems on the basis of fault propagation time. The latter are further classified on the basis of knowledge of propagation times. For each of these classes algorithms are presented for single fault diagnosis. The problem of detecting multiple faults is shown to be NP-complete. An alarm placement problem that requires a single fault to be uniquely diagnosed is examined. >

Method of controlling a network element to aggregate alarms and faults of a communications network

Abstract: A distributed method and system of controlling a communications network having a plurality of spans of interconnected network elements some of which include a network element processor distributes network topology information to respective span databases; stores original fault objects in the respective span databases; advertises fault objects to other network element processors in a local span when the original fault affects network elements other than a network element in which the fault occurred; advertises alarm objects to other network element processors that are respectively associated with a circuit affected by the original faults; stores the advertised fault and alarm objects in the respective span databases; and performs distributed processing of the advertised fault and alarm objects with the other network element processors and the respective span databases. Aggregation of other faults and alarms that may be occurring on the communications network due to other faults other than the received fault aids in determining causality of the fault. Causality may be determined by correlating other faults and alarms with the received fault. If not a root cause of another fault or alarm, the received fault is sympathetic to another fault or alarm. Sympathetic faults are suppressed while root cause faults are promoted to an alarm and reported to affected network elements. The number of alarms viewed by a network manager as well as the reporting of alarms and underlying faults are reduced by performing such distributed alarm correlation and fault reporting suppression.

Active Fault-Tolerant Control for a Class of Nonlinear Systems with Sensor Faults

Abstract: A general active fault-tolerant control framework is proposed for nonlinear systems with sensor faults. According to their identifiability, all sensor faults are divided into two classes: identifiable faults and non-identifiable faults. In the healthy case, the control objective is such that all outputs converge to their given set-points. A fault detection and isolation module is firstly built, which can produce an alarm when there is a fault in the system and also tell us which sensor has a fault. If the fault is identifiable, the control objective remains the same as in the healthy case; while if the fault is non-identifiable, the control objective degenerates to be such that only the healthy outputs converge to the set-points. A numerical example is given to illustrate the effectiveness and feasibility of the proposed method and encouraging results have been obtained.

Fault Location with Current Monitoring

Abstract: Recently there has been renewed interest in fault detection in static CMOS circuits through current monitoring (“Iddq testing”). It is shown that accurate defect (diagnosis miay be performed with a combination of current and voltage observations. The proposed system combines a simple single fault model for test generation with a more realistic multiple defect model for diagnosis. ‘The associated hardware is sufficiently simple that on-board implementation is possible.

A test pattern generation methodology for low power consumption

Abstract: This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the test pattern generation phase and selects a subset of sequences able to reduce the consumed power without reducing the fault coverage. The method is composed of three independent steps: redundant test pattern generation, power consumption measurement, optimal test sequence selection. The experimental results gathered on the ISCAS benchmark circuits show that our approach decreases the power consumption by 70% on average with respect to the original test pattern, generated ignoring the heat dissipation problem.