Showing papers on "Substrate (electronics) published in 1973"

Microstructure, growth, resistivity, and stresses in thin tungsten films deposited by rf sputtering

Abstract: The growth process and the microstructure of very thin W films (80–500 A) deposited by rf sputtering on SiO2 and Si substrates have been observed by transmission electron microscopy (TEM). The resistivity and stress in these films have been related to the film microstructure, composition, and to the deposition conditions (substrate bias and rf deposition power). Thin W films deposited on silicon dioxide substrates under zero or positive bias have been found to grow in two distinct growth stages. Stage I corresponds to the formation of a thin continuous film (80–100 A thick) of β‐W. The β‐W phase has the A‐15 crystal structure and has been identified as a faulted W3W compound. A small grain size (50–100 A) is characteristic of the β‐W film. Stage II corresponds to the transformation of the β‐W film into a pure α‐W film with the bcc crystal structure. This thermally activated phase transformation takes place in the temperature range 100–200 °C. It is characterized by the growth of α‐W nuclei until complete ...

Reaction kinetics of tungsten thin films on silicon (100) surfaces

Abstract: The rate of reaction between Si (100) surfaces and tungsten films deposited by rf diode sputtering depends on the preparation of the silicon surface. If rf substrate bias is used to clean the silicon, then the rate of reaction in the temperature range 700–850 °C is independent of time, with an activation energy of 3 eV/mole W. The native oxide layer between the silicon and tungsten, that exists when sputter cleaning is not used, can act as a barrier to WSi2 formation. In this case, the time‐independent region is preceded by a period when the reaction rate increases with time. The rate is then controlled by two‐dimensional spreading of discontinuous WSi2 regions that originate at sites where the reaction barrier can be penetrated. After a continuous WSi2 layer is formed, additional growth can produce a stage where the increased path length for silicon diffusion causes the transport step to control the over‐all rate of the reaction. Quantitative models are presented for each of the three stages in the reaction. The models explain some of the macroscopic observations made on reacted layers.

Solid-phase epitaxial growth of Si mesas from Al metallization

Abstract: Si epitaxial growth from solution in solid Al onto crystal Si substrates was studied by scanning electron microscopy. Growth in reentrant corners of the substrate was found to be favored over growth onto a flat surface. For this reason, the smaller-diameter oxide cuts used in integrated-circuit fabrication, in which no portion of the exposed substrate Si is far from a reentrant corner, are favored sites for growth. Si growth readily fills in such oxide cuts forming mesa structures potentially useful in device construction. The probable cause for such preferential growth was indicated in pressure experiments which show that regions in the solid Al under relatively less compression are favored locations for growth.

Pyroelectric response and D* of thin pyroelectric films on a substrate

Abstract: The pyroelectric response and the D* of thin pyroelectric films on, a substrate are calculated as a function of the substrate and film thickness. It is found that for low‐frequency applications the pyroelectric layer should not be made too thin, preferably several micrometers thick, that the substrate should be as thin as possible, and that the product of its specific heat, density, and heat conductivity should be as small as possible. For thick substrates there is an intermediate frequency region where the value of D* is practically independent of frequency. This intermediate frequency region extends to higher frequencies if the pyroelectric layer is made thinner, but D* decreases with decreasing film thickness in that region.

Formation of vanadium silicides by the interactions of V with bare and oxidized Si wafers

Abstract: Formation of vanadium silicides by the interactions of vanadium with bare and oxidized Si wafers has been studied by both x‐ray diffraction and He ion backscattering techniques. X‐ray diffraction was used to identify phases and ion backscattering to profile compositional changes. In the case of V on Si, the silicide VSi2, which is a silicon‐rich phase, was found to form at temperatures from 600 to 1000 °C. In the case of V on SiO2, reactions took place only at temperatures above 800 °C, and the reaction products were identified to be V3Si, V5SI3, and V2O5. Both V3Si and V5Si3 are vandium‐rich phases, and the V3Si that we found was a continuous layer between the substrate and the other two phases, and became superconducting at about 15 °K.

PLANAR GaN ELECTROLUMINESCENT DEVICE

Abstract: A GaN electroluminescent structure has been fabricated on a silicon substrate allowing for the construction of light-emitting diodes in the visible region on a planar surface carrying other silicon dependent devices.

Microwave Acoustics Handbook. Volume 1A. Surface Wave Velocities.

Abstract: : Information essential for the design of acoustic surface wave filters, signal processors, and other miniature, low cost, reliable devices for use in communications and electronic sensing is given in this report. Computations of surface wave velocity and electromechanical power flow angle, and estimates of surface wave coupling to interdigital transducers are given for various orientations of the following surface wave substrate materials: Ba2NaNb5O15, Bi12GeO20, CdS, Diamond, Eu3Fe5O15, Gadolinium Gallium Garnet, GaAs, Germanium, InSb, InAs, PbS, LiNbO3, MgO, Quartz, Rutile, Sapphire, Silicon, Spinel, TeO2, YAG, YGaG, YIG, and ZnO. Particular cuts of interest are then chosen for more detailed numerical calculations of mechanical and electrical parameters governing acoustic wave propagation in crystalline media. Similar data is given for common metals. A list of material constants and a bibliography of 520 surface wave papers are also included. (Author)

Diffuse interface in Si (substrate)‐Au (evaporated film) system

Abstract: When a gold film is vacuum evaporated at around 50 °C onto a clean surface of single‐crystal silicon substrate, the adhesion of the film to the substrate is very strong, which suggests that some chemical reaction has taken place at the interface. Present study by Auger electron spectroscopy (AES) concludes the occurrence of the above reaction which induces a diffuse interface region in order to relax (or minimize) the interface energy. For the relaxation of silicon (110) and (111) interfaces, at least 45 and 20 monolayers of gold are necessary, respectively. The phase of the thus‐formed interface is concluded to be similar to that of the nonequilibrium solid alloy obtained by quenching from a solid Si–Au eutectic liquid.

Spontaneous alloying of a gold substrate with lead monolayers

Abstract: Auger electron spectroscopy and low energy electron diffraction have been used to study monolayers of lead deposited in ultrahigh vacuum on to the (100) face of gold. There form first simple overlayer structures leading to a dense compact monolayer arrangement. Evidence is then found for the formation of an alloy layer which appears spontaneously at room temperature after completion of the first dense monolayer. The proposed alloy structure has the composition AuPb3.

Mbe technique for fabricating semiconductor devices having low series resistance

Abstract: In order to fabricate by MBE semiconductor devices, such as junction lasers and light modulators or varactor and impatt diodes, having relatively low series resistance one or more of the following three steps are executed: (1) on the substrate a high conductivity buffer layer is first grown having the same conductivity-type as the substrate; (2) beginning with the high conductivity layer and until all semiconductor layers of the device are fabricated, the growth process is made to be continuous; and (3) the substrate is heated just prior to the growth of the high conductivity layer and under excess pressure of any element in the substrate which has a relatively high vaporization pressure and which tends to evaporate from the heated substrate. Preferably all three steps are performed.

Process of coating a gas turbine engine alloy substrate

Abstract: A method of coating a gas turbine engine alloy substrate comprising depositing a rare earth and aluminum-containing alloy initial layer to a thickness sufficient to produce and maintain an adherent irregular aluminum oxide, mechanically working the surface of the initial layer to induce irregularity and angular topography in the aluminum oxide to be produced, oxidizing the initial layer to produce a sufficiently thick and irregular aluminum oxide layer to establish mechanical adherence of a noble metal layer and prevent alloying between the initial layer and the noble metal layer, depositing a noble metal layer on the oxidized layer to a thickness of approximately 0.1-0.2 mils and oxidatively treating the coated substrate to cause additional growth of the oxide layer to metallurgically insulate the noble metal layer from the substrate and the initial metal layer.

Epitaxial growth of silicon from SiH4 in the temperature range 800–1150°C

Abstract: Results on the deposition of silicon from SiH 4 are reported for a temperature range 800–1150°C. Deposition was carried out at atmospheric pressure and at reduced pressures in the range 0·2-1 Torr where it was possible to maintain an h.f. glow discharge in the reactor tube. Using the h.f. discharge good quality epitaxial growth was achieved at 800°C for both undoped and heavily doped n -type layers. The main advantage of using the discharge is thought to be the marked cleanup it gives to the substrate prior to deposition taking place.

Control of Resistivity, Microstructure, and Stress in Electron Beam Evaporated Tungsten Films

Abstract: We have investigated the capability of the electron beam evaporation technique for producing thin W films having properties suitable for application as first-level metallization in refractory MOS (RMOS) devices. The apparatus consisted of a sputter-ion pumped 18-in. diam UHV station, 6-kW e gun, and a quartz crystal rate monitor. The evaporation process employs low background pressures (1−3×10−7 Torr), substrate heating (200–700 °C), a preevaporation step, and evaporation at rates of 100–500 A/min. Maximum throughput is 16 1(14)-in. diam silicon slices per run. Using substrate temperatures of 500–700 °C, we have been able to produce mechanically stable, adherent films having a resistivity of 7–8 μΩ cm and a sheet resistance of ∼ 0.08 Ω/□ (for 9000-A film). “Cold”-deposited films (> 1000 A thick) having a high resistivity of 40–50 μΩ cm can be annealed at 1000 °C to resistivity of 10–15 μΩ cm. The films are single-phase bcc W with a small grain size of 0.1–0.2 μ. Low resistivity films (deposited above 550 °C) are associated with a large degree of microstructural perfection, and have small tensile stresses (3−7×109dyn cm−2). The films possess, excellent high-resolution etchability, and were found to be compatible with MOS structures provided care is exercised during the deposition.

Silicon semiconductor device array and method of making same

Abstract: Silicon semiconductor device array, e.g. solar cell device or array of devices; formed from bulk silicon deposited in the form of columnar crystallites bounded by substantially vertical grain boundaries. Junctions are formed across crystallites and along grain boundaries. The grain boundaries are made substantially non-conductive by diffusion from one side of the sheet. P and n layers are provided as contact areas for electrodes. Deposition of silicon takes place directly from decomposition of silicon-containing vapors onto a non-silicon substrate sheet.

Integrated circuit fabrication process

Abstract: Integrated circuits of high density are fabricated in a simplified process which allows both the use of multiple conducting layers in a dielectric above a semiconductor substrate, such as a polycrystalline silicon (polysilicon) field shield and metal interconnection lines, while also making provision for very precise alignment of subsequent layers to diffusions. A doped oxide containing a suitable dopant, such as arsenic in the case of a p-type silicon substrate, is deposited on the substrate. A pattern corresponding to desired diffusions is generated by normal photolithographic and etching techniques. A second, undoped oxide layer is thermally grown over the semiconductor substrate with dopant from the doped oxide simultaneously diffusing into areas of the substrate underlying the doped oxide. The undoped oxide serves to prevent autodoping. Thermally growing the undoped oxide layer converts a layer of the semiconductor surface not covered by doped oxide to the undoped oxide. Both oxide layers are then removed, leaving slight steps at the surface of the semiconductor substrate around the diffusion. The slight steps serve to allow very precise alignment of masks for subsequent process steps. Otherwise, the structure produced is very planar. An insulating layer, desirably a composite of silicon dioxide and silicon nitride in the case of a silicon substrate, is then formed on the substrate, followed by a layer of polycrystalline semiconductor, desirably doped to provide high conductivity. Openings are then etched in the polycrystalline semiconductor layer to allow formation of gate electrodes of FET''s, contact to the substrate, and contact of a subsequent interconnection metallization to diffusions in some of the circuits. A second insulating layer, such as silicon dioxide, is then grown on the polycrystalline semiconductor layer. Contact holes are then made to diffusions in the substrate, the substrate itself, and the polycrystalline silicon. The deposition and etching of an interconnection layer on the second insulating layer completes fabrication of the integrated circuit.

Method for producing a thin film passive circuit element

Abstract: A thin film of a high resistivity metal such as Ta, Ti, Mo or Nb is formed on a substrate. The side faces of the thin resistive film are surrounded by, and at least a greater part of the top surface of the thin resistive film is covered with an insulating substance which is a compound, such as an oxide or nitride of the high resistivity metal. The thin resistive film and the insulating substance form a substantially flat layer.

Nucleation and growth of stacking faults in epitaxial silicon during thermal oxidation

Abstract: An optical and electron microscopy study of the nucleation and growth of stacking faults in {001}‐oriented epitaxial silicon has been carried out following pretreatment of the crystal in hydrofluoric acid and thermal oxidation in steam at 1050°C. A direct correlation of the etched surface structure as revealed by interference contrast optical and scanning electron microscopy with substructural defects as revealed by transmission electron microscopy has been established for times ≥1 min. The observations are divided into five stages which, taking the TEM observations as a reference, are (i) formation of a needle‐shaped precipitate at the Si–SiO2 interface; (ii) nucleation of an interfacial Frank dislocation; (iii) climb of the Frank dislocation into the silicon substrate; (iv) formation of an equilibrium‐shaped stacking fault; and (v) stacking‐fault interactions.

Method of manufacturing semiconductor devices in which silicon oxide regions inset in silicon are formed by a masking oxidation, wherein an intermediate layer of polycrystalline silicon is provided between the substrate and the oxidation mask

Abstract: The manufacture of semiconductor devices, particularly silicon ICs, employing isolating inset oxides is described. To prevent formation of a projecting oxide beak under an oxidation masking layer, a layer of polycrystalline silicon is provided under the oxidation mask instead of the usual silicon oxide.

Non-polarized memory-switching characteristics of ZnTe thin films

Abstract: ZnTe thin films were prepared by the conventional vacuum-deposition method. Polycrystalline thin films could be deposited on a glass substrate at substrate temperature between 20 and 450°C. Epitaxial thin films could be obtained on GaAs and InAs single crystals at substrate temperatures higher than 200°C. Memory switching could be observed in metal-ZnTe-metal sandwich devices prepared on glass substrates. Both switching transitions, from off to on and on to off, could be performed without changing the bias polarity if a suitable value of series resistance was selected for each transition. Typical values of the series resistor were 20 KΩ for off to on and 200 Ω for on to off transitions. Transition from off to on is explained as a result of the formation of a filamentary path in the off state, followed by the formation of a metallic filament in the on state. Transition from on to off is considered a result of thermal rupture of the metallic filament.

Measurement of thin films by optical waveguiding technique

Abstract: In order to measure the thickness and refractive index of a transparent thin film on a substrate of higher refractive index, such as a film of silicon oxide on a substrate of silicon, an optical wave is coupled into and guided through the film. The guided wave is coupled into the film by means of the phenomenon of the tunneling into the film of an evanescent wave from a beam of light incident on the surface of an adjacent coupling medium at an angle greater than the critical angle for total internal reflection in the medium. The intensity minima of the optical radiation which can be coupled out of the film back into the coupling medium (overall reflection), as a function of angle, yields data from which the desired thickness and refractive index can be determined.

Manufacture of a high voltage Schottky barrier device

Abstract: Providing a substrate doped with a first type of impurity and having a silicon dioxide ring deposited thereon which is doped with a second type of impurity. Treating the substrate to diffuse the impurities from the ring into the substrate immediately therebelow to form a guardring aligned with the aperture through the silicon dioxide ring. Depositing barrier and contact metals within the aperture of the silicon dioxide ring to form a Schottky barrier aligned with said guardring.

Barium Silicate Films for Integrated Optical Circuits

Abstract: This paper describes the preparation and properties of rf sputtered barium silicate films that are suitable for use as transmission media in integrated optical circuits. It is shown that the films, which can be produced with a wide range of refractive indices by suitable selection of the ratio of the target constituents, exhibit low optical attenuation. The techniques used to deposit the films and the effect on loss of a number of parameters including pressure, film thickness, and substrate bias are discussed.

Method of making a semiconductor device

Abstract: A semiconductor device including a substrate, a first body of a semiconductor material epitaxially deposted on the surface of the substrate and a second body of a semiconductor material epitaxially deposited on the first body. The first body is deposited so as to include a plurality of superimposed epitaxial layers having growth interfaces between adjacent layers so that each of the layers has fewer crystal dislocations than the adjacent layer which is closer to the substrate and the layer adjacent the second body has the fewest crystal dislocations. The second body is of a semiconductor material which has a crystal lattice which substantially matches the crystal lattice of the semiconductor material of the first body.

Dielectrically isolated semiconductor devices

Abstract: A dielectrically isolated semiconductor device can be manufactured The structure is useable for integrated circuits, including field effect and/or bipolar transistors, wherein a significant savings in surface area and reduction in capacitances can be obtained over prior techniques The method involves forming a layer of dielectric material upon a semiconductor body, having a diffused region where a bipolar device is to be formed, and then forming an opening in the layer to expose a part of the surface of the diffused region of the semiconductor body An epitaxial layer of silicon is deposited on top Single crystal silicon will grow over the exposed silicon area and if a diffused region is present in the substrate a pedestal will outdiffuse through the same area from the buried diffused region Polycrystalline silicon will grow on top of the dielectric material The pedestal is formed in a single crystal epitaxial layer of another impurity type Two other active elements of a bipolar transistor, such as the emitter and intrinsic base regions, are then formed in the same single crystal epitaxial layer while the inactive area, such as the extrinsic base, is formed in polycrystalline silicon A reach through is made through the dielectric layer to the third element of the transistor, that is collector region

X-ray lithography mask

Abstract: The disclosure relates to a mask for use in X-ray lithography wherein a window is provided for X-rays, a pattern being placed over the window which absorbs the X-rays along the pattern, thereby providing a mask to the X-rays in accordance with the pattern and causing the X-rays to strike a mask on a device at all points except where the X-rays have been masked. Photoresist systems which are responsive to X-rays are well known, these including polymethylmethacrylate. The mask is formed from a thin layer of silicon carbide with a ring of material supporting the silicon carbide, preferably silicon. The desired pattern is then formed on the silicon carbide, using a material which absorbs Xrays, such as gold. The mask is formed by utilizing a starting substrate such as silicon and depositing a thin layer of silicon carbide thereon. The silicon is then etched down to the silicon carbide at all points except for the perimeter of the silicon carbide or in segments such as quadrants to provide a support for the silicon carbide. The silicon carbide is thin and acts as a window to Xrays. An X-ray absorbing mask is then formed on the silicon carbide window to provide the final X-ray lithograph mask.