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Showing papers on "Substrate (electronics) published in 1975"


Journal ArticleDOI
B. S. Berry1, W. C. Pritchet1
TL;DR: In this paper, an apparatus for the resolution of anelastic relaxation effects in evaporated metallic thin films and ion-implanted surface layers of silicon is described, which consists of the film or layer of interest on a carrier substrate having the form of a thin cantilevered reed.
Abstract: An apparatus is described which permits for the first time the resolution of anelastic relaxation effects in evaporated metallic thin films and ion-implanted surface layers of silicon. The composite samples consist of the film or layer of interest on a carrier substrate having the form of a thin cantilevered reed. Low external losses and an exceptionally good span of operating frequencies are obtained by integrally bonding the substrate to a supporting pedestal and by using electrostatic drive and detection for the transverse modes of vibration. The internal friction can be measured with relatively simply instrumentation, at pressures below 10-5 (1.33 × 10-3 Pa) and over the temperature range -190°C to 550°C. The apparatus has considerable versatility for work in a number of areas, including the investigation of metallic foils prepared by splat-cooling.

142 citations


Journal ArticleDOI
TL;DR: In this article, a new approach to achieve planar growth of isolated devices on an insulating substrate using molecular beam epitaxy (MBE) has been demonstrated, where both monocrystalline and polycrystalline GaAs are selectively grown producing a pattern which consists of areas of device−quality single−crystal material isolated by semi−insulating poly crystal material.
Abstract: GaAs integrated circuits require planar growth of isolated devices on an insulating substrate. A new approach to achieve planar growth has been demonstrated by molecular beam epitaxy (MBE). In the MBE process polycrystalline and monocrystalline GaAs are selectively grown producing a pattern which consists of areas of device−quality single−crystal material isolated by semi−insulating polycrystalline material. The active device positions were defined by windows in SiO2 layers which covered the Cr−doped semi−insulating GaAs substrate.

111 citations


Patent
17 Nov 1975
TL;DR: In this paper, the authors proposed a photoelectrolysis of water by solar radiation to produce hydrogen is achieved using semiconducting thin film electrodes, where an anodic electrode comprising at least one thin n-type semiconductor layer which has a bandgap ranging from about 0.5 to 4.0 eV and which is disposed on a supporting conductive substrate.
Abstract: Photoelectrolysis of water by solar radiation to produce hydrogen is achieved using semiconducting thin film electrodes. The cell comprises (a) an anodic electrode comprising at least one thin n-type semiconducting layer which has a bandgap ranging from about 0.5 to 4.0 eV and which is disposed on a supporting conductive substrate; (b) a cathodic counter-electrode comprising at least one thin p-type semiconducting layer which has a bandgap ranging from about 0.5 to 4.0 eV and which is supported on a supporting conductive substrate, the p-type layer adjacent the n-type layer being such that incident solar radiation impinges substantially simultaneously on both the n- and p-type electrodes; (c) means for retaining an electrolyte in contact with the exposed surfaces of the n- and p-type semiconducting electrodes; (d) external bias means between the electrode and the counter-electrode for biasing the cell with from 0 to about 1 V; and (e) means for collecting hydrogen and any oxidation products produced.

109 citations


Journal ArticleDOI
TL;DR: In this paper, a form of deposition in which material is vaporized in a crucible and the vapor then ejected through a fine nozzle at the focus of an electron beam in a high vacuum is described.
Abstract: We describe a form of deposition in which material is vaporized in a crucible and the vapor then ejected through a fine nozzle at the focus of an electron beam in a high vacuum. The vapor, on emerging from the nozzle, is partially condensed into clusters that are ionized by electron bombardment and then accelerated onto the substrate. The deposited films show good adhesion and large crystallite size. Examples include the deposition of Cu onto glass, Si onto Si, and ZnS onto NaCl.

108 citations


Journal ArticleDOI
TL;DR: In this paper, cross sections of (100)Si/(012)sapphire were examined by transmission electron microscopy and the foil plane was (011)Si and contained the [100]Si growth direction, and the number of faults (i.e., microtwins and isolated stacking faults) per cm measured in the [022]Si direction, FD, decreases with increasing distance d from the silicon/substrate growth interface according to the equations FD= (3.1×107)/d0.63 (440⩽d ⩽2400 A),
Abstract: Cross sections of (100)Si/(012)sapphire were examined by transmission electron microscopy. The foil plane was (011)Si and contained the [100]Si growth direction. The number of faults (i.e., microtwins and isolated stacking faults) per cm measured in the [022]Si direction, FD, decreases with increasing distance d from the silicon/substrate growth interface according to the equations FD= (3.1×107)/d0.63 (440⩽d⩽2400 A), and FD= (1.3×1011)/d1.7 (2400?d?4.3×104 A). Misfit dislocations were not observed, and no evidence for the presence of an Al‐bearing phase was seen in the proximity of the interface.

83 citations


Journal ArticleDOI
TL;DR: In this paper, a technique for deposition of highly oriented rf−sputtered zinc oxide films on (111) gold, ( 111) silicon, (0001) sapphire, and fused quartz is described.
Abstract: A technique for deposition of highly oriented rf‐sputtered zinc oxide films on (111) gold, (111) silicon, (0001) sapphire, and fused quartz is described. The major parameters that were controlled during deposition are substrate temperature, input rf power, deposition pressure, and the deposition atmosphere. It was found that the best results were obtained with an rf power of 160 W, a deposition at 4 μ pressure in an 80 : 20 argon : oxygen mixture, and with the substrate temperature varied between 225 and 400 °C depending on the substrate. The deposition rate varied slightly around 120 A/min, with very small variation for different substrates. The quality of the ZnO films was determined by reflection electron diffraction and scanning electron microscopy. Acoustic‐bulk‐wave and acoustic‐surface‐wave delay lines were made by this technique. In all cases, high coupling coefficients were obtained.

80 citations


Journal ArticleDOI
TL;DR: The phase equilibrium of the LiVO3•LiNbO3 pseudobinary system has been investigated, and a LiNiBO3 single-crystal thin film has been grown epitaxially onto the substrate by dipping a c-plate LiTaO3 substrate into a Li VO3 flux solution as discussed by the authors.
Abstract: The phase equilibrium of the LiVO3‐LiNbO3 pseudobinary system has been investigated, and a LiNbO3 single‐crystal thin film has been grown epitaxially onto the substrate by dipping a c‐plate LiTaO3 substrate into a LiVO3 flux solution. An x‐ray rocking curve indicated that the film had a high single crystallinity with good epitaxy. The composition ratio Li/Nb of the film was estimated to be close to the stoichiometric value Li/Nb≈1.0.

71 citations


Journal ArticleDOI
TL;DR: Aluminum nitride films have been found to be polycrystalline with the crystallite size increasing with the increasing temperature of deposition as mentioned in this paper, which indicates that aluminum nitride has potential as a dielectric in electronic devices.
Abstract: Aluminum nitride films have been deposited on silicon substrates at 800-1200 C by the pyrolysis of an aluminum trichloride-ammonia complex, AlCl3.3NH3, in a gas flow system. The deposit was transparent, tightly adherent to the substrate, and was confirmed to be aluminum nitride by X-ray and electron diffraction techniques. The deposited aluminum nitride films were found to be polycrystalline with the crystallite size increasing with increasing temperature of deposition. Other properties of aluminum nitride films relevant to device applications, including density, refractive index, dissolution rate, dielectric constant, and masking ability, have been determined. These properties indicate that aluminum nitride films have potential as a dielectric in electronic devices.

70 citations


Journal ArticleDOI
TL;DR: In this paper, the conduction mechanisms of ultrathin (10−100 A) metal films are investigated and the electrical conductivity and activation energy of discontinuous Au films are correlated with island size and separation and average film thickness.
Abstract: The conduction mechanisms of ultrathin (10−100 A) metal films are investigated. The electrical conductivity and activation energy of discontinuous Au films grown in UHV are correlated with island size and separation and average film thickness. The relationship between film conductivity and deposition rate and substrate temperature is presented. Film temperature data indicate the validity of the proposed model. Some anomalous conductivity effects are reported for films deposited below the UHV range. The results are explained in terms of substrate and film surface contamination. Data are presented indicating the sensitivity of the conductivity of discontinuous films to ambient gas concentration. Reversible and irreversible situations are discussed.

70 citations


Patent
12 Feb 1975
TL;DR: In this article, a direct bond between metallic members and non-metallic members is achieved at elevated temperatures in a controlled reactive atmosphere without resorting to the use of electroless plating, vacuum deposition or intermediate metals.
Abstract: A direct bond between metallic members and non-metallic members is achieved at elevated temperatures in a controlled reactive atmosphere without resorting to the use of electroless plating, vacuum deposition or intermediate metals. A metal member such as copper, for example, is placed in contact with a non-metallic substrate, such as alumina, the metal member and the substrate are heated to a temperature slightly below the melting of the metal, e.g., between approximately 1065° and 1080° C. for copper, with the heating being performed in a reactive atmosphere, such as an oxidizing atmosphere, for a sufficient time to create a copper-copper oxide eutectic melt which, upon cooling, bonds the copper to the substrate. Various metals, non-metals and reactive gases are described for direct bonding.

70 citations


Patent
David R. Wanlass1
10 Jan 1975
TL;DR: In this article, a thin epitaxial layer of silicon is disposed on a supporting silicon substrate and a silicon oxide layer or other suitable layer is formed on the epitaxially layer.
Abstract: A thin epitaxial layer of silicon is disposed on a supporting silicon substrate and a silicon oxide layer or other suitable layer is formed on the epitaxial layer. The substrate, epitaxial layer and oxide layer sandwich is bonded by the simultaneous application of heat and voltaic pressure to another oxidized substrate such that the epitaxial layer is sandwiched between the two substrates with the oxide layer at the sandwich interface. Alternatively, the substrates may be joined by bonding without the use of voltaic pressure by placing the substrates (parent and supporting) at approximately 900° C. The substrates with the epitaxial layer is processed to remove a substantial portion of the silicon substrate with the final portion being removed by etching. When the final portion of the silicon substrate is removed by etching, exposing the epitaxial silicon layer, the etching rate changes dramatically and this is reflected in the byproduct concentration in the etchant solution. The etching process is immediately terminated when the epitaxial layer is fully exposed. After further finishing steps, the resulting product of this method is an epitaxial monocrystalline silicon layer of high crystalline perfection, separated by a silicon oxide layer from a supporting silicon substrate.

Patent
24 Mar 1975
TL;DR: In this article, a doped silicon powder is injected into a high temperature ionized gas (plasma) to become molten and to be sprayed onto a low-cost substrate.
Abstract: Polycrystalline silicon films useful in preparing solar cells primarily for terrestrial application are prepared by a plasma spraying process. A doped silicon powder is injected into a high temperature ionized gas (plasma) to become molten and to be sprayed onto a low-cost substrate. Upon cooling, a dense polycrystalline silicon film is obtained. A p-n junction is formed on the sprayed film by spray deposition, diffusion or ion implantation. A sprayed junction is produced by plasma spraying a thin layer of silicon of opposite polarity or type over the initially deposited doped film. In forming a diffused junction, dopant is applied over the surface of the initial plasma-sprayed film usually from the vapor phase and heat is used to cause the dopant to diffuse into the film to form a shallow layer of opposite polarity to that in the original film. A junction is also formed by implanting dopant ions in the surface of the originally deposited film by the use of electrical fields. When used in conjunction with ohmic contacts and electrical conductors, the p-n junctions produced using plasma-sprayed polycrystalline silicon films are formed into solar cells which are useful for directly converting sunlight into electricity by means of the photovoltaic effect.

Patent
12 May 1975
TL;DR: In this paper, a metallization scheme for interconnection of elements in thin film and hybrid circuits is described, where a thin layer of titanium is first formed, preferably by evaporation or sputtering, on the surface of the insulating substrate.
Abstract: A metallization scheme for interconnection of elements in thin film and hybrid circuits is described. A thin layer of titanium is first formed, preferably by evaporation or sputtering, on the surface of the insulating substrate. A thin layer of copper is then formed in the same manner over the titanium layer. This is followed by electroplating of copper to a desired thickness onto selected portions of the Ti-Cu multilayer. Successive layers of nickel and gold are then selectively electroplated onto the plated copper regions. An additional layer of palladium may also be included between the titanium and copper layers for improved adhesion. The Ti-Cu-Ni-Au metallization system has been found unusually compatible with the major processing requirements of thin film circuits, for example, thermocompression bonding, soldering, via-hole coverage and resistor stabilization.

Patent
08 Oct 1975
TL;DR: In this article, the authors describe methods and apparatus for producing unsupported monocrystalline films of silicon, germanium, gallium aresenide, and many other semiconductors and other materials.
Abstract: This invention deals with methods and apparatus for producing unsupported monocrystalline films of silicon, germanium, gallium aresenide, and many other semiconductors and other materials. Said methods comprise: (a) repetitively using a monocrystalline substrate S having a crystal structure closely matching that of the desired films; (b) epitaxially depositing on substrate S first an intermediate monocrystalline layer I and next an outer monocrystalline layer 0 so as to form a three-layer S-I-O configuration, said three layers having closely matching crystal structures; and (c) at least partly disintegrating said intermediate layer I so as to free said outer layer 0 and make substrate S available to repeat the same cycle.

Journal ArticleDOI
TL;DR: In this paper, the superconducting properties of bulk films (0.02-0.06 mm thick) of Nb 3 Ge deposited on Cu substrates by chemical vapor deposition have been studied along with physical parameters characterizing these deposits.
Abstract: The superconducting properties of bulk films(0.02- 0.06 mm thick) of Nb 3 Ge deposited on Cu substrates by chemical vapor deposition have been studied along with physical parameters characterizing these deposits. Results of susceptibility measurements showing superconducting onsets greater than 21 K and resistivity measurements showing onset greater than 22 K are presented along with heat capacity measurements. Data are also presented defining a relationship between superconducting transition temperature and lattice spacing throughout the range of 4 - 21 K. In addition, the effects of substrate temperature and substrate material, as well as mechanical properties such as substrate adherence are described.

Patent
22 May 1975
TL;DR: In this paper, a masked layer of aluminum, supported on a substrate, is exposed to a plasma formed by imposing an RF voltage across at least two spaced electrodes in an ambient including a gas selected from the group consisting of CCl4, Cl2, Br2, HCl.
Abstract: A process for etching aluminum wherein a masked layer of aluminum, supported on a substrate, is exposed to a plasma formed by imposing an RF voltage across at least two spaced electrodes in an ambient including a gas selected from the group consisting of CCl4, Cl2, Br2, HCl. The resultant conditions provide a reactive environment where the aluminum is bombarded with chlorine or bromine ions. The aluminum reacts with chlorine or bromine ions to form an aluminum chloride or bromide compound, which is volatile at the temperature of the sputtered substrate.

Patent
14 Apr 1975
TL;DR: In this paper, a method of depositing a layer comprising SiO2 on a surface of a substrate at a rate which is temperature independent is disclosed, which includes combining dichlorosilane (SiH2 Cl2) with an oxidizing gas, such as O2, CO2, N2 O, H2 O.
Abstract: A method of depositing a layer comprising SiO2 on a surface of a substrate at a rate which is temperature independent is disclosed. The method includes combining dichlorosilane (SiH2 Cl2) with an oxidizing gas, such as O2, CO2, N2 O, H2 O, to form SiO2.

Journal ArticleDOI
TL;DR: In this paper, the normal growth rate of a {001} face has been theoretically studied; by considering either direct fixation of gallium arsenide molecules, or formation of intermediate surface compounds, it appears that experimental results can be interpreted by considering the reactions of desorption of the chlorine atoms adsorbed on surface as limiting the growth.

Patent
David E. Aspnes1
29 Aug 1975
TL;DR: In this article, the authors measured the thickness and refractive index of a thin film on a substrate by using a beam of monochromatic polarized light directed on the film, where the reflected light was transmitted through an optical compensator and an optical analyzer both of which are rotating at different angular speeds, ωA and ωC, respectively, and the transmitted optical intensity was measured as a function of time.
Abstract: In order to measure the thickness and refractive index of a thin film on a substrate, such as a film of silicon dioxide on a substrate of silicon, a beam of substantially monochromatic polarized light is directed on the film. The reflected light is transmitted through an optical compensator and an optical analyzer both of which are rotating at different angular speeds, ωA and ωC, respectively; and the transmitted optical intensity is measured as a function of time. A Fourier analysis, for example, of the profile of this optical intensity vs. time can then be used for determining the Stokes parameters of the light reflected by the thin film and thereby also the thickness and refractive index of the film.

Patent
20 Oct 1975
TL;DR: In this paper, a thin resistive film is deposited on an insulating substrate over a mask, and a second resistive material which is not subject to oxidation is then etched away from portions which are not used as contact points.
Abstract: An arrangement of thin film resistive layers for hybrid microcircuits thatliminates electrical contact problems and provides a means for obtaining high precision by trimming. A thin resistive film is deposited on an insulating substrate over a mask. Without breaking vacuum, a second resistive film which is not subject to oxidation is deposited over the first resistive film. The second resistive film is then etched away from portions which are not used as contact points. Since the second resistive material has a different resistivity, it is also used for low value resistive portions in multiple resistor networks.

Patent
29 Sep 1975
TL;DR: In this paper, a pair of isolation medium and a plurality of spaced apart conductive lines extending between the isolation mediums are used to define a barrier to a dopant for the semiconductor substrate.
Abstract: Semiconductor integrated circuits, including, e.g., field effect transistors and memory cells employing field effect transistors, are formed by providing at a surface of semiconductor substrate a pair of isolation mediums and a plurality of spaced apart conductive lines extending between the isolation mediums. The conductive lines, such as polycrystalline silicon or polysilicon lines, are preferably thermally, chemically or anodically self insulatable in an unmasked batch process step and are made of a material suitable for defining a barrier to a dopant for the semiconductor substrate. Signal or bias voltages are applied to selected or predetermined conductive lines to provide control electrodes or field shields for the transistors. When the substrate has deposited on its surface an insulating medium made of a dual dielectric, such as silicon dioxide-silicon nitride, the dopant may be ion implanted through the insulating medium to form, e.g., the source and drain electrodes of the transistors as defined by the isolation mediums and the conductive lines. Other elements may be added to the structure to form, e.g., a memory cell. By depositing a conductive medium over the insulated conductive lines, the medium may be appropriately etched to provide desired access lines, capacitor electrodes, ground planes or additional field shields for the cells.

Journal ArticleDOI
TL;DR: In this paper, the nucleation and growth of gold films evaporated onto graphite were studied by examining the film intact with the substrate using transmission electron microscopy and diffraction.

Journal ArticleDOI
TL;DR: In this paper, the influence of the substrate orientation and of the deposition temperature on the crystallinity of the epitaxial gallium phosphide layers has been studied and the formation of cracks extending along the [110] direction, which are explained by the lattice mismatch and the difference in thermal expansion coefficients.

Patent
Antipov Igor1
30 Jun 1975
TL;DR: In this article, a method is provided for forming recessed silicon dioxide isolation in integrated circuits in which the "bird's beak" problems associated with conventional silicon dioxide-silicon nitride composite masking structures is minimized.
Abstract: In the fabrication of integrated circuits, a method is provided for forming recessed silicon dioxide isolation in integrated circuits in which the "bird's beak" problems associated with conventional silicon dioxide-silicon nitride composite masking structures is minimized. A conventional composite mask comprising a bottom layer of silicon dioxide and an upper layer of silicon nitride having a plurality of openings defining the regions in the silicon substrate which are to be thermally oxidized is formed on a silicon substrate. Recesses are then etched in the silicon substrate in registration with the openings in the composite mask. Then, the silicon dioxide layer is, in effect, over-etched to extend the openings in the silicon dioxide to greater lateral dimensions than the openings in the silicon nitride layer whereby the silicon nitride at the periphery of the openings is undercut. A layer of silicon is then deposited in the recesses covering the undercut portions of said silicon nitride layer. Then, the structure subjected to thermal oxidation whereby the silicon in and abutting the recesses is oxidized to form regions of recessed silicon dioxide substantially coplanar with the unrecessed portions of the silicon substrate. Because of the undercutting and the deposition of silicon in the recesses, the "bird's beak" effect is minimized.

Patent
14 Apr 1975
TL;DR: In this paper, a process for forming complete dielectrically isolated monocrystalline silicon regions on a substrate by depositing a first epitaxial silicon layer embodying an N-type impurity on a low resistivity silicon substrate embodying a P type impurity was described.
Abstract: PROCESS FOR FABRICATING DEVICES HAVING DIELECTRIC ISOLATION AND STRUCTURE. Abstract of the Disclosure A process for forming complete dielectrically isolated monocrystalline silicon regions on a substrate by depositing a first epitaxial silicon layer embodying an N-type impurity on a low resistivity silicon substrate embodying a P-type impurity, forming annular P-type impurity regions in the first epitaxial layer, depositing the second epitaxial layer embodying an N-type impurity on the first epitaxial layer, forming annular P-type impurity regions in the second epitaxial layer in registry with the annular regions in the first epitaxial layer, converting the silicon substrate and the annular P-type regions in the first and second epitaxial layers into porous silicon material by an anodic treatment carried out in an aqueous solution of hydrofluoric acid, and oxidizing the porous silicon material to form silicon oxide. A semiconductor structure having a backing substrate of silicon oxide with monocrystalline silicon islands embedded therein. A preferred embodiment includes low resistivity regions that extend through the substrate.

Patent
21 Apr 1975
TL;DR: In this paper, a beam of neutralized argon ions is incident at a grazing angle to the surface, typically 20°, resulting in a microscopic condition believed to comprise a "corrugated" surface with "ridges" and "valleys" parallel to the direction of the incident beam.
Abstract: Electrode surfaces are coated with a passivating material (silicon dioxide, aluminum oxide or titanium dioxide) or with a reflecting material (chromium or chromium and gold) or with a special alignment material (carbon) using standard vacuum sputtering, vacuum evaporation, electrodeposition, or chemical vapor deposition techniques. After sufficient thickness of material has been deposited, the substrate is exposed to a broad or narrow beam of neutralized argon ions of a few kilo-electron-volts energy. The beam of argon ions is incident at a grazing angle to the surface, typically 20°. Exposure of the overcoating results in a microscopic condition believed to comprise a "corrugated" surface with "ridges" and "valleys" parallel to the direction of the incident beam. These microscopically fine grooves or streaks are (1) reproducibly effective in causing parallel alignment of the liquid crystal molecules, (2) are durable to repeated cleaning procedures and air-bake treatments, and (3) are amenable to production applications in conjunction with vacuum deposition equipment.

Journal ArticleDOI
TL;DR: In this paper, the effect of substrate temperature on the nucleation and growth of gold films vaporized on a single crystal graphite was studied using transmission electron microscopy and diffraction, and it was shown that the morphology of the gold particles changes with substrate temperature.

Journal ArticleDOI
A.M. Mohsen1, F.J. Morris1
TL;DR: In this paper, the properties of bulk transfer charge-coupled devices (BCCDs) were characterized from measurements obtained using MOS capacitors and field effect transistors.
Abstract: The properties of bulk transfer charge-coupled devices (BCCD's) may be characterized from measurements obtained using MOS capacitors and field effect transistors. Models are presented for the MOS capacitor and field effect transistor for the case where a shallow doped layer of polarity opposite to that of the substrate is incorporated between the oxide and the substrate. These models explain the observed frequency dependence of the capacitance-voltage ( C - V ) characteristics of these devices. Techniques are presented for determining the impurity profile of the buried layer from the low frequency C - V measurements made on MOS transistors. The majority carrier mobilities in the buried layer and at the surface are measured for the BCCD's and compared to the surface minority carrier mobility measured for the surface channel CCD's. Generation lifetimes at the surface, in the buried layer and in the underlying substrate are determined from capacitance-time (pulse bias C - t ) measurements and leakage current measurements of the MOS capacitors and transistors. Methods are demonstrated whereby the depth from the oxide interface of the potential minimum (depth of the buried channel) and its potential can be determined as a function of the various applied biases.

Journal ArticleDOI
TL;DR: The use of polycrystalline silicon layers on low-cost substrates is a promising approach for the fabrication of low cost solar cells using low-carbon steel and graphite as substrates, solar cell structures have been deposited by the thermal decomposition of silane and appropriate dopants as discussed by the authors.

Patent
31 Jan 1975
TL;DR: An anodized article and method of absorbing solar energy comprises an alloy layer of aluminum containing up to 18% by weight silicon having a surface matrix layer of aluminium oxide and crystals of silicon dioxide grown from the alloy extending through, bound in and supported by the aluminum oxide matrix as mentioned in this paper.
Abstract: An anodized article and method of absorbing solar energy comprises an alloy layer of aluminum containing up to 18% by weight silicon having a surface matrix layer of aluminum oxide and crystals of silicon dioxide grown from the alloy extending through, bound in and supported by the aluminum oxide matrix. The anodized article may be made by etching the alloy layer to expose virgin alloy and particularly silicon and electrochemically anodizing the etched alloy to grow silicon dioxide crystals and to form an aluminum oxide supporting matrix around the crystals.