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Showing papers on "Substrate (electronics) published in 1977"


Journal ArticleDOI
TL;DR: In this paper, the In and Sn 3d3/2 and 3d5/2 ESCA peaks and the oxygen 1s peak of Sn-doped In2O3 films were compared with those for In 2O3, SnO, Sn2O2, and Sn3O4 powders.
Abstract: The In and Sn 3d3/2 and 3d5/2 ESCA peaks and the oxygen 1s peak of Sn‐doped In2O3 films were compared with those for In2O3 films and In2O3, SnO, SnO2, and Sn3O4 powders. Comparison of as‐grown with sanded surfaces revealed Sn‐rich surface layers in.those films having good optical and transport properties. These experimental fins are interpreted with a schematic energy‐band model and the assumption that film darkening in Sn‐doped In2O3 films is caused by the formation and growth of an Sn3O4‐like second phase in the bulk. Suppression of these phase could be accomplished by higher substrate temperatures, which permit equilibrium conditions to be attained. Sn‐rich phases to migrate to the films surface, and the tine disproportionates to Sn2+ and Sn4+ ions.

973 citations


Journal ArticleDOI
TL;DR: In this article, a density-functional theory capable of predicting free energies and spatially dependent number densities of simple classical fluids is applied to the case of argon films in the presence of a solid carbon dioxide substrate.
Abstract: A density-functional theory capable of predicting free energies and spatially dependent number densities of simple classical fluids is applied to the case of argon films in the presence of a solid carbon dioxide substrate. For pressures less than the saturated vapor pressure, a new phase transition for which the order parameter is the film thickness is described. The phases are the usual unsaturated film and a one- or two-atomic-layer structure localized at the argon-C${\mathrm{O}}_{2}$ interface.

360 citations


Journal ArticleDOI
TL;DR: In this article, Hoffman et al. measured the internal stresses in thin sputtered films of Ti, Ni, Mo, and Ta and found that the transition from low sputtering pressures to higher working gas pressures occurs at threshold pressures that increase with the atomic mass of the coating material.
Abstract: Measurements of internal stresses in thin sputtered films of Ti, Ni, Mo, and Ta confirm the onset of compression at low working pressures, as reported earlier for Cr [D. W. Hoffman and J. A. Thornton (in press) Thin Solid Films (Jan. 1977)]. Deposition from cylindrical magnetron sputtering sources gives access to a wide range of low working gas pressures with minimal substrate heating. The transition to compressive film stress at low sputtering pressures is abrupt, and occurs at threshold pressures that increase markedly with the atomic mass of the coating material. Moreover, the electrical resistivity and optical reflectance exhibit transitions in their sputtering‐pressure dependence that shift to higher pressures for the heavier elements. It appears therefore that the transitions in film stress, resistivity, and reflectance are general phenomena caused by an underlying change in the deposition process. A peening mechanism due to energetic particle bombardment is suggested. Data are presented for Ti, Ni, Mo, and Ta films, up to 0.4 μm thick, sputtered onto glass substates at a nominal deposition rate of 1 nm/s, over the pressure range 0.13–4.0 Pa of argon.

311 citations


Journal ArticleDOI
TL;DR: In this paper, an experimental method is described for directly measuring the probability of electron emission from the silicon substrate into the SiO2 layer after the electron has fallen through a certain potential drop in traversing the depletion layer and reached the SiSiO2 interface.
Abstract: An experimental method is described for directly measuring the probability of electron emission from the silicon substrate into the SiO2 layer after the electron has fallen through a certain potential drop in traversing the depletion layer and reached the Si‐SiO2 interface. The method is based on optically induced hot‐electron injection in polysilicon‐SiO2‐silicon field‐effect‐transistor structures of reentrant geometry. The emission probability was studied as a function of substrate doping profile, substrate voltage, gate voltage, and lattice temperature. It was found that the hot electrons could be emitted by tunneling as well as by surmounting the Schottky‐lowered barrier. Over‐the‐barrier emission dominates at large substrate voltages, where the emission probability is high, and tunnel emission becomes appreciable and may even dominate at small substrate voltages where the emission probability is low. A simple model was developed based on the assumption that only those hot electrons lucky enough to escape collision with optical phonons were emitted. Using this model, we found that the expression P=A exp(−d/λ) described very well the dependence of the emission probability on doping profile, substrate voltage, and gate voltage. Here A=2.9 is a constant, λ is the optical‐phonon‐electron collision mean free path, d is the distance from the Si‐SiO2 interface where the potential energy is equal to the ’’corrected’’ barrier of (3.1 eV−βEOX1/2 −αEOX2/3ox), βEOX1/2 is the Schottky lowering of the barrier, and αEOX2/3 is a ’’barrier‐lowering’’ term introduced to account for the probability of tunneling. The temperature dependence of the collision mean free path was found to follow the theoretical relationship λ=λo tanh(ER/2kbT), with λo=108 A and ER=0.63 eV. This model is useful for evaluating potential hot‐electron‐related instability problems in IGFET and similar structures.

293 citations


Journal ArticleDOI
TL;DR: In this paper, the optical and photoconductive properties of discharge-produced amorphous silicon (a•Si) of the type used in efficient thin-film solar cells have been studied as a function of a wide range of deposition conditions.
Abstract: Optical and photoconductive properties of discharge‐produced amorphous silicon (a‐Si) of the type used in efficient thin‐film solar cells have been studied as a function of a wide range of deposition conditions The optical absorption, optical band gap, photoconductivity, hydrogen content, and the characteristics of the Si‐H vibrational mode in a‐Si were determined Both substrate temperature in the range ∼200–400 °C and the type of discharge used are found to be important factors in determining the measured optical and photoconductive properties of a‐Si For films produced at substrate temperatures near 200 °C, dihydride bonding occurs, and the optical band gap is about 17 eV As the substrate temerature increases, monohydride bonding is favored, the optical band gap decreases, the optical absorption increases, and the photoconductive properties improve These properties are, in part, associated with the presence of bonded hydrogen For substrate temperatures between 300 and 400 °C, the photoconductive

243 citations


Journal ArticleDOI
TL;DR: In this article, the photoconductivity αph and its dependence on incident light intensity and temperature have been investigated in a series of doped amorphous silicon specimens at a photon energy of 2 eV.
Abstract: The photoconductivity αph and its dependence on incident light intensity and temperature have been investigated in a series of doped amorphous silicon specimens at a photon energy of 2 eV. Specimens were prepared by the glow discharge decomposition of silane at a substrate temperature between 500 and 550 K. Doping was achieved by the addition of controlled amounts of phosphine or diborane during deposition. The primary aim of the work has been to explore the recombination process and its dependence on the known density of state distribution using substitutional doping to control the dark Fermi levels position over a range of 0·8 eV. It is shown that [sgrave]ph attains its optimum level when at a given temperature and intensity the steady-state electron Fermi level has been moved to an energy between 0·35 and 0·30 eV below the mobility edge, ∊ c . At this stage there also occurs a transition from predominantly monomolecular to bimolecular recombination. Both effects appear to be associated with th...

191 citations


Journal ArticleDOI
TL;DR: In this paper, single crystal semiconductors were coated with n-type TiO~ by a chemical vapor deposition technique, and the electron and hole transfer properties across the heterojunction so produced were investigated.
Abstract: Single crystal semiconductors (n-Si, p-Si, n-GaAs, p-GaAs, n-GaP, n-In.P, and n-CdS) were coated with n-type TiO~ by a chemical vapor deposition technique, and the electron and hole transfer properties across the heterojunction so produced were investigated. The quality of the deposited TiO~ film depended upon several factors including temperature and substrate material. When high quality crack-free TiO2 coats were obtained on n-type substrates, the substrate was stabilized with no dissolution during the photo-oxidation of water. However, the oxidation was due o~y to the photoexcitation of the TiO~, and any holes produced in the substrate were not transferred through the TiO~ to the solution. The use of p-type substrates coated with TiO2 as photocathodes was limited by band-bending requirements at the p-n heterojunction and the TiO~-solution interface.

130 citations


Journal ArticleDOI
TL;DR: In this paper, fine-grained nearly stoichiometric monoclinic ZrO2 films were characterized by transmission electron microscopy, X-ray diffraction and electron microprobe analysis and by measuring their dielectric and optical properties.

115 citations


Journal ArticleDOI
TL;DR: In this article, epitaxial silicon films have been grown on single-crystal Si (100) substrates by evaporation from an e-gun source in ultrahigh vacuum and have been doped with gallium and with aluminum from separate oven sources.
Abstract: Epitaxial silicon films have been grown on single‐crystal Si (100) substrates by evaporation from an e‐gun source in ultrahigh vacuum and have been doped with gallium and with aluminum from separate oven sources. Gallium doping profiles have been controlled accurately for substrate temperatures in the range 600–800 °C and for carrier densities in the range 1014–5×1017 cm−3. Examples are given of abrupt changes in doping level. Measured drift mobilities in the films are within 15% of values for bulk silicon. Crystallographic properties of the films are comparable to those of the substrates and are suitable for device applications. Films doped with aluminum exhibit comparable electrical and crystallographic properties, but good control of the doping profile has not been achieved for the range of parameters studied.

108 citations


Journal ArticleDOI
TL;DR: In this paper, a detailed investigation of the properties of films deposited on amorphous glass substrates by the technique of spray pyrolysis was made, and the variation of the electrical transport properties of these films as a function of substrate temperature has been correlated with variations in orientation, cubic/hexagonal phase ratio, and morphology.
Abstract: A detailed investigation has been made of the properties of films deposited on amorphous glass substrates by the technique of spray pyrolysis. The variation of the electrical transport properties of these films as a function of substrate temperature has been correlated with variations in orientation, cubic/hexagonal phase ratio, and morphology. Additional effects of cooling rate, spraying rate, heat‐treatment in hydrogen, and variations in substrate are also considered. By heat‐treatment in hydrogen it is possible to produce films on amorphous glass substrates with an electron density in excess of 1018cm−3 and an electron mobility of 90 cm2/V‐sec at 300°K.

106 citations


Journal ArticleDOI
TL;DR: In this article, columnar growth structure arrayed in row-like order has been detected for films deposited at both angles of incidence, and the columns lie in the plane of incidence in both cases.
Abstract: The topography of silicon oxide films deposited at an angle of incidence of either 60° or 83° has been investigated using transmission electron microscopy. Columnar-growth structure arrayed in rowlike order has been detected for films deposited at both angles of incidence. The columns lie in the plane of incidence in both cases. The column angle of inclination from the normal to the substrate is 35° for the 60° deposition and it is 50° for the 83° deposition. The rows are, on the average, perpendicular to the plane of incidence. The ratio of the column width to the column periodicity is 0.70 for the 60° evaporation and is about 0.20-0.25 for films deposited at an angle of incidence of 83°. It is asserted that the topography of films deposited at the two angles is the primary factor determining the directional orientation of liquid crystals on obliquely deposited silicon oxide.

Journal ArticleDOI
TL;DR: In this article, the surface on which the particles impinge is shown to play a decisive role with respect to the orientation of the grains within each particle and the position of the particle within the coating.

Patent
26 Aug 1977
TL;DR: In this article, a method for fabricating Schottky barrier diodes having a low barrier height was proposed, which includes: precleaning the silicon substrate prior to depositing the tantalum; depositing tantalum at low pressure and low substrate temperature to avoid oxidation of the tantalium; and sintering the contact to reduce any interfacial charges and films remaining between the silicon and tantalum.
Abstract: A silicon semiconductor device having contacts which include tantalum. The tantalum is useful in particular for fabricating Schottky barrier diodes having a low barrier height. The method includes: precleaning the silicon substrate prior to depositing the tantalum; depositing the tantalum at low pressure and low substrate temperature to avoid oxidation of the tantalum; and sintering the contact to reduce any interfacial charges and films remaining between the silicon and tantalum. When a metal which reacts with silicon during processing, such as aluminum, is used as interconnection metallurgy, a layer of chrome must be deposited between the tantalum and aluminum.

Patent
18 Apr 1977
TL;DR: In this article, a method of depositing a hard metal alloy is described where a volatile halide of titanium is reduced off the surface of a substrate and then reacted with boron, carbon or silicon to effect the deposition on a substrate of an intermediate compound of titanium in a liquid phase.
Abstract: A method of depositing a hard metal alloy is described wherein a volatile halide of titanium is reduced off the surface of a substrate and then reacted with a volatile halide of boron, carbon or silicon to effect the deposition on a substrate of an intermediate compound of titanium in a liquid phase. The liquid compound on the substrate is then reacted in the presence of hydrogen to produce a hard deposit containing titanium and boron, carbon or silicon. Also described are products which may be produced by the above method.

Journal ArticleDOI
TL;DR: In this paper, the properties of planar magnetron, rf-sputtered Al2O3 films were investigated, including deposition uniformity, substrate bias potential, impurity content by 4He+ backscatter analysis, H2 content by proton-proton scattering, microstructure, C-V characteristics on Si, dielectric constant and breakdown voltage, resistivity, refractive index, defect density, etch rate, density, intrinsic film stress, step coverage, microhardness, and uv and ir absorption.
Abstract: In a preliminary study, the following properties of planar magnetron, rf‐sputtered Al2O3 films were investigated: deposition uniformity, floating substrate bias potential, Al:O ratio and impurity content by 4He+ backscatter analysis, H2 content by proton–proton scattering, microstructure, C–V characteristics on Si, dielectric constant and breakdown voltage, resistivity, refractive index, defect density, etch rate, density, intrinsic film stress, step coverage, microhardness, and uv and ir absorption. From this data, it was concluded that these films exhibit potential for use in abrasive or semiconductor chip protection applications. Their use as dielectric passivation, however, is somewhat in doubt under the deposition configuration used in this study. Possible means of film optimization will be discussed.

Patent
31 Mar 1977
TL;DR: In this paper, a non-epitaxial bipolar integrated circuit (NEPIC) is proposed, which consists of a silicon substrate of one-type of conductivity, recessed silicon dioxide regions extending into the substrate and laterally enclosing at least one silicon substrate region of opposite-type conductivity.
Abstract: A method for forming a non-epitaxial bipolar integrated circuit comprising first forming in a silicon substrate of one-type of conductivity, recessed silicon dioxide regions extending into the substrate and laterally enclosing at least one silicon substrate region of said one-type conductivity. Then, forming by ion implantation the first region of opposite-type conductivity which is fully enclosed laterally by said recessed silicon dioxide. This region is formed by directing a beam of ions of opposite-type conductivity impurity at said enclosed silicon region at such energy and dosage levels that the opposite conductivity-type impurity introduced into the substrate in said region will have a concentration peak at a point below the surface of this first region. Then, a region of said one-type conductivity is formed which extends from the surface into said first opposite-type conductivity region to a point between said concentration peak and said surface. Next, a second region of said opposite-type conductivity is formed which extends from the surface part way into said region of one-type conductivity. Preferably, the ion beam energy level is at least one MeV, and said concentration peak is at least one micron below the surface. It is further preferable that the energy and dosage levels of the beam of ions are selected so that the opposite-type conductivity impurity has a more gradual distribution gradient between the peak and the surface than between the peak and the junction of the first region with the substrate.

Journal ArticleDOI
TL;DR: In this article, the hardness of hollow cathode discharge films was characterized using X-ray diffraction, transmission electron microscopy, electron diffraction and Auger electron spectroscopy and electron probe microanalysis.

Patent
21 Nov 1977
TL;DR: In this article, a multigrained, directionally solidified refined metallurgical silicon (DS/RMS) is obtained, with boules being pulled from a melt thereof for use as a low-cost substrate.
Abstract: Epitaxial and diffusion-type planar diodes and solar cells utilize low-cost refined metallurgical silicon substrates having a substantially higher impurity content than conventional high-cost, high purity semiconductor grade silicon. The epitaxial type products have an n-on-p-on-p substrate configuration, while the diffusion-type products have pentavalent impurities diffused therein to form a p-n junction in the low cost silicon substrate. One embodiment employs a multigrained refined metallurgical silicon (RMS) prepared by precipitating essentially iron-free silicon platelets from a solution of metallurgical grade silicon in molten aluminum, melting said refined platelets, in contact with a silica slag and pulling silicon boules from a melt of said refined metallurgical silicon (RMS). By directionally solidifying the refined silicon-slag melt, a multigrained, directionally solidified refined metallurgical silicon (DS/RMS) is obtained, with boules being pulled from a melt thereof for use as said low-cost substrate. The DS/RMS may also be re-melted and directionally solidified a second time with the boules being pulled from said twice directionally-solidified material being a desirable, low-cost, single crystal material suitable for use as said substrate for planar diode and solar cell applications.

Patent
18 Aug 1977
TL;DR: In this paper, an electrical resistor is made from the resistor material by applying the material to a substrate and firing the coated substrate to a temperature at which the glass melts, the substrate has on a surface thereof a film of glass having the particles of the mixture embedded therein and dispersed therethroughout.
Abstract: A vitreous enamel resistor material comprising a mixture of vitreous glass frit and fine particles of a mixture of zinc oxide (ZnO) and a material which will provide either lithium, tin, nickel, aluminum, indium, titanium, tantalum, zinc, gallium, vanadium, tungsten, or molybdenum. An electrical resistor is made from the resistor material by applying the material to a substrate and firing the coated substrate to a temperature at which the glass melts. Upon cooling, the substrate has on a surface thereof a film of glass having the particles of the mixture embedded therein and dispersed therethroughout. The resistor material provides a resistor having a wide range of resistivities with a low temperature coefficient of resistance and a low voltage coefficient of resistance.

Patent
27 Dec 1977
TL;DR: In this paper, the authors describe a gallium aluminum arsenide-gallium arsenide and germanium-germanium solar cell and fabrication process where the deposition of a layer of gallium aluminium arsenide establishes a first PN junction in the GaAs of one bandgap energy on one side of the gallium arsenides substrate.
Abstract: The specification describes a gallium aluminum arsenide-gallium arsenide-germanium solar cell and fabrication process therefor wherein the deposition of a layer of gallium aluminum arsenide establishes a first PN junction in the GaAs of one bandgap energy on one side of a gallium arsenide substrate, and the deposition of a layer of germanium establishes a second PN junction in Ge of a different bandgap energy on the other side of the GaAs substrate. The two PN junctions are responsive respectively to different wavelength ranges of solar energy to thus enhance the power output capability of a single wafer (substrate) solar cell. Utilization of the Group IV element germanium, as contrasted to compound semiconductors, simplifies the process control requirements relative to known prior art compound semiconductor processes, and germanium also provides a good crystal lattice match with gallium arsenide and thereby maximizes process yields. This latter feature also minimizes losses caused by the crystal defects associated with the interface between two semiconductors.

Journal ArticleDOI
TL;DR: In this paper, a new technique using radioactive 31Si (half-life = 2.62 h), formed in a nuclear reactor, as a marker for studying silicide formation is described.
Abstract: A new technique using radioactive 31Si (half-life =2.62 h), formed in a nuclear reactor, as a marker for studying silicide formation is described. A few hundred angstroms of radioactive silicon is first deposited onto the silicon substrate, followed immediately by the deposition of a few thousand angstroms of the metal. When the sample is heated, a silicide is first formed with the radioactive silicon. Upon further silicide formation, this band of radioactive silicide can move to the surface of the sample if silicide formation takes place by diffusion of the metal or by silicon substitutional and/or vacancy diffusion. However, if the band of radioactive silicide stays at the silicon substrate interface it can be concluded that silicon diffuses by interstitial and/or grain-boundary diffusion. This technique was tested by studying the formation of Ni2Si on silicon at 330 °C. From a combination of ion-beam sputtering, radioactivity measurement, and Rutherford backscattering it is found that the band of radioactive silicide moves to the surface of the sample during silicide formation. From these results, implanted noble-gas marker studies and the rate dependence of Ni2Si growth on grain size, it is concluded that nickel is the dominant diffusing species during Ni2Si formation, and that it moves by grain-boundary diffusion.

Patent
27 Jul 1977
TL;DR: In this paper, a thin film of silicon is deposited upon a substrate, where the substrate therefor is an alkaline earth metal aluminosilicate glass consisting essentially, by weight, of about 55-75% SiO 2, 5-25% Al 2 O 3, and at least one alkaline Earth metal oxide selected from the group consisting of 9-15% CaO, 14-20% SrO, 18-26% BaO, and mixtures thereof in a total amount equivalent on a molar basis.
Abstract: The present invention is related to the fabrication of electronic devices wherein a thin film of silicon is deposited upon a substrate. More particularly, the invention is directed to such devices wherein the substrate therefor is an alkaline earth metal aluminosilicate glass consisting essentially, by weight, of about 55-75% SiO 2 , 5-25% Al 2 O 3 , and at least one alkaline earth metal oxide selected from the group consisting of 9-15% CaO, 14-20% SrO, 18-26% BaO, and mixtures thereof in a total amount equivalent on a molar basis to 9-15% CaO.

Journal ArticleDOI
TL;DR: In this paper, a 0.6-μm-thick silicon layer was obtained in large areas at 530 °C by the dissolution and transport of an evaporated Si layer through an Al film using the Si/Al (evaporated)Si (evorated) structure.
Abstract: Epitaxial and uniform growth of a 0.6‐μm‐thick silicon layer was obtained in large areas at 530 °C by the dissolution and transport of an evaporated Si layer through an Al film using the Si/Al (evaporated)Si (evaporated) structure. Channeling measurements showed that the grown Si layers are well ordered and epitaxial with the underlying 〈100〉 substrate. The lateral uniformity is verified by scanning electron microscopy and electron microprobe measurements. Electrical measurements indicate that the grown layer is p type with 2×1018 cm−3 hole concentration and 65 cm2/V sec Hall mobility.

Patent
Hiroshi Shibata1
29 Nov 1977
TL;DR: In this paper, a planar configuration forming technique employing irradiation of a radiation such as light, electron beam or X-rays to form a residual layer and ion beams are applied to the upper surface or the substrate at an incidence angle less than 90 degrees so that a non-etching region is formed at the region of the substrate other than the region around and beneath said residual layer according to mutual relationships between the configuration of the residual layers and the incidence angle of the ion beams.
Abstract: A semiconductor layer different in material from a semiconductor substrate formed on at least one part of the surface of the substrate is partially removed in accordance with a planar configuration forming technique employing irradiation of a radiation such as light, electron beam or X-rays to form a residual layer and ion beams are applied to the upper surface or the substrate at an incidence angle less than 90 degrees so that a non-etching region is formed at the region of the substrate other than the region around and beneath said residual layer according to mutual relationships between the configuration of the residual layer and the incidence angle of the ion beams.

Patent
13 Oct 1977
TL;DR: In this article, a method of depositing a silicon oxide, such as silicon dioxide, layer on a substrate by utilizing a glow discharge in oxygen and a dielectric precursor having the formula ##STR1## wherein x is an integer of 1 to 4 and each R is independently selected from the group consisting of H, CH 3, and C 2 H 5.
Abstract: This invention pertains to a method of depositing a silicon oxide, such as silicon dioxide, layer on a substrate by utilizing a glow discharge in oxygen and a dielectric precursor having the formula ##STR1## wherein x is an integer of 1 to 4 and each R is independently selected from the group consisting of H, --CH 3 , and --C 2 H 5 .

Patent
25 May 1977
TL;DR: In this paper, a deformographic membrane display system was proposed, in which a semiconductor substrate, for example silicon, has an insulating layer such as SiO2 formed thereon with an array of holes formed in the substrate.
Abstract: A MEMBRANE DEFORMOGRAPHIC DISPLAY, AND METHOD OF MAKING ABSTRACT OF THE DISCLOSURE A deformographic membrane display system in which a semiconductor substrate, for example silicon, has an insulating layer such as SiO2 formed thereon with an array of holes formed in the insulating layer. Alternatively, the insulating layer may be omitted, with the holes being formed in the substrate. A reflec-tive membrane, including a thin metal layer, is formed over the surface in which the holes are formed. Electrodes are formed in the silicon substrate directly beneath or in each of the holes. Control circuitry, which for example, may be formed utilizing metal oxide semiconductor field effect transistor (MOSFET) technology and/or bipolar technology, is formed in the silicon substrate for selectively energizing the electrodes. The portion of the membrane over a given hole is deformed in response to the electrode thereunder being energized by the control circuitry.

Patent
21 Oct 1977
TL;DR: In this paper, a method of manufacturing a silicon gate MIS device providing automatic formation and alignment of the gate structure during formation of adjacent impurity regions is presented, where a deposition mask in the form of the photoresist mask or the gate silicon oxide is used to control the deposition of impurities within predetermined surface areas of the substrate which are spaced a predetermined distance from the silicon gate boundaries.
Abstract: A method of manufacturing a silicon gate MIS device providing automatic formation and alignment of the gate structure during formation of adjacent impurity regions. In a preferred embodiment, the process is for the gate structure and source and drain of silicon gate FETs. The layered gate constituents-- typically oxide and silicon-- are formed on a semiconductor wafer. A photoresist mask which is larger than the desired gate size is formed on the silicon and the silicon is etched to a predetermined size beneath the overhanging mask. A deposition mask in the form of the photoresist mask or the gate silicon oxide and which is of the same size as the photoresist mask, is used to control the deposition of impurities within predetermined surface areas of the substrate which are spaced a predetermined distance from the silicon gate boundaries. By diffusion, the impurities are driven into the substrate to the desired depth to complete the source and drain, which are thereby driven laterally into coincidence with the gate boundaries. The aligned, non-overlapping relationship of the gate structure with the source and drain minimizes gate overlap capacitance.

Patent
Arthur Mendel1, Roger W. Lange1
02 Dec 1977
TL;DR: In this article, a thin layer chromatographic plate housing a substrate and bonded there to a layer of discrete, spherical inorganic metal oxide particles bonded to the substrate by a metal oxide binder is described.
Abstract: A thin layer chromatographic plate housing a substrate and bonded there to a layer of discrete, spherical inorganic metal oxide particles bonded to the substrate by an inorganic metal oxide binder the particles and binder being SrO2, TiO2, ZrO2, or Al2 O3.

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the rate of germanide formation and the composition of the resulting compounds when thin palladium films, vacuum evaporated onto various germanium substrates, were annealed at temperatures from 170 to 270°C for 10 min to 27 h.

Journal ArticleDOI
TL;DR: In this article, the authors investigated nine metal-silicon systems for solid phase epitaxy with a sample configuration of a layer of amorphous silicon deposited onto a silicon crystal substrate interposed with a metal layer.