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Showing papers on "Substrate (electronics) published in 1978"


Journal ArticleDOI
TL;DR: In this paper, the impurity distribution of the oxygen-implanted silicon substrate was analyzed by auger spectroscopy, and the epitaxially-grown silicon layer on this substrate showed a good monocrystalline structure and a 19-stage c.m.o.s. ring oscillator exhibited high performance in operation.
Abstract: Buried SiO2, layers were formed by oxygen-ion (14O+) implantation into silicon. The impurity distribution of the oxygen-implanted silicon substrate was analysed by auger spectroscopy. The epitaxially-grown silicon layer on this substrate showed a good monocrystalline structure, and a 19-stage c.m.o.s. ring oscillator exhibited high performance in operation.

492 citations


Journal ArticleDOI
Kurt E. Petersen1
TL;DR: In this paper, the authors describe fabrication procedures for constructing thin, electrostatically deflectable SiO 2 membranes on a silicon wafer in a very controllable manner, and three examples of typical applications for the micromechanical structures are discussed.
Abstract: New fabrication procedures ate described for constructing thin, electrostatically deflectable SiO 2 membranes on a silicon wafer in a very controllable manner. Performance parameters of these membranes are analyzed and three examples of typical applications for the micromechanical structures are discussed: a light modulator array, a micromechanical voltage-controlled switch, and the measurement of the mechanical properties of thin insulating films unconstrained by the substrate. Since the lifetimes of the membranes can be very long (>1010cycles), their dimensions very small (8.3 µm long, 950 A thick have been demonstrated), and the fabrication technique is simple and versatile, the potential applicability of such devices seems promising.

481 citations


Journal ArticleDOI
E. Bassous1
TL;DR: In this paper, the anisotropic etching of single crystal silicon oil (loo) and orientation in a solution of pyrocatechol, ethylene di:nnine, and water is reviewed and the fabrication of three novel types of micro-structures is described in detail.
Abstract: The anisotropic etching of single crystal silicon oil ((loo) and (110) orientation in a solution of pyrocatechol, ethylene di:nnine, and water is reviewed and the fabrication of three novel types of nicro- structures is described in detail. Controlled etching of Si, whicpi is re- quired to fabricate devices with a predictable geometry depends on : an accurately oriented, defect-free substrate, a well-defined and ali.ped pattern geometry, and rigorously clean etching conditions. Chnven- tional IC processing methods were used to fabricate: 1) a high-precision circular orifice in a thin pfSi membrane for use as an ink jet ncmle, 2) a multisocket miniature electrical connector with octahedral 'c wities suitable for cryogenic applications, and 3) multichannel anri;ys in (100) and (110) Si useful in various applications, eg., charge elecdttodes, physical masks, and optical devices. To make some of these strcwlures, a novel bonding technique to fuse silicon wafers with phosphalsilicate glass films was developed.

380 citations


Journal ArticleDOI
TL;DR: In this article, a table of the standard heats of formation for metal silicides has been compiled, which can also be correlated with the mean electronegativity of the metal, which offers a convenient empirical method to predict whether a metal will react with SiO 2.
Abstract: Thin films of Co, Cr, Cu, Fe, Hf, Mn, Nb, Ni, Pd, Pt, Ti, V and Zr vacuum-deposited on SiO 2 substrates of thermally oxidized Si wafers and/or fused quartz were annealed under vacuum at about 800°C for 3 hr and then analyzed by backscattering spectrometry and scanning electron microscopy. It is found that Hf, Nb, Ti, V and Zr react with SiO 2 . The result is a thin layer of metal silicide sandwiched between the substrate and a top layer of metal oxide. The other investigated metals apparently do not react. A table of the standard heats of formation for metal silicides has been compiled. These values were used to calculate the free energy change during reaction. The thermodynamic predictions are consistent with experimental observation. The results can also be correlated with the mean electronegativity of the metal, which offers a convenient empirical method to predict whether a metal will react with SiO 2 . It is found that metals with an average electronegativity (average of Allred-Rochow, relative compactness and Pauling electronegativities) of less than 1.5 on the Pauling scale react with the SiO 2 substrate.

283 citations


Journal ArticleDOI
TL;DR: In this paper, the scattering of sputtered atoms by the sputtering gas has been modelled to obtain values for the distances which the atoms travel normal to the target before their energies are reduced to the thermal energy of the gas.
Abstract: The scattering of sputtered atoms by the sputtering gas has been modelled to obtain values for the distances which the atoms travel normal to the sputtering target before their energies are reduced to the thermal energy of the gas. This distance increases with the mass and energy of the sputtered atom and with decreasing gas pressure; for a 5‐eV atom of mass 80, it decreases from 42 cm at an argon pressure of 0.1 Pa to 0.44 cm at 10 Pa. For most diode sputtering configurations, the sputtered atoms are thermalized before reaching the substrate and the transport to the substrate is by diffusion. Relative deposition rates for substrates situated behind apertures or masks in these diffusive sputtering situations have been measured and compared with the solid angles subtended at the substrate by the effective aperture. The agreement between relative values is very good. Thus, the solid angle provides a simple measure for determining the effect of a mask on the deposition profiles. Significant changes in rates and profiles are possible. With a 5‐cm‐square aperture, the rate at the center decreases by 50% as the substrate moves 2 cm away from the aperture plane and there is a 30% variation in rate over the substrate. It is impossible to obtain a sharply defined edge using a mechanical mask.

277 citations


Journal ArticleDOI
TL;DR: In this paper, the photoluminescence of amorphous silicon was investigated and the luminescence intensity and spectral line shape were shown to be sensitive to many deposition variables, in particular the power coupled into the discharge, the concentration of silane in the gas stream, and the deposition substrate temperature.
Abstract: The photoluminescence of plasma-deposited amorphous silicon is investigated. The luminescence intensity and spectral line shape are shown to be sensitive to many deposition variables, in particular the power coupled into the discharge, the concentration of silane in the gas stream, and the deposition substrate temperature. Maximum intensity is obtained in samples deposited with low power (\ensuremath{\sim}1 W), a silane concentration of \ensuremath{\gtrsim} 10% and a deposition temperature of 200-300\ifmmode^\circ\else\textdegree\fi{}C. ESR studies show that the luminescence intensity is determined by competing nonradiative transitions to localized defect states whose density varies with deposition conditions. The presence of defect states is related to the way hydrogen is incorporated into the samples, but the details of the defect structure are not yet clear. Oxygen impurities are observed to give a broad, weak luminescence peak centered near 1.1 eV. It is suggested that the active oxygen centers are similar to the charged defects postulated for chalcogenide glasses.

253 citations


Journal ArticleDOI
TL;DR: In this article, secondary ion mass spectroscopy (SIMS) has been used to measure the diffusion of deuterium in hydrogenated amorphous silicon, showing that degradation of these films due to hydrogen out-diffusion at 100°C will not be significant until after more than 104 years.
Abstract: Secondary ion mass spectroscopy (SIMS) has been used to measure the diffusion of deuterium in hydrogenated amorphous silicon. For a film deposited in a dc glow discharge in SiH4 at a substrate temperature of 315 °C, the diffusion data fits D (T) =1.17×10−2 exp(−1.53 eV/kT) cm2/s. This result implies that degradation of these films due to hydrogen out‐diffusion at 100 °C will not be significant until after more than 104 years.

250 citations


Journal ArticleDOI
TL;DR: In this paper, the Raman spectra have been obtained from thin films of silicon-hydrogen and siliconhydrogen-deuterium alloys deposited from low pressure, r.f. excited plasmas in mixtures of SiH4/Ar and SiH 4/D2/Ar respectively.
Abstract: Infra-red and Raman spectra have been obtained from thin films of silicon-hydrogen and silicon-hydrogen-deuterium alloys deposited from low pressure, r.f. excited plasmas in mixtures of SiH4/Ar and SiH4/D2/Ar respectively. The spectra are analysed using a valence-force-field model based on effective force constants determined from SiH4. For alloys deposited onto substrates held at 25°C it is concluded that the structure is best described as a pseudobinary alloy of the form (Si)x(Si2H4)1_ x . In contrast, for material deposited on to a substrate at a temperature T s⩾250°C, the hydrogen is incorporated onto Si-sites containing predominantlv one H-atom.

167 citations


Patent
07 Apr 1978
TL;DR: An epitaxial composite comprising a thin film of single crystal Group III-V wide band-gap compound semiconductor or semiconductor alloy on single crystal, electrically insulating oxide substrates such as sapphire, spinel, BeO, ThO2, or the like, and on IIIV semiconductors or alloys as discussed by the authors.
Abstract: An epitaxial composite comprising a thin film of single crystal Group III-V wide band-gap compound semiconductor or semiconductor alloy on single crystal, electrically insulating oxide substrates such as sapphire, spinel, BeO, ThO2, or the like, and on III-V semiconductors or alloys. The thin film may be produced in situ on a heated substrate by reaction of an organic compound containing the Group III constituent, typically tfhe alkyl metal organic, such as trimethylgallium and/or triethylgallium with a Group V hydride such as arsine, phosphine and/or stibine.

145 citations


Journal ArticleDOI
TL;DR: In this paper, a bending-beam technique combined with the capacitance method was used for continuous determination of the internal stress during vacuum deposition of ultra-thin silver films, and a sensitivity improvement of about two orders of magnitude was achieved compared with results reported previously.

119 citations


Journal ArticleDOI
TL;DR: In this paper, a detailed analysis by reflection electron diffraction (RED), x-ray diffraction and scanning electron microscopy (SEM) was performed on thin ZnO layers which were formed under reactive and nonreactive rf•sputtering conditions.
Abstract: Detailed analysis by reflection electron diffraction (RED), x‐ray diffraction (XRD), and scanning electron microscopy (SEM) was performed on thin ZnO layers which were formed under reactive and nonreactive rf‐sputtering conditions. A variety of textures and morphologies were observed. 100% reproducible piezoelectric layers, preferred oriented with [002] perpendicular to the layer within 7°, could be obtained by reactive sputtering from a zinc target at rf power of 150 W, oxygen‐argon atmosphere of 8×10−3 Torr with 35% O2, and with the glass substrate being kept at room temperature by a cooling device. No differences in the surface‐acoustic‐wave properties were found between reactively and nonreactively sputtered ZnO layers which had similar texture and morphology. SEM techniques proved to be extremely misleading in the study of this type of layer; there is no relationship between an observed columnar structure and the texture of the layer which is determined by RED, and also between the column thickness (...

Patent
13 Oct 1978
TL;DR: In this article, the authors proposed a method to separate thin double heterostructure (Al,Ga)As wafers into bars of diodes by forming channels of substantially parallel sidewalls about 1 to 4 mils deep into the surface of the n-GaAs substrate.
Abstract: Thick double heterostructure (Al,Ga)As wafers comprising layers of gallium arsenide and gallium aluminum arsenide on a metallized n-GaAs substrate are separated into individual devices for use as diode lasers. In contrast to prior art techniques employed with thinner wafers of mechanically cleaving the wafer in mutually orthogonal directions, the wafer is first separated into bars of diodes by a process which comprises (a) forming channels of substantially parallel sidewalls about 1 to 4 mils deep into the surface of the n-GaAs substrate (b) etching into the n-GaAs substrate with an anisotropic etchant to a depth sufficient to form V-grooves in the bottom of the channels and (c) mechanically cleaving into bars of diodes. The cleaving may be done by prior art techniques using a knife, razor blade or tweezer edge or by attaching the side of the wafer opposite to the V-grooves to a flexible adhesive tape and rolling the assembly in a manner such as over a tool of small radius. The diode bars may then, following passivation, be further cleaved into individual diodes by the prior art technique of mechanically scribing and cleaving. Processing in accordance with the invention results in good length definition and uniformity, high device yields and low density of striations on laser facets. The inventive process permits handling of thicker wafers on the order of 6 to 10 mils or so, which are cleaved only with great difficulty by prior art techniques. Such thicker wafers are less susceptible to breaking during handling and permit fabrication of shorter diode (cavity) length, which in turn is related to lower threshold current for device operation.

Journal ArticleDOI
TL;DR: In this article, the epitaxial layers of GaAs were grown on GaAs(100) at substrate temperatures ranging from 400° to 600°C by molecular beam epitaxy.

Patent
15 Feb 1978
TL;DR: In this paper, a radiation detector includes a detection element having a single crystal silicon substrate with an impurity concentration of less than 1×10 14 cm -3, a metal layer formed on one surface of the substrate to form a surface barrier there between and an electrode layer mounted on the opposite surface of a substrate.
Abstract: A radiation detector includes a detection element having a single crystal silicon substrate with an impurity concentration of less than 1×10 14 cm -3 , a metal layer formed on one surface of the substrate to form a surface barrier therebetween and an electrode layer mounted on the opposite surface of the substrate. Between the metal layer and electrode layer there is not applied a bias.

Journal ArticleDOI
S. I. Raider1, R. Flitsch1
TL;DR: In this article, the composition and width of the interfacial region formed between thin thermally-grown oxide films and single-crystal Si substrates were characterized by means of x-ray photoelectron spectroscopy.
Abstract: The composition and width of the interfacial region formed between thin thermally-grown oxide films and single-crystal Si substrates were nondestructively characterized by means of x-ray photoelectron spectroscopy. Data obtained from variations in core-level binding energies, from variations in photoelectron line intensities, and from variations in photoelectron linewidths indicate the presence of a nonstoichiometric oxide-Si transition region. The composition and width of this region are dependent upon substrate orientation, but are invariant with change in other oxidation processing parameters. Transition regions formed on 〈100〉 oriented substrates are narrower and more completely oxidized than those formed on 〈111〉 oriented substrates. Although both Si-Si bonds and SiO-Si groups are present in this nonstoichiometric region, they do not appear to be a mixture of Si and SiO2. Instead, a continuous distribution of Si tetrahedra, Si-(O)x(Si)4-x, are formed, in which x changes from 0 to 4 as one proceeds from the substrate to the stoichiometric SiO2 film.

Journal ArticleDOI
TL;DR: In this article, a He+ ion backscattering study of the molybdenum-silicide formation by interaction of a thin molydenum layer and a silicon 〈111〉 wafer was presented.
Abstract: Silicon‐metal systems are highly susceptible to solid‐solid reactions which modify their electrical and mechanical properties. Although many works are dealing with silicide formation, the molybdenum‐silicon system has not yet been investigated in detail to our knowledge. In this paper we present a He+ ion backscattering study of the molybdenum‐silicide formation by interaction of a thin molybdenum layer and a silicon 〈111〉 wafer. The silicide phases Mo3Si and MoSi2 have been identified by x‐ray diffraction and transmission electron microscopy. Surface transformations were observed by scanning electron microscopy. For an 800‐A Mo layer sputter deposited on silicon, we have found a time‐square growth rate for MoSi2 with an average activation energy of 2.4 eV in the temperature range 475–550 °C. The fundamental roles of the cleaning of the silicon surface, of the substrate temperature during sputtering, and of the stresses in the layer are pointed out.

Patent
02 Mar 1978
TL;DR: In this article, a semiconductor wafer is provided with a substrate of one conductivity type, a first layer of opposite conductivity and high impurity concentration formed thereon, and a second layer of either conductivity types but lower concentration formed over the first layer.
Abstract: Disclosed is a method of isolating portions of integrated circuits which permits closely packed structures. A semiconductor wafer is provided with a substrate of one conductivity type, a first layer of opposite conductivity type and high impurity concentration formed thereon, and a second layer of either conductivity type but lower concentration formed over the first layer. The major surfaces of the semiconductor layers are parallel to the (110) plane. Narrow grooves with sidewalls in the (111) plane are etched into the first layer. A shallow diffusion of impurities of the same conductivity type as the first layer is performed in the sidewalls and bottom of the grooves which permits the first layer to be contacted from the surface of the second layer. The groove is then etched further until it extends into the underlying substrate. Impurities of the same conductivity type as the substrate are diffused into the bottom and sidewalls of the grooves. The concentration of these impurities is chosen so that a chanstop region is formed in the substrate without appreciably affecting electrical conductivity between the first layer and the regions formed by the previous diffusion.

Patent
06 Apr 1978
TL;DR: In this article, a memory cell, having a doped amorphous silicon layer, is formed on a thin layer of silicon alloy which is on a single crystal silicon substrate.
Abstract: A memory cell, having a doped amorphous silicon layer, is formed on a thin layer of silicon alloy which is on a single crystal silicon substrate. The cell is programmed by applying a voltage between a surface contact and the substrate to cause a crystal column to form in the amorphous layer between the substrate and the contact by solid-phase epitaxial growth. A diode is formed between the contact and the substrate by the selection of impurity levels and conductivity type of the amorphous layer and substrate and the selection of the silicon alloy. The cross-sectional area of the column is selectable to provide a multi storage level cell.

Patent
12 Jul 1978
TL;DR: An N-channel double level poly, MOS read only memory or ROM array is electrically programmable by floating gates which are interposed between the gate oxide and control gates formed by polycrystalline silicon row address lines as mentioned in this paper.
Abstract: An N-channel double level poly, MOS read only memory or ROM array is electrically programmable by floating gates which are interposed between the gate oxide and control gates formed by polycrystalline silicon row address lines. The cells may be electrically programmed by applying selected voltages to the source, drain, control gate and substrate. A very dense array is obtained by a simplified manufacturing process which is generally compatible with standard N-channel silicon gate technology. Parallel strips of gate oxide, polycrystalline silicon, and nitride oxidation mask are applied, field oxide is grown, then a perpendicular pattern of strips is etched, removing field oxide as well as parts of the original strips, providing a diffusion mask. The second level poly is then applied as strips overlying the original strips.

Journal ArticleDOI
TL;DR: The lattice parameter of the epilayer can be made to match that of the substrate at a given composition such as GaxInl-xP / GaAs as discussed by the authors.
Abstract: In recent years research on the epitaxial growth of IIIjV alloys has con­ centrated on those systems capable of producing lattice-matched hetero­ structures. The most important alloy of this type is AlxGal-xAs because the nearly exact lattice-parameter match between GaAs (ao = 5.654) and AlAs (ao = 5.661) allows the growth of lattice-matched heterostructures with nearly ideal interfaces and direct bandgap energies covering an important range for optoelectronic devices from 1 .43 to ,..", 2.0 eV. Other systems for which the lattice parameter of the epilayer can be made to match that of the substrate at a given composition such as GaxInl-xP / GaAs, or for a range of compositions, such as GaxIn 1 xAsyP 1 y/InP, are in much earlier stages of development. The ability to grow high quality lattice-matched AlxGa1-xAs heterostructures has resulted in dramatic improvements in the performance of such optoelectronic devices as lasers, high radiance IR LEDs for optical communication applications, visible LEDs, and integrated optics elements and circuits (1). In addition, two-layer devices where the top AlxGal-xAs layer acts to reduce surface recombination and to transmit effectively bandgap light to the junction have resulted in solar cells with air mass zero efficiencies of 19% (2) versus 14% for the best Si devices. If these could be produced cheaply, they could have significant impact on the feasibility of terrestrial photo voltaic solar energy converSlOn. A number of techniques used for the epitaxial growth of IIIjV semi­ conductors might be applied to the growth of AlxGal-xAs, including liquid phase, vapor phase, and molecular beam expitaxial growth (LPE, VPE, and MBE, respectively). Nearly all of the devices listed above are fabricated in AlxGal-xAs grown by the LPE technique. The LPE tech­ nique for a multilayer structure consists of a series of individual growth

Patent
28 Mar 1978
TL;DR: In this article, a light-emitting device consisting of a sapphire substrate, an epitaxial layer of monocrystalline semiconductor p-type gallium nitride, and a layer of semiconductor-type aluminum nitride was presented.
Abstract: A semiconductor light-emitting device comprising a sapphire substrate, an epitaxial layer of monocrystalline semiconductor p-type gallium nitride deposited on the substrate, and a layer of semiconductor-type aluminum nitride, deposited on the semiconductor gallium nitride layer and forming an injecting heterojunction therewith. The device emits bright blue light.

Journal ArticleDOI
TL;DR: In this paper, GaSb was successfully grown by molecular beam epitaxy, and the energy gap measured by photoabsorption showed a downward bowing as a function of the composition.
Abstract: GaSb and GaSbxAs1-x single crystal thin films were successfully grown by molecular beam epitaxy. Undoped GaSb showed p-type conduction, and Te was found to be effective as a donor impurity for the MBE-grown GaSb. An in-depth profile of the electrical property of these films revealed that many defects are contained in the epitaxial layer near the interface between the grown layer and the substrate. GaSbxAs1-x films with entire composition were prepared, and the energy gap measured by photoabsorption shows a downward bowing as a function of the composition.

Patent
03 Nov 1978
TL;DR: In this article, a silicon wafer is provided at the contact areas of its front surface with respective pads each comprising a base layer of aluminum, a first intermediate layer of chromium or titanium, a second intermediate layers of nickel and an outer layer of gold or palladium.
Abstract: A silicon wafer, having a front surface with disjointed contact areas and a uniform rear surface, is provided at the contact areas of its front surface with respective pads each comprising a base layer of aluminum, a first intermediate layer of chromium or titanium, a second intermediate layer of nickel and an outer layer of gold or palladium. The rear surface is covered with a base layer of gold (or of a gold/arsenic alloy in the case of N-type silicon), a first intermediate layer of chromium, a second intermediate layer of nickel and an outer layer of gold or palladium to which a film of low-melting bonding agent (lead/tin solder) is applied. After testing and elimination of unsatisfactory wafer sections, the remaining sections are separated into dies placed on a conductive substrate; an extremity of a respective terminal lead, encased in a similar bonding agent, is then placed on the outer layer of each contact pad. All soldering operations are simultaneously performed in a furnace.

Journal ArticleDOI
TL;DR: In this article, the microstructure and magnetic properties of electroless Co-P films (∼100 to 1000 A) were examined and the squareness and coercivity characterizing the magnetic hysteresis were found to correlate with the size and nature of the microcrystallites making up the film.
Abstract: The microstructure and magnetic properties of electroless Co‐P films (∼100 to 1000 A) deposited on an aluminum base substrate are examined. The squareness and coercivity characterizing the magnetic hysteresis are found to correlate with the size and nature of the microcrystallites making up the film. It is argued that this correlation is due to coupling between the microcrystallites.

Patent
Ingrid E. Magdo1, Steven Magdo1
04 Dec 1978
TL;DR: In this article, a self-supporting silicon mask is formed by forming, at a surface of a planar silicon substrate, a silicon layer having a higher concentration of conductivity-determining impurities than the substrate beneath the layer, applying to selected portions of the other surface of the substrate an etchant which preferentially etches silicon having lower concentrations of conductivities determining impurities to form at least one recess extending through the substrate to the silicon layer, and then etching from the surface of said silicon layer opposite the substrate recess to form patterns of openings extending
Abstract: In the fabrication of semiconductor integrated circuits, a method is provided for forming a self-supporting silicon mask and a further method is provided for utiliziing such a self-supporting separable silicon mask to perform various masking steps in the integrated circuit fabrication. The mask is formed by forming, at a surface of a planar silicon substrate, a silicon layer having a higher concentration of conductivity-determining impurities than the substrate beneath the layer, applying to selected portions of the other surface of the substrate an etchant which preferentially etches silicon having lower concentrations of conductivity-determining impurities to thus etch out preferentially selected portions of the substrate to form at least one recess extending through the substrate to said silicon layer, and then etching from the surface of said silicon layer opposite the substrate recess to form patterns of openings extending through the silicon layer to said substrate recess. The seperable self-supporting silicon mask thus formed is then placed on the surface of an integrated semiconductor circuit member so that the opposite surface of the silicon layer interfaces with the integrated circuit member surface. Then, the masked semiconductor member may be subjectd to any conventional integrated circuit fabrication step which alters the characteristics of the portions of said member surface exposed in said pattern of mask openings; such fabrication steps include introduction of impurities, etching as well as lift-off deposition of metallic and non-metallic patterns. Upon the completion of the step or steps, the self-supporting silicon mask is separated from the integrated circuit member.

Journal ArticleDOI
TL;DR: Germanium films deposited under simultaneous argon ion irradiation show substantially better adherence on glass and other substrate materials than conventionally produced films as mentioned in this paper, an effect believed to be associated with a thin layer of intermediate composition produced at the substrate surface by ion knock-on processes.

Patent
09 Jun 1978
TL;DR: In this article, a silicon-on-sapphire (SOS) wafer is formed by initially epitaxially depositing silicon on the sapphire substrate to form a monocrystalline layer which is substantially free of lattice defects near its surface, but exhibits a high defect density near the substrate.
Abstract: A method is provided for producing a low-defect layer of silicon on a sapphire substrate. A silicon-on-sapphire (SOS) wafer is formed by initially epitaxially depositing silicon on the sapphire substrate to form a monocrystalline layer which is substantially free of lattice defects near its surface, but which exhibits a high defect density near the sapphire substrate. The wafer is subsequently subjected to an ion implantation to form an amorphous region in the silicon near the silicon-sapphire interface. The implanted ions are preferably "channeled" through the silicon layer to insure that the amorphous region will be localized in the imperfect region near the substrate, leaving the upper region of the silicon layer undamaged. During a subsequent high temperature anneal cycle, monocrystalline silicon is regrown from the residual upper regions of the silicon down to the silicon-sapphire interface, producing a silicon layer having a greatly reduced defect density throughout the layer.

Patent
Jacob Riseman1
10 May 1978
TL;DR: In this article, a pattern of cavities extending from one surface of a silicon substrate into the substrate to laterally surround and electrically isolate said plurality of substrate pockets, and then forming a first layer of silicon dioxide on said first substrate surface.
Abstract: A method for forming a fully-enclosed air isolation structure which comprises etching a pattern of cavities extending from one surface of a silicon substrate into the substrate to laterally surround and electrically isolate said plurality of substrate pockets, and then forming a first layer of silicon dioxide on said first substrate surface. Next, a planar second layer comprising silicon dioxide is formed over a second silicon substrate, after which this planar layer is fused to said silicon dioxide layer to thereby fully enclose said cavities. Then, the second silicon substrate is removed.

Journal ArticleDOI
TL;DR: In this article, single crystal films of (11 2 0)ZnO were obtained on (01 1 2) sapphire at a deposition rate of 2 μm/h at a substrate temperature of 210-260°C by using a planar magnetron type high rate and low substrate temperature rf sputtering system.

Journal ArticleDOI
TL;DR: In this article, the formation range of iron oxides was determined as functions of the substrate temperature and the deposition rate at an oxygen pressure of 4×10-4 Torr.
Abstract: Films of iron oxides such α-Fe3O3 and Fe3O4 were prepared by evaporating iron in a low pressure atmosphere of oxygen gas and investigated by X-ray and electron diffraction and Mossbauer effect measurements. The formation range of iron oxides was determined as functions of the substrate temperature and the deposition rate at an oxygen pressure of 4×10-4 Torr. The oxide film consisted of fine grains, and the grain size of Fe3O4 increased with increase of the film thickness and the substrate temperature. Magnetic properties were investigated. The coercivity was found to increase up to 1000 Oe with the oxidation of the as-deposited Fe3O4 films. The origin of such high coercivity was briefly discussed.