Showing papers on "Substrate (electronics) published in 1985"

1.54‐μm electroluminescence of erbium‐doped silicon grown by molecular beam epitaxy

Abstract: The feasibility of producing erbium‐doped silicon light‐emitting diodes by molecular beam epitaxy is demonstrated. The p‐n junctions are formed by growing an erbium‐doped p‐type epitaxial silicon layer on an n‐type silicon substrate. When the diodes are biased in the forward direction at 77 K they show an intense sharply structured electroluminescence spectrum at 1.54 μm. This luminescence is assigned to the internal 4f–4f transition 4I13/2→4I15/2 of Er3+ (4f11).

Limited reaction processing: Silicon epitaxy

Abstract: We introduce a new technique, limited reaction processing, in which radiant heating is used to provide rapid, precise changes in the temperature of a substrate to control surface reactions. This process was used to fabricate thin layers of high quality epitaxial silicon. Abrupt transitions in doping concentration at the epitaxial layer/substrate interface were achieved for undoped films deposited on heavily doped substrates.

A sensitive new method for the determination of adhesive bonding between a particle and a substrate

Abstract: We use an AT‐cut quartz resonator with metal electrodes as the substrate. The material properties of the quartz are well characterized, and the resonant frequency can be determined accurately (1 part in 108 or better). When a particle was placed on the electrode, the resonant frequency increased, contrary to mass loading theory. If the particle‐resonator system is modeled mechanically as a coupled oscillator system, indeed the resonant frequency should increase. The increase is determined by the bonding force constant between particle and substrate, which we calculate. Experimental data on the autohesion force constants of Au spheres on etched Au electrodes in air is presented.

Thermal Oxidation of Silicon in Dry Oxygen: Growth‐Rate Enhancement in the Thin Regime II . Physical Mechanisms

Abstract: In many studies of oxidation kinetics, it has been observed that silicon‐dioxide growth in dry oxygen in the thin film regime (<500A) is faster than predicted by the linear‐parabolic description of the growth of thicker layers. Oxidation‐rate enhancement in the thin film regime was studied in the 800°–1000°C range for a variety of substrate orientations, doping densities, and oxygen partial pressures using in situ ellipsometry. The results were reported in part I of this paper. In this part, the physical mechanisms previously proposed to explain the rate enhancement are discussed. No single model was found to apply under all experimental conditions. A new understanding of the growth‐rate enhancement in the early stages of silicon oxidation in dry oxygen is introduced.

Manufacture of semiconductor device

Abstract: PURPOSE:To suppress the oxidation which makes progress in lateral direction through an oxide film when a selective oxidation is performed as well as to stop the generation of bird's beaks to the minimum by a method wherein the oxide film on an element forming region is coated by a nitride film and a semiconductor substrate CONSTITUTION:A nitride film 6 is formed by superposition on the oxide film 5 formed on the surface of a semiconductor substrate 1 as a pad oxide film Then, a photoresist film is formed on the nitride film of an element forming region using photoetching technique, the oxide film 5 and the nitride film 6 are removed by performing a dry etching in the gas of CF4+O2 using the photoresist film as a mask, and another etching is performed on the substrate again Then, after the photoresist used as a mask has been exfoliated, a nitride film of almost the same thickness as the nitride film formed previously is formed Then, a nitride film 10 is formed by performing a just etching on the nitride film 9 using the plasma etching device of CF4+O2 gas parallel flat plate leaving the side face of a semiconductor substrate 7 located under the oxide film 5' and another oxide film 5' on the element forming region, and a nitride film 10 is formed Then, a thick oxide film 11 can be formed on the area other than the element forming region by performing an oxidation using the nitride film 10 as the mask of selective oxidation

Silicon carbide filaments - Microstructure

Abstract: The microstructure of chemically vapour deposited silicon carbide filaments has been examined using transmission electron microscopy. The filament bulk consisted of heavily faulted columnar subgrains ofβ-SiC which were preferentially oriented such that {1 1 1} planes were parallel to the surface of the carbon fibre substrate. The protective coating on the filament surface was characterized by several microstructurally distinct layers, all of which consisted primarily of carbon. The first layers of the coating contained small crystallites of SiC in addition to turbostratic carbon, while the outer layers showed no evidence of SiC. Implications of the filament microstructure with respect to mechanical properties are discussed.

Silicon epitaxy at 650–800 °C using low‐pressure chemical vapor deposition both with and without plasma enhancement

Abstract: A system and a procedure using chemical vapor deposition of silane at very low pressures (<10−2 Torr) have been developed for depositing uniform, specular silicon epitaxial films both with and without plasma enhancement at temperatures as low as 650 °C. In situ cleaning of the substrate surface that overlaps into the deposition is the most critical aspect of the procedure. Undoped films deposited on substrates heavily doped with antimony or boron have abrupt doping profiles. Preliminary measurements indicate that the hole mobility of epitaxial films obtained with this process is 90% of that in bulk silicon. Films oxidized and decorated with a Secco etch show twice as many defects as a similarly treated substrate. Nonplasma growth kinetics are sensitive to surface conditions such as crystallographic orientation, and surface diffusion of adsorbed species appears to be the rate‐limiting step for depositing epitaxial films above 700 °C. Around 650 °C, the growth mechanism appears to change, possibly due to th...

Adhesion of titanium nitride coatings on high‐speed steels

Abstract: The adhesion is of vital importance for the performance of tools coated with titanium nitride. In view of this, we have studied the effects of substrate temperature and pretreatment on the adhesion of TiN coatings. Since high‐speed steels are among the most used substrate materials for tool applications we have chosen to deposit the films onto eight different high speed steels. The TiN coatings were deposited using reactive dc‐magnetron sputtering, and the adhesion was measured using the scratch test. In order to study the film–substrate interface Auger electron spectroscopy was used in combination with ion beam depth profiling. On most of the steels, the adhesion of the films increased with substrate temperature, reaching a maximum between 400 and 500 °C. The increased adhesion is associated with changes in the oxide layer on the steel substrate. As the temperature increases, Fe2O3 and F3O4 decompose to FeO. Sputter etching of the substrate prior to deposition improves the film adhesion even though a com...

Substrate chemical etching prior to molecular‐beam epitaxy: An x‐ray photoelectron spectroscopy study of GaAs {001} surfaces etched by the H2SO4‐H2O2‐H2O solution

Abstract: X‐ray photoelectron spectroscopy has been performed in order to investigate the effects of the chemical etching of GaAs {001} surfaces by the H2SO4/H2O2/H2O solution used following the procedure currently practiced in the molecular‐beam‐epitaxy technique. It is demonstrated that, in contrast to what is generally believed, rinsing in running deionized water after etching does not produce any passivating oxide film on the surface. The surface‐oxidized phases are only due to the sample manipulation in air after etching. This oxidation process is enhanced by the sample heating for indium soldering on the sample holder. It is shown that the surface‐oxidized phases can be avoided by handling the sample under an inert atmosphere. Results of thermal desorption of the surface‐oxidized phases are also given.

Continuous deposition of activated process gases

Abstract: Apparatus for and a method of continuously depositing semiconductor alloy material characterized by stress-free bonds, tetrahedral coordination and a low density of defect states. The semiconductor material is deposited onto the substrate from energetic precursor process gas, density of states reducing elements, as well as dopant gas and compensating elements. Each of said energized species are discretely introduced into a deposition region for uncontaminated deposition and surface reaction on the substrate.

Formation and planarization of silicon-on-insulator structures

Abstract: A process for fabricating silicon-on-insulator structures on semiconductor wafers and planarizing the topology of the patterns formed from the silicon. In the composite, the process provides for the formation of monocrystalline silicon islands electrically isolated by dielectric in substantially coplanar arrangement with surrounding dielectric. According to one practice of the process, substrate silicon islands are initially formed and capped, and thereafter used as masks to direct the anisotropic etch of the silicon substrate to regions between the islands. During the oxidation which follows, the capped and effectively elevated silicon islands are electrically isolated from the substrate by lateral oxidation through the silicon walls exposed during the preceding etch step. The capped regions, however, remain substantially unaffected during the oxidation. With the electrically isolated silicon island in place, a silicon dioxide layer and a planarizing polymer layer are deposited over the wafer. Processing is concluded with a pair of etching operations, the first removing polymer and silicon dioxide at substantially identical rates, and the second removing silicon dioxide and monocrystalline silicon at substantially identical rates.

Process of fabricating MOS devices having shallow source and drain junctions

Abstract: In a metal oxide semiconductor field effect transistor fabrication process, refractory metal is deposited over designated source and drain areas within a silicon substrate. Refractory metal and silicon at the interface is then mixed by ion implantation of a heavy neutral ion species such as germanium. To minimize source/drain junction depth, the source and drain locations can be subjected to bombardment by a lighter ion such as silicon which amorphizes silicon to a predetermined depth under the designated source and drain regions and so substantially confines dopant diffusion to the silicon amorphized region. To render the source and drain of desired conductivity type, an ion implantation of a non-neutral ion is then performed.

A vapor-sensitive chemiresistor fabricated with planar microelectrodes and a Langmuir-Blodgett organic semiconductor film

Abstract: A vapor-sensing method has been developed which is compatible with monolithic silicon microelectronics technology. Specifically, electronic conductance changes caused by vapor interactions with very thin films of organic semiconductors are shown to be sensitive, reproducible, rapid, and stable chemical detectors. Functionalized copper phthalocyanine multilayer films deposited by the Langmuir-Blodgett technique onto planar microelectrode arrays can easily detect ammonia at sub-ppm concentration levels.

High resolution electron microscope study of epitaxial CdTe‐GaAs interfaces

Abstract: CdTe films have been grown on (100) GaAs substrates with two different epitaxial relations: (111)CdTe∥(100)GaAs and (100)CdTe∥(100)GaAs. High resolution electron microscope observation of these two types of interfaces was carried out in order to investigate the role of the substrate surface microstructure in determining which type of epitaxy occurs. The interface of the former type shows a direct contact between the CdTe and GaAs crystals, while the interface of the latter type has a very thin layer (∼10 A in thickness), which is most likely an oxide, between the two crystals. These observations suggest that the GaAs substrate preheating cycle prior to CdTe film growth is crucial in determining which type of epitaxy occurs in this system.

Optical memory element

Abstract: An optical memory element comprises a substrate, a recording medium layer and an aluminum silicon nitride film laminated in this order.

A1N Substrates with High Thermal Conductivity

Abstract: A new aluminum nitride (AIN) substrate, which has high thermal conductivity of 160 W/mK at room temperture, has been developed using the hot press sintering technique. The new AIN substrate has the following excellent characteristics. 1) The thermal conductivity is eight times as high as that of AI 2 O 3 at room temperature and is almost equal to that of 99.5 percent BeO at 150°C. 2) The thermal expansion coefficient is smaller than that of AI 2 O 3 and BeO, and is close to that of a silicon semiconductor chip. 3) The electrical properties are almost as good as those for AI 2 O 3 and BeO in the wide frequency range. 4) It not only has higher mechanical stength but also easier machinable property than AI 2 O 3 . It is characterized by its light transparency from visible light to the infrared wavelength region. It was proved that the new AIN substrate is able to be metallized with good adhesion strength by the conventional evaporating method and the conventional sputtering method. The new AIN was found to be applicable to three kinds of semiconductor devices: 1) silicon epitaxial transistor, 2) GaAIAs light emitting diode, and 3) InGaAsP laser diode. Also, another AIN substrate was developed using the normal sintering technique, which has high thermal conductivity of 140 W/mK at room temperature.

Selective epitaxial growth method

Abstract: PURPOSE:To eliminate generation of crystal defect at the periphery of semiconductor layer and obtain flat grown layer by providing an aperture through anisotropic dry etching and realizing epitaxial growth under a reduced pressure of at least 100Torr or less with the remaining film used as the mask, at the time of boring an aperture to an insulating film deposited on the surface of semiconductor substrate and forming a semiconductor layer by the epitaxial growth on the exposed substrate surface. CONSTITUTION:An SiO2 insulating film 2 is deposited on the surface of a semiconductor substrate 1, the area other than the specified region is covered with a resist film 3 by the photo-engraving method, and an aperture 6 is formed on the film 2 by the parallel flat plate type anisotropic dry etching apparatus with the mixed gas of CF4 and H2 used as the etchant. Then, the film 3 unwanted is removed and a semiconductor layer 7 is formed by the epitaxial growth method on the substrate 1 exposed to the aperture 6 under the reduced pressure condition. In this case, a mixed gas of H2 carrier gas and SiH2Cl2 is used, pressure is set to 100Torr or less and temperature is set to 900-1,100 deg.C for the epitaxial growth.

Semiconductor memory device

Abstract: PURPOSE:To obtain an amorphous nonvolatile memory, which has excellent holding characteristics and reproducibility and a large area and large capacitance and cost thereof is low, by using an amorphous silicon carbide film in place of an amorphous silicon nitride film. CONSTITUTION:An insulating substrate 11, a lower electrode 12, an N type 13, which is hydrogenated previously by amorphous silicon and to which phosphorus is doped to a high degree, and an N type 14 to which phosphorus is doped similarly to a low degree are formed in the order. An silicon oxide film 15 in which amorphous silicon in oxidized through plasma anodizing, etc., a film 16, which consists of a hydrogenated amorphous silicon carbide film and contains carbon by 35atom% or more, and an upper electrode 17 are shaped in the order. Accordingly, a device having performance, which has not exist as nonvolatile memories, such as, a holding time of ten years or more, a writing time of 0.1musec or less, even fast erasing speed, a large area and large capacitance and low cost is obtained.

Method of forming transistors with poly-sidewall contacts utilizing deposition of polycrystalline and insulating layers combined with selective etching and oxidation of said layers

Abstract: Improved bipolar transistors having minimum base-collector and collector-substrate junction area are formed by using multiple polycrystalline (e.g. doped poly silicon) layers to make lateral contact to a pillar shaped single crystal device region. The lateral poly silicon contacts are isolated from each other and the substrate and extend to the upper surface of the device for external connections. The structure is made by depositing two dielectric-poly layer sandwiches, etching and oxidizing part of the poly silicon layers to provide isolated overlapping poly silicon regions, etching a first hole through both poly silicon regions to the substrate, etching a second hole to the lower poly silicon layer, and filling the first and second holes with single and poly-crystalline silicon, respectfully. A sidewall oxide is formed at the periphery of the top of the single crystal pillar for defining the emitter location without additional masking.

X‐ray double crystal diffraction study of porous silicon

Abstract: Depending on the dopant concentration, two distinct types of porous silicon can be formed during the anodization of silicon in hydrofluoric acid. A range of samples of both types of porous silicon has been investigated using x‐ray double crystal diffraction techniques. The crystal lattice of porous silicon is found to be tetragonally distorted. In the plane of the substrate, the interplanar spacing of the porous film is identical to that of the substrate but is increased in the direction normal to it. The increase is typically 700 ppm in the type of film formed on heavily doped silicon and 6000 ppm in that on lightly doped silicon. We propose that stresses, generated by the growth of a native oxide on the surface of the pores, are responsible for the observed increase in lattice parameter. The different interplanar spacings of the two types of film are related to the observed differences in their oxygen contents which are a consequence of their different surface area to volume ratios.

Role of mechanical stress in the light‐induced degradation of hydrogenated amorphous silicon

Abstract: The correlation between the high intrinsic mechanical stresses in plasma‐deposited hydrogenated amorphous silicon and the magnitude of the light‐induced degradation in this material (Staebler–Wronski effect) has been studied for films with different thicknesses and for various substrate materials. The experimental results suggest that the creation of metastable defects occurs mainly in the strained region of the films near the substrate, and that the number of these states is roughly proportional to the total stress in a given sample.

Manufacture of semiconductor device

Abstract: PURPOSE:To equalize a distance between a control electrode region and an element isolation region with high accuracy by forming a semiconductor having the same conduction type as the control electrode region and the element isolation region while a mask material having predetermined length shaped so as to be positioned between the control electrode region and the element isolation region consisting of a semiconductor having the same conduction type formed into the same substrate is used as a mask CONSTITUTION:An oxide film 5 is formed, and BSG (boron silicate glass-that is, an SiO2 film containing B as an impurity) is shaped through a CVD method as a diffusion source, and pushed in, thus forming a p element isolation region 6 An oxide film 7 is removed selectively through etching in order to shape a base region, and an oxide film 8 for buffer is formed in the removed section B ions or BF2 ions generated while employing BF3 as a material gas are implanted to a wafer The oxide film 7 functions as a mask at that time, and B ions are implanted only under the oxide film 8 When ions are implanted, a p type base region 9 is shaped up to prescribed depth through thermal diffusion Accordingly, when the element isolation region 6 and the base region 9 are formed, the oxide films 7 and 8 are removed, and an oxide film 10 in thickness of several dozen - several hundreds Angstrom is formed

Use of infrared radiation and an ellipsoidal reflection mirror

Abstract: In a semiconductor crystal growth apparatus, a growth vessel enclosing a substrate is evacuated to an ultrahigh vacuum, and gas molecules containing a component element of a semiconductor which should grow on the substrate is introduced according to a predetermined time sequence into the growth vessel from an external gas source. Infrared radiation from an infrared radiation emitting lamp associated with the growth vessel and controlled by a temperature control unit is directed toward and onto the substrate whose temperature is to be maintained at a predetermined setting. Crystal growth of one molecular layer after another can be achieved by the apparatus with dimensional accuracy of the thickness of a single molecular layer.

Method of producing a thin silicon-on-insulator layer

Abstract: A method of forming a thin silicon layer upon which semiconductor devices may be constructed. An epitaxial layer is grown on a silicon substrate, and oxygen or nitrogen ions are implanted into the epitaxial layer in order to form a buried etch-stop layer therein. An oxide layer is grown on the epitaxial layer, and is used to form a bond to a mechanical support wafer. The silicon substrate is removed using grinding and/or HNA, the upper portions of the epitaxy are removed using EDP, EPP or KOH, and the etch-stop is removed using a non-selective etch. The remaining portions of the epitaxy forms the thin silicon layer. Due to the uniformity of the implanted ions, the thin silicon layer has a very uniform thickness.

Infrared absorption and bonding in amorphous hydrogenated silicon-carbon alloys

Abstract: Films of a-Si1-xCx:H were prepared by DC magnetron glow discharge decomposition of silane-methane-gas mixtures. The infrared absorption coefficient was studied using a reflection method in the range 650-4000 cm-1 as a function of the fraction of methane in the gas mixture and as a function of substrate temperature. The results enabled assignments of the hydrogen-related absorption features to be made. At a substrate temperature of 478 degrees C the silicon-hydrogen stretching mode split into three bands. The silicon-carbon stretching mode was used to estimate the degree of heteronuclear bonding. It was shown that heteronuclear bonding increased with substrate temperature and was accompanied by useful increases in the photoconductivity of the films.

Surface morphology of oxidized and ion‐etched silicon by scanning tunneling microscopy

Abstract: The surface morphology of silicon (100) wafers has been measured by scanning tunneling microscopy. Samples which were bombarded with low‐energy argon ions are found to have an average root‐mean‐square roughness of 4.0 A, and the surfaces are covered with characteristic 50‐A‐diam hillocks. The roughness of nonbombarded (control) samples is observed to be 1.8 A, and this roughness arises in part from disorder at the interface between a native oxide and the silicon substrate.

Channel mobility enhancement in InP metal-insulator-semiconductor field-effect transistors

Abstract: The channel mobility of the InP metal‐insulator‐semiconductor field‐effect transistor (MISFET’s) was enhanced by incorporating a phosphorus‐rich interfacial oxide between the SiO2 gate dielectric and InP substrate. This phosphorus‐rich oxide was grown using an indirect, plasma‐enhanced chemical vapor deposition process followed by deposition of the SiO2 gate dielectric using the same technique. The metal‐insulator‐semiconductor structures, formed by aluminum deposition on the SiO2, did not exhibit any hysteresis in its capacitance‐voltage characteristic. An interface state density as low as 8×1010 cm−2 eV−1 was achieved for such an MIS system. A channel mobility of 3450 cm2/Vs at room temperature was achieved for 4‐μm gate length InP MISFET’s. These MISFET’s did not show any significant drift of channel current during six hours of continuous operation. These excellent characteristics are postulated to result from suppression of surface defects during the deposition of the SiO2 gate dielectric.

Planar Deposition of Aluminum by RF/DC Sputtering with RF Bias

Abstract: Planarization of multilevel interconnection is most effective for achieving a higher packing density. However, it is shown by computer simulation that degradation of metallization step coverage becomes serious as th via aspect ratio increases. Conventional deposition methods, in which emitted particles flow onto the substrate and usually do not migrate, are shown to be inadequate for maintaining sufficient step coverage. A new deposition technique, RF/dc sputtering with RF bias for metal, is developed and found to provide sufficient step coverage and, moreover, planarity. In an application of the technique to aluminum film deposition, the existence of a resputtering effect was confirmed. Aluminum particles were found to deposit primarily near the bottom of the depressions and to fill up th depressions completely, through sputtering at a high bias. Steep, deep grooves and vias with aspect ratios up to were found to be completely filled with the aluminum film by deposition at resputtering rates higher than 50%. It was also found that substrate biasing has a decisive effect on giving aluminum films an almost complete (111) crystallographic texture.

Porous films and method of forming them

Abstract: An anodic aluminum oxide film (12) has a system of larger pores (14) extending in from one face (16) and interconnecting with a system of smaller pores (24) extending in from the other face (26). The film is made by anodizing an aluminum metal substrate, then reducing the applied voltage at a rate to permit partial or complete recovery of the oxide film, either continuously or incrementally in small steps down to a level preferably below 3 V, and separating the oxide film from the substrate.

Investigation of the SiO2‐induced substrate current in silicon field‐effect transistors

Abstract: An experimental investigation is presented for the substrate current (holes) appearing in n‐channel field‐effect transistors having SiO2 as their gate insulator. In these experiments, the gate is biased by a high and positive voltage, causing an electron current to be injected from the device channel into the oxide. This current is accompanied by the substrate current whose origin is not clear. The experiments were performed by application of short pulses (400 μsec) to the gate. It is shown that the substrate current is too large to be explained by simple electron tunneling from the silicon valence band into the oxide. Temperature‐dependence measurements, down to 20 K, show that some of the data are not consistent with models for hole transport from the oxide into the silicon valence band. It is argued that the substrate current may be related to the energy loss experienced by hot electrons as they traverse the oxide. It is further argued that the same mechanism responsible for the substrate current may p...