Showing papers on "Substrate (electronics) published in 1986"

The microstructure of sputter-deposited coatings

Abstract: Microstructure is a critical consideration when polycrystalline or amorphous thin films are used for applications such as microcircuit metallization layers and diffusion barriers. The trend in device fabrication toward lower processing temperatures means that such coatings must often be deposited at substrate temperatures T that are low relative to the coating material melting point Tm. The structure of vapor deposited coatings grown under these conditions consists typically of a columnar growth structure, defined by voided open boundaries, which is superimposed on a microstructure which may be polycrystalline (defined by metallurgical grain boundaries) or amorphous. The voided growth structure is clearly undesirable for most applications. Its occurrence is a fundamental consequence of atomic shadowing acting in concert with the low adatom mobilities that characterize low T/Tm deposition, and its formation can be enhanced by the surface irregularities which are common to microcircuit fabrication. This pap...

Metal deposition from a supported metal film using an excimer laser

Abstract: A method for the direct writing of metal features from a metal film supported on an optically transparent substrate using a single pulse from a high‐energy excimer laser (193 nm) is presented. The technique eliminates the need for gas‐phase precursors in many cases and is an inherently clean process. Results of copper depositions onto silicon substrates are shown to exemplify the technique and a mechanism for the process is proposed.

Plastic properties of thin films on substrates as measured by submicron indentation hardness and substrate curvature techniques

Abstract: Substrate curvature and submicron indentation measurements have been used recently to study plastic deformation in thin films on substrates. In the present work both of these techniques have been employed to study the strength of aluminum and tungsten thin films on silicon substrates. In the case of aluminum films on silicon substrates, the film strength is found to increase with decreasing thickness. Grain size variations with film thickness do not account for the variations in strength. Wafer curvature measurements give strengths higher than those predicted from hardness measurements suggesting the substrate plays a role in strengthening the film. The observed strengthening effect with decreased thickness may be due to image forces on dislocations in the film due to the elastically stiffer silicon substrate. For sputtered tungsten films, where the substrate is less stiff than the film, the film strength decreases with decreasing film thickness.

Dynamic Atomic-Level Rearrangements in Small Gold Particles

Abstract: Small metal particles (<5 nanometers), which are widely used in catalysis, have physical and chemical properties that are markedly different from those of the bulk metal. The differences are related to crystal structure, and it is therefore significant that structral rearrangements in small particles have been observed in real time by using high-resolution electron microscopy. A detailed investigation at the atomic level has been made of the factors affecting the dynamic activity of small gold crystals that are supported on thin films of amorphous carbon, silicon, and germanium. The rate of activity depends mainly on the current density of the incident electron beam and the degree of contact of the particle with the substrate, but this rate decreases rapidly as the particle size is increased. The activity of the particles is very similar on either carbon or silicon, but it is generally less marked on germanium because of increased contact between the particle and the substrate. The electron beam effectively heats the particles, and it appears that their dynamic behavior depends on their thermal contact with the substrate.

Method for forming Cu In Se2 films

Abstract: A method for fabricating a copper indium diselenide semiconductor film comprising use of DC magnetron sputtering apparatus to sequentially deposit a first film of copper on a substrate and a second film of indium on the copper film. Thereafter the substrate with copper and indium films is heated in the presence of gas containing selenium at a temperature selected to cause interdiffusion of the elements and formation of a high quality copper indium diselenide film. In a preferred form, an insulating substrate is used and an electrical contact is first deposited thereon in the same DC magnetron sputtering apparatus prior to deposition of the copper and indium films.

Sealed cavity semiconductor pressure transducers and method of producing the same

Abstract: Sealed cavity structures suitable for use as pressure transducers are formed on a single surface of a semiconductor substrate (20) by, for example, deposit of a polycrystalline silicon layer (32) from silane gas over a relatively large silicon dioxide post (22) and smaller silicon dioxide ridges (27) leading outwardly from the post. The polysilicon layer is masked and etched to expose the outer edges of the ridges and the entire structure is then immersed in an etchant which etches the silicon dioxide forming the ridges and the post but not the substrate (20) or the deposited polysilicon layer (32). A cavity structure results in which channels (35) are left in place of the ridges and extend from communication with the atmosphere to the cavity (36) left in place of the post. The cavity (36) may be sealed off from the external atmosphere by a second vapor deposition of polysilicon or silicon nitride, which fills up and seals off the channels (35), or by exposing the substrate and the structure thereon to an oxidizing ambient which results in growth of silicon dioxide in the channels sufficient to seal off the channels. Deflection of the membrane spanning the cavity occurring as a result of pressure changes, may be detected, for example, by piezoresistive devices formed on the membrane.

Process for forming deposited film

Abstract: A process for forming a deposited film, which comprises introducing into a film forming space for formation of a deposited film on a substrate an active species (A) formed by decomposition of a compound containing silicon and a halogen and an active species (B) formed from a germanium containing compound for film formation which is chemically mutually reactive with said active species (A) separately from each other, and then permitting the above respective active species and said germanium containing compounds to react chemically with each other by excitation by irradiation of light energy thereby to form a deposited film on the above substrate.

A photoluminescence and Hall‐effect study of GaSb grown by molecular‐beam epitaxy

Abstract: Unintentionally doped gallium antimonide has been grown by molecular‐beam epitaxy on gallium arsenide and gallium antimonide. Substrate temperatures in the range 480 to 620 °C and antimony to gallium flux ratios from 0.65 : 1 to 6.5 : 1 have been investigated. The deposition conditions have been related to growth morphology and to the electrical and optical properties of the epitaxial films. A strong correlation has been found between the quality of the layers and the degree of excess antimony flux; the best material in terms of both optical and electrical properties was obtained with the minimum antimony stable growth at a particular substrate temperature. All the material exhibited residual p‐type behavior. The lowest hole concentration achieved was 7.8×1015 cm−3 with a corresponding room‐temperature mobility of 950 cm2/V s. The narrowest PL (photoluminescence) features observed were peaks associated with bound exciton transitions with half‐widths of 2–3 meV.

Manufacture of semiconductor device

Abstract: PURPOSE:To make it possible to form a resistor or a wiring beneath an element region in a dielectric isolating structure by surrounding the entire surface of a single crystal region which is isolated with a non-single crystal silicon that is embedded in a groove formed in a semiconductor substrate with a three-layer structure of an insulating film, a conductor layer and an insulating film. CONSTITUTION:An isolating groove 12 is formed by selective etching (isotropic etching) by using KOH in a single-crystal silicon substrate 11. An insulating SiO2 film 13 is deposited on the entire surface. Then, a wiring layer 14 having the thickness of 100-1,000Angstrom is formed with conductive material (e.g., high- melting-point metal such as nickel chromium) by an evaporating method. An insulating film SiO2 film 15 is deposited again. Then a supporting layer 16 is formed by growing polycrystalline silicon. Etching is performed to a position shown with a broken line. A dielectric isolated substrate having a single crystal region 17 that is isolated with the SiO2 film 13 and the conductive layer 14 that is isolated with the insulating SiO2 films 13 and 15 can be obtained without using especially complicated steps. When the conductive layer 14 is utilized as a resistor, polycrystalline silicon whose resistivity is controlled by ion implantation can be used.

New selective deposition technology by electron-beam induced surface reaction

Abstract: A new selective deposition technology using electron beam induced surface reaction has been demonstrated. Electron beam induced W and Cr patterns were deposited by using WF6, WCl6, and Cr(C6H6)2 as sources, respectively. W and Cr depositions were confirmed by analysis using Auger electron spectroscopy (AES) and x‐ray microanalysis (XMA). It was observed, with W deposition using the WF6 source, that the W pattern was deposited at below ∼50 °C substrate temperature, but that the substrate was etched at above ∼50 °C substrate temperature. The deposition rate increased with decreasing substrate temperature, and the etching rate increased with increasing substrate temperature. The deposited thickness was proportional to electron beam dose. A 0.15‐μm‐linewidth Cr pattern was deposited at 5×10−7 C/cm (3.3×10−2 C/cm2) dose by using a modified scanning electron microscope (SEM) system. These results indicate that this technology will be applicable to fabricate nanometer‐structure devices.

Monolithic integration of silicon and gallium arsenide devices

Abstract: Monolithic integration of Si MOSFETs and gallium arsenide MESFETs on a silicon substrate is described herein. Except for contact openings and final metallization, the Si MOSFETs are first fabricated on selected areas of a silicon wafer. CVD or sputtering is employed to cover the wafer with successive layers of SiO 2 and Si 3 N 4 to protect the MOSFET structure during gallium arsenide epitaxy and subsequent MESFET processing. Gallium arsenide layers are then grown by MBE or MOCVD or VPE over the entire wafer. The gallium arsenide grown on the bare silicon is single crystal material while that on the nitride is polycrystalline. The polycrystalline gallium arsenide is etched away and MESFETs are fabricated in the single crystal regions by conventional processes. Next, the contact openings for the Si MOSFETs are etched through the Si 3 N 4 /SiO 2 layers and final metallization is performed to complete the MOSFET fabrication. In an alternative embodiment, Si MOSFETs and aluminum gallium arsenide double heterostructure LEDs are formed in a similar manner.

Semiconductor device with protective means against overheating

Abstract: A semiconductor substrate has a power region and a control region. The control region is located in the center portion of the substrate, and the power region surrounds the control region and is separated therefrom. A vertical type, MOS transistor, i.e., an active semiconductor element, is formed on the power region. An insulation film is formed on part of the control region. A polycrystalline silicon diode, which functions as a heat-sensitive element, is formed on the insulation film. A control section comprising a lateral type, MOS transistor is also formed on the control region. The lateral type, MOS transistor is connected to receive a signal form the polycrystalline silicon diode. Further, a polycrystalline silicon resistor, which determines a circuit constant, is formed on the insulation film. The MOS transistor protects the active semiconductor element in response to a signal supplied from the heat-sensitive element showing that the temperature of the semiconductor substrate has risen above a predetermined value. For example, the active semiconductor element may be disabled until the detected temperature drops below a predetermined value.

Growth of high mobility n‐type CdTe by photoassisted molecular beam epitaxy

Abstract: We report details of the successful controlled substitutional doping of CdTe films with indium. These n‐type films were prepared using a new technique, photoassisted molecular beam epitaxy, in which the substrate is illuminated during the deposition process. In the present work, an argon ion laser was used as an illumination source. The incident light was found to produce immediate and significant changes in the electrical properties of the films. In particular, highly activated n‐type CdTe:In layers resulted.

Microstructure studies of AuNiGe Ohmic contacts to n‐type GaAs

Abstract: Microstructure analysis and contact resistance measurements of alloyed AuNiGe contacts to GaAs were performed to assist in the development of low resistance Ohmic contacts for metal–semiconductor field‐effect transistor (MESFET) devices. The contact metals were prepared by sequential deposition of 100 nm of Au–27 at. % Ge, 35 nm Ni, and 50 nm Au onto sputter‐cleaned GaAs wafers in which conducting channels were formed by Si doping to a level of about 1×1018 cm−3. The contact resistances were determined by the transmission line method. Analysis of the substrate and the film microstructure was carried out by x‐ray diffraction, Auger electron spectroscopy (AES), and x‐ray photoelectron spectroscopy (XPS). A strong correlation between the contact resistance and the film microstructure was observed. Low resistances were observed when NiAs compounds containing Ge were in contact with GaAs and the β‐AuGa phase was concentrated near the top of the contact. High resistances were measured when free Au, the α‐AuGa p...

The thermal oxidation of silicon the special case of the growth of very thin films

Abstract: The thermal oxidation of silicon is generally modelled by Deal and Grove's theory based on the assumption that the oxygen molecules dissolve in silicon in interstitial positions and migrate to the Si-SiO2 interface where they react with the silicon substrate. Experimental results for oxidation in dry oxygen agree with this theory only for thick oxide films. The growth of very thin oxide films exhibits particular features which are discussed in this paper. For these films, the growth mechanism is different from that of thick films; this difference is possibly associated with the transport of oxygen atoms through the silica network. The effect of hydrogenated impurities is also discussed.

Deposition and planarizing methods and apparatus

Abstract: A layer of a substance such as an aluminum alloy is deposited, preferably by sputtering, onto a surface of a substrate such as a semiconductor wafer. The deposited substance is redistributed by bombarding the layer with ions. The ion bombardment may be induced by applying low frequency RF excitation at about 5 KHz -1 MHz to the substrate.

Magnetic recording medium

Abstract: PURPOSE:To obtain a thin metallic film type flexible magnetic recording medium having excellent mechanical durability by having a thin ferromagnetic metallic film and amorphous silicon layer formed on a flexible substrate and further a lubricating layer formed on the amorphous silicon layer. CONSTITUTION:The thickness of the flexible substrate 1 is preferably about 4-100mum and the thickness of the thin ferromagnetic metallic film 2 is preferably 0.01-2mum. The amorphous silicon layer 3 is formed on the thin ferromagnetic metallic film by a method such as sputtering using Si as a target. The amorphous silicon layer has the wear resistance specific to an amorphous material and since the layer is in an amorphous state, many unpaired electrons exist therein. The lubricating layer 5 which is chemically active and is hardly strippable by binding securely with a lubricating agent is formed. The medium having high durability even if the lubricating agent is directly coated on the layer is obtd. The much higher durability is obtd. if a surface treatment layer 4 consisting of fluorinated silane is provided therebetween.

Integrated solar cell and battery

Abstract: An integrated solar cell and battery are described, together with a process of making the same. The integrated solar cell and battery are made by employing thin film deposition techniques on a substrate. Preferably first, a thin film solar cell is deposited on the substrate, as for example, by sputtering. This step is immediately followed by the deposition of a thin film battery, either onto the previously deposited thin film solar cell, or onto the back side of the substrate. The deposition process lends itself to automated production. The process includes the thin film deposition of series-connected arrays forming different types of integrated solar cells and batteries, depending on their electrical connections so as to vary the respective current and voltage characteristics of the resultant integrated units.

Gaas atomic layer epitaxy by hydride VPE

Abstract: GaAs atomic layer epitaxy is demonstrated in hydride vapor phase epitaxy by a dual-grown-chamber method. GaAs substrate is alternatively exposed to GaCl and As4 gases by transferring the substrate between two chambers. The growth rate was examined for differing growth conditions and was found to depend only on substrate transfer cycles. Furthermore, the present method can be applied to selective growth.

Method for producing recessed field oxide with improved sidewall characteristics

Abstract: A method for producing field oxide in a silicon substrate by forming a thin oxide layer over the surface of the substrate, forming a thin nitride layer over the thin oxide layer, forming a thick oxide over the thin nitride layer, forming a thick nitride layer over the thick oxide layer; patterning all four of the layers to espose the surface of the substrate where the field oxide is to be formed; and growing the field oxide. Preferably, before the field oxide is grown, trenches are formed into the substrate so that the upper surfaces of the field oxide are substantially planar with the upper surfaces of the substrate. The thin oxide layer minimizes bird beak formation, and eases the removal of the oxide/nitride/oxide/nitride layers. The resultant structure is both planar and bird's beak-free, and is therefore well suited to producing VLSI components having dimensions less than 0.5 microns.

Effect of oxidation on the magnetic properties of unprotected TbFe thin films

Abstract: Amorphous Tb‐Fe thin films prepared by dual magnetron cosputtering were exposed to air at 200 °C in order to investigate the evolution of the films as they oxidize. Magnetic properties of the films were measured using a vibrating‐sample magnetometer and torque magnetometer and are interpreted in light of the structure of the films as revealed by Auger electron spectroscopy and composition‐depth profiling. This leads to a detailed and self‐consistent description of the oxidation process. At first a uniform and homogeneous oxidation layer grows from the surface toward the substrate. This layer has a high magnetization and low intrinsic anisotropy and consists of an intimate mixture of oxidized Tb and metallic TbxFe(1−x). The initially high intrinsic anisotropy of the unoxidized region decreases relatively quickly, while the composition changes only slowly as this region shrinks. When the oxidation layer reaches the substrate, two oxide phases (Fe2O3 and Tb2O3) begin to grow at the surface exposed to air.

SiO2‐induced substrate current and its relation to positive charge in field‐effect transistors

Abstract: Experimental data are presented for the substrate current (holes), which accompanies electron injection into the oxide of n‐channel field‐effect transistor structures, in the tunneling regime. Dependencies of the effect on oxide thickness and on the metal gate material were investigated. An inverse relation was found between the initial rise time of oxide current transients and both the electron and hole currents. It is shown that these initial current increases are related to positive charge, therefore a correlation exists between the positive charge and electron or hole currents. The strength of impact ionization in SiO2 is discussed on the basis of band‐structure arguments and it is concluded that there are difficulties in explaining the substrate current by impact ionization. A technique for fast measurements of capacitance‐voltage shifts at the end of an applied high field pulse is described.

Simultaneous epitaxy and substrate out-diffusion at a metal-semiconductor interface: Fe/GaAs(001)- c (8×2)

Abstract: We have combined high-angular-resolution Auger-electron diffraction, kinematical scattering calculations, low-energy-electron diffraction (done in a pulse-counting mode), and high-energy-resolution x-ray photoelectron spectroscopy to examine the formation of the Fe/GaAs(001)-c(8\ifmmode\times\else\texttimes\fi{}2) interface. We find that clusters of bcc Fe at least three atomic layers deep grow in registry with the substrate for coverages up to \ensuremath{\sim}4 monolayer equivalents. These clusters contain Ga and As atoms which have been liberated from the GaAs substrate. Above this coverage, the clusters coalesce into a continuous bcc Fe matrix with a lattice constant equal to half that of GaAs and with principal crystallographic axes parallel to those of the substrate. This epitaxial Fe overlayer contains Ga and As in solution in the bcc lattice with the impurity atoms occupying interstitial face-center sites. The concentration of Ga and As decreases with distance from the GaAs substrate. At the same time, we find clear evidence for surface segregation of As and enrichment of the near-surface region.

Process for making a buried conductor by fusing two wafers

Abstract: A process, and product made thereby, for bonding two wafers together to form a single wafer with a continuous interface, and for selectively burying a low impedance conductor in the wafer, by providing host and guest wafers having substantially the same crystal orientation and periodicity. A crystalline boundary n-semimetal is formed on the wafers, which are then brought into intimate contact. If desired, a unipolar conductor is fused to one of said wafers. Then, the wafers are exposed to an elevated temperature, or rapid thermal anneal, in an inert ambient, breaking up any native oxides and diffusing any excess oxygen into the wafer lattices. The guest wafer is then mechanically lapped back and chemically etched. A vertical cascode integrated half H-bridge motor driving circuit made in the guest and host wafers has a source transistor in the host wafer with with the wafer substrate forming the collector of the transistor, an isotype acceptor doped Ge x Si l-x /Si superlattice forming the base, and an overlying a monocrystalline silicon layer forming a compositional emitter, and with an n-semimetal boundary. The sink transistor of the guest is made with the wafer substrate forming the emitter, an isotype acceptor doped Ge x Si l-x /Si superlattice forming the base, and an overlying a monocrystalline silicon layer forming the compositional collector. The guest substrate is terminated with an n-semimetal boundary. A buried conductor contacts the collector of the host transistor and the emitter of the guest transistor.

Process for producing an insulating layer buried in a semiconductor substrate by ion implantation

Abstract: Process for producing a buried insulating layer in a semiconductor substrate by ion implantation. This process consists of producing a mask on the substrate regions where the active zones are located, carrying out oxygen or nitrogen ion implantation in the substrate through the mask for the direct forming in the exposed area, and forming by lateral dispersion and diffusion into the substrate of implanted ions beneath the mask, a continuous oxide or nitride insulating layer which is buried in the substrate and optionally annealing the implanted substrate for reinforcing the continuity of the insulating layer by lateral diffusion of the implanted ions.

Silicon Oxidation Studies: Silicon Orientation Effects on Thermal Oxidation

Abstract: The initial stage of the thermal oxidation of various crystallographic orientations of silicon ((100), (110), and (111) orientations) reveals a complex rate behavior. This behavior is not understood within the conventional linear‐parabolic model. A recently revised model which explicitly contains the areal density of Si atoms and mechanical stress effects is shown to provide both a qualitative (for all orientations studied) and somewhat quantitative (for (110) and (111) orientations) explanation of the complex substrate orientation effects.

Method of making micromachined refractory metal field emitters

Abstract: A method of making a field emitter includes anisotropically etching a single crystal silicon substrate to form at least one funnel-shaped protrusion on the substrate, then conformally depositing a refractory metal onto the funnel-shaped protrusion. Alternatively, single crystal silicon may be anisotropically etched to form at least one funnel-shaped recess in the silicon. The etched surface is doped with an impurity to form an etch-stop layer, the remaining undoped silicon is removed, then the etch-stop layer is conformally deposited with a refractory metal. The funnel-shaped recess can then be back-filled with silicon or another suitable material.