Showing papers on "Substrate (electronics) published in 1993"

The Physics of Macropore Formation in Low‐Doped p‐Type Silicon

Abstract: Macropore formation in n‐type silicon is a self‐adjusting phenomenon characterized by a specific current density at the pore tip. At this specific current density, the dissolution reaction changes from the charge‐transfer‐limited to the mass‐transfer‐limited regime. The passivation of the pore walls in hydrofluoric acid is caused by a depletion of holes due to the n‐type doping of the substrate. Equations based on these findings are presented and allow us to precalculate the dimensions of the pores. The validity of the model and its mathematical description is verified in experiments. Pores of a depth up to the wafer thickness and aspect ratios of 250 were etched using this method.

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

Abstract: An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >

Internal structure of layer-by-layer adsorbed polyelectrolyte films : a neutron and X-ray reflectivity study

Abstract: Ultrathin polymer films were physisorbed to surface-modified Si wafers by electrostatic deposition of polyelectrolytes from aqueous solutions. For the first it has been demonstrated that the preparation procedure, which involves repeated dipping of the substrate into solutions of polycations and polyanions in an alternating sequence, leads to the deposition of continuous molecular layers that form a polymer film with a well-defined supramolecular structure

Radiation properties of a planar antenna on a photonic-crystal substrate

Abstract: The photonic crystal is investigated as a substrate material for planar antennas in the microwave and millimeter-wave bands. Experimental results are presented for a bow-tie antenna on a (111)-oriented face-centered-cubic photonic-crystal substrate with a band gap between approximately 13 and 16 GHz. When driven at 13.2 GHz, the antenna radiates predominantly into the air rather than into the substrate. This suggests that highly efficient planar antennas can be made on photonic-crystal regions fabricated in semiconductor substrates such as GaAs.

Atomic layer epitaxy (ALE) apparatus for growing thin films of elemental semiconductors

Abstract: An apparatus for and a method of growing thin films of the elemental semiductors (group IVB), i.e., silicon, germanium, tin, lead, and, especially diamond, using modified atomic layer epitaxial (ALE) growth techniques are disclosed. In addition, stoichiometric and non-stoichiometric compounds of the group IVB elements are also grown by a variation of the method according to the present invention. The ALE growth of diamond thin films is carried-out, inter alia, by exposing a plurality of diamond or like substrates alternately to a halocarbon reactant gas, e.g., carbon tetrafluoride (CF 4 ), and a hydrocarbon reactant gas, e.g., methane (CH 4 ), at substrate temperatures between 300 and 650 Celsius. A stepping motor device portion of the apparatus is controlled by a programmable controller portion such that the surfaces of the plurality of substrates are given exposures of at least 10 15 molecules/cm 2 of each of the reactant gases. The chemical reaction time to complete the growth of an individual atom layer is approximately 25×10 -6 second.

Laser-Focused Atomic Deposition

Abstract: The ability to fabricate nanometer-sized structures that are stable in air has the potential to contribute significantly to the advancement of new nanotechnologies and our understanding of nanoscale systems. Laser light can be used to control the motion of atoms on a nanoscopic scale. Chromium atoms were focused by a standing-wave laser field as they deposited onto a silicon substrate. The resulting nanostructure consisted of a series of narrow lines covering 0.4 millimeter by 1 millimeter. Atomic force microscopy measurements showed a line width of 65 +/- 6 nanometers, a spacing of 212.78 nanometers, and a height of 34 +/-+ 10 nanometers. The observed line widths and shapes are compared with the predictions of a semiclassical atom optical model.

Epitaxial diamond thin films on (001) silicon substrates

Abstract: Epitaxial (001) diamond film were grown on mirror‐polished single‐crystalline (001) silicon substrates by microwave plasma chemical vapor deposition from a methane/hydrogen gas mixture. The films were characterized by means of scanning electron microscopy, Raman spectroscopy, and x‐ray analysis. The results show that the diamond crystallites are oriented to the silicon substrate with both the (001) planes and the [110] directions parallel to the silicon substrate.

Membrane dielectric isolation ic fabrication

Abstract: General purpose methods for the fabrication of integrated circuits (24, 26, 28,... 30) from flexible membranes (20, 36) formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices (24, 26, 38,... 30) are formed in a semiconductor layer of the membrane (36). The semiconductor membrane layer (36) is initially formed from a substrate (18) of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multichip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.

Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate

Abstract: A method of providing a first and a second Silicon-on-Insulator (SOI) wafer, wherein each SOI wafer includes a silicon layer separated from a bulk silicon substrate by a layer of dielectric material, typically SiO2. Next, at least one electrical feedthrough is formed in each of the silicon layers and active and passive devices are formed in each of the thin silicon layers. Next, interconnects are formed that overlie the silicon layer and are electrically coupled to the feedthrough. One of the wafers is then attached to a temporary substrate such that the interconnects are interposed between the thin silicon layer and the temporary substrate. The bulk silicon substrate of the wafer having the temporary substrate is then etched to expose the dielectric layer. Further interconnects are then formed through the exposed dielectric layer for electrically contacting the at least one feedthrough. This results in the formation of a first circuit assembly. A next step then couples the further interconnects of the circuit assembly to the interconnects of the second SOI wafer, the second SOI wafer having a bulk substrate, a dielectric layer overlying a surface of the substrate, and a layer of processed silicon overlying the dielectric layer. The temporary substrate is then removed. Additional circuit assemblies may then be stacked and interconnected to form a 3d integrated circuit.

Blue light-emitting diode with degenerate junction structure

Abstract: A light emitting diode is disclosed that emits light in the blue region of the visible spectrum with increased brightness and efficiency. The light emitting diode comprises an n-type silicon carbide substrate; an n-type silicon carbide top layer; and a light emitting p-n junction structure between the n-type substrate and the n-type top layer. The p-n junction structure is formed of respective portions of n-type silicon carbide and p-type silicon carbide. The diode further includes means between the n-type top layer and the n-type substrate for coupling the n-type top layer to the light-emitting p-n junction structure while preventing n-p-n behavior between the n-type top layer, the p-type layer in the junction structure, and the n-type substrate.

Low temperature crystallization and patterning of amorphous silicon films on electrically insulating substrates

Abstract: A fabrication process polycrystalline silicon thin film transistors commences with the deposition of an ultra-thin nucleating-site forming layer onto the surface of an insulating substrate (e.g., 7059 glass). Next, an amorphous silicon film is deposited thereover and the combined films are annealed at temperatures that do not exceed 600° C. By patterning the deposition of the nucleating site forming material on the glass substrate, the subsequently deposited amorphous film can be selectively crystallized only in areas in contact with the nucleating-site forming material.

Growth and structure of Fe and Co thin films on Cu(111), Cu(100), and Cu(110): A comprehensive study of metastable film growth.

Abstract: The growth and structure of Fe and Co thin films on single-crystal Cu(111), Cu(100), and Cu(110) substrates have been investigated using x-ray-photoelectron and Auger electron forward scattering, CO-titration, low-energy electron diffraction, and reflection high-energy electron diffraction The motivation for this study is to understand the role of surface structure and kinetics in the growth of metal films on metal substrates The effect of varying substrate growth temperatures between 80 and 450 K plays a prominent role in determining both the film morphology and crystalline phase Nonideal film growth, including agglomeration of Co and Fe and surface segregation of Cu, is the rule rather than the exception

Dielectric Properties of (Ba, Sr)TiO3 Thin Films Deposited by RF Sputtering

Abstract: Thin films of (Ba0.65Sr0.35)TiO3 (BST) have been prepared by an rf-sputtering method at substrate temperatures of 500 to 700°C. The dielectric constant of these films ranges from 190 to 700 at room temperature. This value changes with the grain size rather than the film thickness. The dielectric constant of about 300 and leakage current density of about 1×10-8 A/cm2 are obtained in the 65-nm-thick film deposited at a substrate temperature of 600°C. This shows the BST film can be applied to dielectrics of dynamic random access memory (DRAM) capacitors.

GaAs free‐standing quantum‐size wires

Abstract: Ultrathin GaAs wires as thin as 15–40 nm and about 2 μm long have been grown on a GaAs substrate by metal‐organic vapor‐phase epitaxy. The wires, which consist of whiskers, are grown between 380 and 550 °C using trimethylgallium and arsine (AsH3) as source materials. It is found that the wire growth direction is parallel to the [111] arsenic dangling‐bond direction and can be perfectly controlled by the crystallographic orientation of the GaAs substrate surface. From transmission electron microscopic analysis it is revealed that the crystal structure of the wire coincides with the zinc‐blende type for the growth temperature range of 460–500 °C, but it changes to the wurtzite type at 420 °C and temperatures higher than 500 °C. It is also found that the wires have a twin‐type structure around the [111] growth axis for zinc blende and [0001] growth axis for wurtzite. Photoluminescence study of these wires shows that the luminescence peak energy shifts to a higher energy as the wire width decreases from 100 t...

Growth of GaAs Epitaxial Microcrystals on an S-Terminated GaAs Substrate by Successive Irradiation of Ga and As Molecular Beams

Abstract: Numerous GaAs epitaxial microcrystals with an average base size of 250 A×430 A with (111) facets were fabricated on a sulfur-terminated (S-terminated) GaAs (001) substrate with successive irradiation of Ga and As molecular beams. The growth of GaAs microcrystals on the S-terminated substrate was caused by a vapor-liquid-solid (VLS) mechanism. This phenomenon originated in the inertness for the adhesion of Ga and As molecules and nearly equal lattice constants of the S-terminated GaAs surface and GaAs surface. This method, called droplet epitaxy, is thought to show promise as a growth method for fabricating GaAs quantum well boxes.

Microstructures and single mask, single-crystal process for fabrication thereof

Abstract: The invention provides a single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independent of crystal orientation. A dielectric mask (12) on a single-crystal substrate (154) is patterned to define isolating trenches. A protective conformal layer (28) is applied to the resultant structure. The conformal layer (28) on the floor of the trenches is removed and a second etch deepens the trench to expose the mesa walls which are removed during the release step by isotropic etching. A metal layer (44) is formed on the resultant structure providing opposed plates (156) and (158) of a capacitor. The cantilever beam (52) with the supporting end wall (152) extends the grid-like structure (150) into the protection of the deepened isolation trenches (54). A membrane can be added to the released structures to increase their weight for use in accelerometers, and polished for use as movable mirrors.

Towards miniaturized electrophoresis and chemical analysis systems on silicon: an alternative to chemical sensors☆

Abstract: The concept of a multi-manifold flow system integrated on a silicon substrate, with valveless switching of solvent flow between channels and electro-osmotic pumping of an aqueous solvent, is presented. A device consisting of two intersecting channels has been micromachined in silicon to test the concept of applying 50–1500 V to the channels to effect electro-osmotic pumping of fluid and electrophoretic separation of sample components. The dielectric breakdown voltages of oxide/nitride films in aqueous solution, in combination with the reverse-bias breakdown potential of silicon itself, are determined. The results show devices that withstand potentials of over 1000 V can be fabricated. Sample volumes on the order of 6–300 pl are defined at the intersection of sample and sensing channels using silicon micromachining. With a pH 8.5 boric acid/tris(hydroxymethyl)aminomethane buffer in 50 μm channels of a device a solvent flow rate of about 0.01 cm/s at 31 V/cm is estimated. A migration rate for the fluorescent indicator fluorescein of 0.003 cm/s is observed, in agreement with theoretical predictions. Coupling to a fluorescence detection system gives detection limits of 10 −8 M.

Gallium antimonide device related properties

Abstract: The physical properties of GaSb are briefly presented and the device implications reviewed. GaSb is a direct gap semiconductor (0.72 eV) capable of being doped either p or n type with good mobilities and it has significant electro-optical potential in the near IR range. As a substrate, or active layer, GaSb can be employed in conjunction with many semiconductors such as (AlGa)Sb or In(AsSb) and has interesting heterojunction potential for detectors and lasers and quantum well structures.

Selective-area low-pressure MOCVD of GaInAsP and related materials on planar InP substrates

Abstract: Low-pressure MOCVD has been used to grow layers of InP, InGaAs, GaInAsP and quantum well material on planar substrates patterned with silica masks. The thicknesses and, where relevant, the compositions of these selectively grown layers were investigated by optical and scanning electron microscopy, surface profiling, energy dispersive X-ray analysis, secondary-ion mass spectroscopy and spatially resolved photoluminescence. The epitaxial layers were found to be both thicker and richer in indium in the vicinity of a mask. The perturbations in the thickness and composition of material grown around a given mask pattern were independent of the orientation of the pattern with respect to the gas flow and the crystallographic axes of the substrate. Lateral movement of material from the masked regions to the surrounding areas was found to take place in the gas above the water surface. A gas-phase diffusion model based on Laplace's equation was used to analyze the thickness and compositional variations caused by selective growth. The emission wavelength of selectively grown InGaAs/GaInAsP MQW material was shifted by over 100 nm without degradation in emission efficiency. The lasing wavelength of Fabry-Perot lasers fabricated on such material was increased by a similar amount without degradation of threshold current.

Power MOSFET in silicon carbide

Abstract: The power metal oxide semiconductor field effect transistor (MOSFET) has a drain region, a channel region, and a source region formed of silicon carbide. The drain region has a substrate of silicon carbide of a first conductivity type and a drain-drift region of silicon carbide adjacent the substrate having the same conductivity type. The channel region is adjacent the drain-drift region and has the opposite conductivity type from the drain-drift region. The source region is adjacent the channel region and has the same conductivity type as the drain-drift region. The MOSFET has a gate region having a gate electrode formed on a first portion of the source region, a first portion of the channel region, and a first portion of the drain region. A source electrode is formed on a second portion of the source region and a second portion of the channel region. Also, a drain electrode is formed on a second portion of the drain region.

Method of transferring a thin film to an alternate substrate

Abstract: A method is described for transferring a thin film of arbitrarily large area from an original substrate to an alternate substrate. An etch stop layer is provided below an epitaxial layer, for example, grown on a semiconductor substrate. In a single transfer process, the epitaxial layer is bonded to a rigid host substrate having desirable thermal, electromagnetic, and/or mechanical properties. The original growth substrate is then removed from the transferred epitaxial layer using the etch stop layer. In a double transfer process, the epitaxial layer is first bonded to a rigid and porous temporary substrate using a thermally or chemically releasable resin, for example. The original growth substrate is removed using the etch stop layer so that the original substrate side of the epitaxial layer can be bonded to a rigid host substrate, as described above. The temporary substrate is then removed using the releasable resin to leave the transferred thin film attached to the host substrate.

Self‐assembled monolayer electron beam resist on GaAs

Abstract: We present results on electron beam exposure of a self‐assembled monolayer film as a self‐developing positive resist on GaAs. A 1.5 nm thick monolayer of n‐octadecanethiol (C18H37SH) deposited on a GaAs (100) substrate showed a electron beam sensitivity of about 100 μC/cm2. The monolayer resist was used as a mask for chemical etching of the GaAs. Patterns in GaAs have been created with widths approximately equal to the exposing electron beam width of 50 nm.

Semiconductor heterostructure devices with strained semiconductor layers

Abstract: A heterostructure includes a stained epitaxial layer of either silicon or germanium that is located overlying a silicon substrate, with a spatially graded Ge x Si 1-x epitaxial layer overlain by a ungraded Ge x .sbsb.0 Si 1-x .sbsb.0 intervening between the silicon substrate and the strained layer. Such a heterostructure can serve as a foundation for such devices as surface emitting LEDs, either n-channel or p-channel silicon-based MODFETs, and either n-channel or p-channel silicon-based MOSFETs.

Method of forming cubic boron nitride films

Abstract: A novel method of forming large area single crystal cubic boron nitride films on a silicon substrate by first treating the surface of the substrate with atomic hydrogen and then depositing a cubic boron nitride film by a reactive biased laser ablation technique.

GaN grown on hydrogen plasma cleaned 6H‐SiC substrates

Abstract: We report epitaxial GaN layers grown on 6H‐SiC (0001) substrates. A two stage substrate preparation procedure is described which effectively removes oxygen from the SiC substrate surface without the need of elaborate high temperature processing. In the first step, dangling Si bonds on the substrate surface are hydrogen passivated using a HF dip before introduction into vacuum. Second, the substrate is treated with a hydrogen plasma reducing the amount of oxygen‐carbon bonding to below the x‐ray photoemission detection limit. Upon heating in the molecular beam epitaxy (MBE) growth chamber, the SiC substrates are observed to have a sharp (1×1) reconstruction with Kikuchi lines readily visible. GaN epilayers deposited on AlN buffer layers by plasma enhanced MBE show sharp x‐ray diffraction and photoluminescence peaks.

Method of fabricating a gallium nitride based semiconductor device with an aluminum and nitrogen containing intermediate layer

Abstract: Disclosed are a gallium nitride type semiconductor device that has a single crystal of (Ga 1-x Al x ) 1-y In y N, which suppresses the occurrence of crystal defects and thus has very high crystallization and considerably excellent flatness, and a method of fabricating the same. The gallium nitride type semiconductor device comprises a silicon substrate, an intermediate layer consisting of a compound containing at least aluminum and nitrogen and formed on the silicon substrate, and a crystal layer of (Ga 1-x Al x ) 1-y In y N (0≦x≧1, 0≦y≦1, excluding the case of x=1 and y=0). According to the method of fabricating a gallium nitride base semiconductor device, a silicon single crystal substrate is kept at a temperature of 400° to 1300° C. and is held in the atmosphere where a metaloganic compound containing at least aluminum and a nitrogen-containing compound are present to form a thin intermediate layer containing at least aluminum and nitrogen on a part or the entirety of the surface of the single crystal substrate, and then at least one layer or multiple layers of a single crystal of (Ga 1-x Al x ).sub. 1-y In y N are formed on the intermediate layer.