Showing papers on "Substrate (electronics) published in 1994"

Fabrication of si nanostructures with an atomic force microscope

Abstract: A method for fabricating Si nanostructures with an air‐operated atomic force microscope (AFM) is presented. An electrically conducting AFM tip is used to oxidize regions of size 10–30 nm of a H‐passivated Si (100) surface at write speeds up to 1 mm/s. This oxide serves as an effective mask for pattern transfer into the substrate by selective liquid etching. The initial oxide growth rate depends exponentially on the applied voltage which produces an effective ‘‘tip sharpening’’ that allows small features to be produced by a relatively large diameter tip.

Method of etching an oxide layer

Abstract: A method of etching an oxide layer is disclosed. First, a resist layer is formed on an oxide layer on a substrate. Next, a photosensitive layer is formed on the oxide layer and patterned to expose regions of the oxide layer to be removed. The exposed regions may overlie a nitride layer, and may overlie a structure such as a polysilicon gate. The etch is performed such that polymer deposits on the photosensitive layer, thus eliminating interactions between the photosensitive layer and the plasma. In this way, a simple etch process allows for good control of the etch, resulting in reduced aspect ratio dependent etch effects, high oxide:nitride selectivity, and good wall angle profile control.

Gallium nitride-based III-V group compound semiconductor device and method of producing the same

Abstract: A gallium nitride-based III-V Group compound semiconductor device has a gallium nitride-based III-V Group compound semiconductor layer provided over a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The ohmic electrode is formed of a metallic material, and has been annealed.

Epitaxial layer transfer by bond and etch back of porous Si

Abstract: We demonstrate a novel method for bond and etch back silicon on insulator in which an epitaxial Si layer over porous Si is transferred onto a dissimilar substrate by bonding and etch back of porous Si. The highest etching selectivity (100 000:1) between the porous Si and the epitaxial layer is achieved by the alkali free solution of HF, H2O2, and H2O which is essential for this single etch‐stop method to produce a submicron‐thick active layer with superior thickness uniformity (473±14 nm) across a 5 in. silicon‐on‐insulator wafer.

Thin film microcalorimeter for heat capacity measurements from 1.5 to 800 K

Abstract: A new microcalorimeter for measuring heat capacity of thin films in the range 1.5–800 K is described. Semiconductor processing techniques are used to create a device with an amorphous silicon nitride membrane as the sample substrate, a Pt thin film resistor for temperatures greater than 40 K, and either a thin film amorphous Nb–Si or a novel boron‐doped polycrystalline silicon thermometer for lower temperatures. The addenda of the device, including substrate, is 4×10−6 J/K at room temperature and 2×10−9 J/K at 4.3 K, approximately two orders of magnitude less than any existing calorimeter used for measuring thin films. The device is capable of measuring the heat capacity of thin film samples as small as a few micrograms.

Pulsed laser deposition of VO2 thin films

Abstract: High quality vanadium dioxide (VO2) thin films have been successfully deposited by pulsed laser deposition without postannealing on (0001) and (1010) sapphire substrates. X‐ray diffraction reveals that the films are highly oriented with (010) planes parallel to the surface of the substrate. VO2 thin films on (0001) and (1010) substrates show semiconductor to metal transistions with electrical resistance changes as large as 4×104, 105, respectively. Thin films on (1010) substrate have a transition at as low as 55 °C with a hysteresis less than 1 °C. These transition properties are comparable with single crystal VO2.

Method of forming green light emitting diode in silicon carbide

Abstract: A light emitting diode is disclosed that emits in the green portion of the visible spectrum, along with a method of producing the diode The light emitting diode comprises a 6H silicon carbide substrate having a planar surface inclined more than one degree off axis toward one of the directions; an ohmic contact to the substrate; a first epitaxial layer of 6H silicon carbide on the inclined surface of the substrate and having a first conductivity type; a second epitaxial layer of 6H silicon carbide on the first layer and having the opposite conductivity type for forming a p-n junction between the first and second layers; and an ohmic contact to the second epitaxial layer The diode produces a peak wavelength of between about 525 and 535 nanometers with a spectral half width of no more than about 90 nanometers

Silicon:germanium heterojunction bipolar transistors: from experiment to technology

Abstract: Recent advances in thin film growth techniques, notably the maturation of low temperature silicon epitaxy, have enabled the routine fabrication of highly controlled dopant and silicon:germanium alloy profiles. These capabilities, combined with refinements in heterojunction bipolar transistor designs, have led to the first integrated circuits in the silicon:germanium materials system. Utilizing a commercial (Leybold-AG) UHVCVD tool for SiGe epitaxy on a standard 8" CMOS line, medium scale integration has been achieved, with the first IC components being SiGe HBT based 1 Ghz, 12 bit, digital to analog converters.

Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility

Abstract: An SOI MOSFET having improved electrical characteristics includes a low barrier body contact under the source region, and alternatively under the drain region, to facilitate collection and removal of current carriers generated by impact ionization. Fully-depleted and non-fully-depleted SOI MOSFETs can be integrated on the same chip by providing some transistors with thicker source and drain regions with a recessed channel therebetween and by selective channel dopant implant. Accordingly, digital circuitry and analog circuitry can be combined on one substrate. Improved electrostatic discharge protection is provided by fabricating transistors for the protection circuit directly in the supporting substrate by first removing the silicon thin film and underlying insulation barrier. Alternatively, improved transistors for electrostatic discharge protection can be formed in the silicon film by fabricating the transistor in a plurality of electrically isolated segments, each segment having source and drain regions separated by a channel region with the regions being electrically interconnected with like regions in other segments. Increased ESD current can be realized as compared to the ESD current for a wider unsegmented device.

New approach to the growth of low dislocation relaxed SiGe material

Abstract: In this growth process a new strain relief mechanism operates, whereby the SiGe epitaxial layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an ultrathin silicon on insulator (SOI) substrate with a superficial silicon thickness less than the SiGe layer thickness. Initially, the thin Si layer is put under tension due to an equalization of the strain between the Si and SiGe layers. Thereafter, the strain created in the thin Si layer relaxes by plastic deformation. Since the dislocations are formed and glide in the thin Si layer, no threading dislocation is ever introduced in to the upper SiGe material, which appeared dislocation free to the limit of the cross sectional transmission electron microscopy analysis. We thus have a method for producing very low dislocation, relaxes SiGe films with the additional benefit of an SOI substrate.

Low-strain laser structures with group III nitride active layers

Abstract: A Group III nitride laser structure is disclosed with an active layer that includes at least one layer of a Group III nitride or an alloy of silicon carbide with a Group III nitride, a silicon carbide substrate, and a buffer layer between the active layer and the silicon carbide substrate. The buffer layer is selected from the group consisting of gallium nitride, aluminum nitride, indium nitride, ternary Group III nitrides having the formula A x B 1-x N, where A and B are Group III elements and where x is zero, one, or a fraction between zero and one, and alloys of silicon carbide with such ternary Group III nitrides. In preferred embodiments, the laser structure includes a strain-minimizing contact layer above the active layer that has a lattice constant substantially the same as the buffer layer.

Magnetic recording medium

Abstract: PURPOSE:To provide the magnetic recording medium capable of making high- density recording and having excellent mechanical characteristics by using the single crystal silicon produced by a Czochralski method as a substrate. CONSTITUTION:The single crystal silicon produced by the Czochralski method has 2.3sp.gr. which is lighter than 2.7sp.gr. of an Al alloy and, therefore, the electric power consumption for driving magnetic disks is reduced. Since this single crystal silicon has hardness as high as about 1000, the generation of warpage is lessened. Since its transition temp. is as high as >=600 deg.C, the single crystal silicon has the advantage that the film formation at a high temp. of >=600 deg.C is possible. The single crystal silicon produced by the Czochralski method is light in weight, high in hardness and is small in warpage by a heat treatment. The film formation at >=600 deg.C is possible and the heating with the power smaller than the power required for heating glass substrates is possible and, therefore, the magnetic recording medium capable of making the high- density recording and having the excellent mechanical characteristics is obtd.

Dielectric properties of electron‐beam deposited Ga2O3 films

Abstract: We have fabricated high quality, dielectric Ga2O3 thin films. The films with thicknesses between 40 and 4000 A were deposited by electron‐beam evaporation using a single‐crystal high purity Gd3Ga5O12 source. Metal‐insulator‐semiconductor (MIS) and metal‐insulator‐metal structures (MIM) were fabricated in order to determine dielectric properties, which were found to depend strongly on deposition conditions such as substrate temperature and oxygen pressure. We obtained excellent dielectric properties for films deposited at substrate temperatures of 40 °C with no excess oxygen and at 125 °C with an oxygen partial pressure of 2×10−4 Torr. Specific resistivities ρ and dc breakdown fields Em of up to 6×1013 Ω cm and 2.1 MV/cm, respectively, were measured. Static dielectric constants between 9.93 and 10.2 were determined for these films. Like in other dielectrics, the current transport mechanisms are found to be bulk rather than electrode controlled.

Method of fabricating a thin film transistor using a nickel silicide layer to promote crystallization of the amorphous silicon layer

Abstract: Method of fabricating TFTs starts with forming a nickel film selectively on a bottom layer which is formed on a substrate. An amorphous silicon film is formed on the nickel film and heated to crystallize it. The crystallized film is irradiated with infrared light to anneal it. Thus, a crystalline silicon film having excellent crystailinity is obtained. TFTs are built, using this crystalline silicon film.

Trench method for three dimensional chip connecting during IC fabrication

Abstract: A new method of connecting three-dimensional integrated circuit chips using trench technology is described. Semiconductor device structures are provided in and on the top side of a semiconductor substrate of a first and a second three-dimensional integrated circuit chip. Deep trenches are etched into the first semiconductor substrate. A conductive material is deposited into the trenches. An insulating material is deposited over the surface of the substrate, polished and planarized. The bottom side of the first semiconductor substrate is ground, polished, and selectively etched so that the deep trenches form protrusions from the bottom surface. A passivation layer and a polyimide layer are deposited on the bottom surface of the first semiconductor substrate and etched away around the protrusions. A passivation layer and a polyimide layer are deposited over the top surface of the second semiconductor substrate. Connection windows are etched through the two layers to the top conducting surface of the second semiconductor substrate. The first and second integrated circuits are aligned so that the protrusions on the bottom surface of the first integrated circuit chip fit into the connection windows in the top surface of the second integrated circuit chip. The polyimide layer on the bottom surface of the first integrated circuit contacts the polyimide layer on the top surface of the second integrated circuit completing the connection between the two chips.

Manufacture of semiconductor device

Abstract: PROBLEM TO BE SOLVED: To provide a method for highly selectively etching an underlying silicon oxide film in a semiconductor device, when processing a wiring layer and a silicon substrate at the same time. SOLUTION: When a wiring layer and a silicon substrate are processed at the same time, a flow rate of oxygen in a mixture gas such halogen gases as chlorine gas and an oxygen gas is set at 30-60%, with respect to the total gas low rate. A gas pressure in a reaction chamber 204 is first set at 1×10 torr or lower by a vacuum pump 211, and then a mixture gas containing an O2 gas and a Cl gas in a proportion of 25 sccm of O2 gas and 45 sccm of Cl gas are introduced separately through respective gas inlet pipes 210. Next, a magnetic field is made by an exciting coil, and about 1.75 kW microwave is guided from a microwave oscillator 203 into a plasma generation chamber 201 for generating a plasma of the mixture gas. Further, about 40 W of high-frequency power is applied form a high-frequency power source 208 to an electrode 206 for applying a bias electric field on a semiconductor substrate 207 fixed by an electrostatic attraction thereon for etching the substrate.

A method to increase contaminant tolerance in protein matrix‐assisted laser desorption/ionization by the fabrication of thin protein‐doped polycrystalline films

Abstract: This paper describes the fabrication and use of thin polycrystalline films in matrix-assisted laser desorption experiments. These films consist of microcrystals of protein-doped matrix (crystal dimensions ⩽ 1 μm). The films produce intense protein-ion currents and can be grown in the presence of high concentrations of involatile solvents (e.g., glycerol, 6 M urea) without any purification. They strongly adhere to the substrate, allowing easier washing of the film, compared to dried-droplet deposits. The films are also more uniform than dried-droplet deposits, with respect to ion production. It is suggested that matrix-assisted laser desorption/ionization samples are composed of nonlinear optical devices that function as polymer ion-current sources. These devices (protein-doped matrix crystals) can be designed and fabricated in many forms to serve the special functions required by the analytical scientist.

Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers

Abstract: A method and a layered planar heterostructure comprising one of or both n and p-channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate wherein one layer is silicon or silicon germanium under tensile strain and one layer is silicon germanium under compressive strain whereby n channel field effect transistors may be formed with a silicon or silicon germanium layer under tension and p-channel field effect transistors may be formed with a silicon germanium layer under compression. The plurality of layers may be common to both subsequently formed p and n-channel field effect transistors which may be interconnected to form CMOS circuits. The invention overcomes the problem of forming separate and different layered structures for p and n-channel field effect transistors for CMOS circuitry on ULSI chips.

Method of manufacturing a thin film transistor in which the gate insulator comprises two oxide films

Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a semiconductor film on a substrate, oxidizing a surface of said semiconductor film in an oxidizing atmosphere with said semiconductor film heated or irradiated with light, and further depositing an oxide film on the oxidized surface of the semiconductor film by PVD or CVD The first oxide film has a good interface condition with the semiconductor film and a characteristics of an insulated gate field effect transistor can be improved if the first oxide film and the second oxide film are used as a gate insulating film

Semiconductor device having improved crystal orientation

Abstract: Thin-film transistors (TFTs) of peripheral logic circuits and TFTs of an active matrix circuit (pixel circuit) are formed on a single substrate by using a crystalline silicon film. The crystalline silicon film is obtained by introducing a catalyst element, such as nickel, for accelerating crystallization into an amorphous silicon film and heating it. In doing so, the catalyst element is introduced into regions for the peripheral logic circuits in a nonselective manner, and is selectively introduced into regions for the active matrix circuit. As a result, vertical crystal growth and lateral crystal growth are effected in the former regions and the latter regions, respectively. Particularly in the latter regions, the off-current and its variation can be reduced. The vertical growth and the lateral growth have a difference in the degree of crystal orientation. In general, the vertical growth does not provide so high of a degree of crystal orientation in which orientation in the (111) plane with respect to the substrate surface is dominate to a small extent. In contrast, remarkable orientation is found in the lateral growth. For example, the ratio of a reflection intensity of the (111) plane to the sum of reflection intensities of the (111), (220) and (311) planes can amount to more than 80 or 90%.

Method of producing thin-film solar cell

Abstract: In a method for fabricating a thin film solar cell, a thin semiconductor film serving as a power generating layer is formed on a substrate via an intermediate layer, a plurality of holes are formed penetrating through the thin semiconductor film and reaching the intermediate layer, and the intermediate layer is etched away through the through-holes, separating the thin semiconductor film from the substrate with high-efficiency. Since stress is hardly applied to the thin semiconductor film during the separation process, cracking and breaking of the semiconductor film is avoided. Further, since the surface of the substrate is maintained in good condition, the substrate can be reused, resulting in a reduction in the production cost.

Electro-optical device

Abstract: PURPOSE:To provide the structure for preventing breakdown of a semiconductor thin film layer in a pressure-connection process of an electro-optical device using a semiconductor thin film element. CONSTITUTION:Elastic bodies 12 are formed on a semiconductor substrate 1, which is formed by providing a semiconductor thin film circuit layer 7 on a glass substrate B5 through an adhesive layer 6, by screen printing or the like, and a sealing material 3 is formed outside of the elastic body 12. Thereafter, a glass substrate A2 formed with a transparent electrode 9 is arranged opposite to the substrate 5 and they are compressed, and it is left as it is for a several seconds to deform the elastic bodies 12, and the sealling material 3 is hardened by the heat to obtain an appropriate gap. Thereafter, liquid crystal 4 is filled by the vacuum filling method to form an electro-optical device. Consequently, since the gap is controlled by pinching the elastic body 12, a gap control material such as a glass fiber is not required in the sealing material 3, and breakdown of the semiconductor thin film circuit layer 7 due to the pressure- connection is prevented.

Method of micro-machining an integrated sensor on the surface of a silicon wafer

Abstract: A method for micromachining the surface of a silicon substrate which encompasses a minimal number of processing steps. The method involves a preferential etching process in which a chlorine plasma etch is capable of laterally etching an N+ buried layer beneath the surface of the bulk substrate. Such a method is particularly suitable for forming sensing devices which include a small micromachined element, such as a bridge, cantilevered beam, membrane, suspended mass or capacitive element, which is supported over a cavity formed in a bulk silicon substrate. The method also permits the formation of such sensing devices on the same substrate as their controlling integrated circuits. This invention also provides novel methods by which such structures can be improved, such as through optimizing the dimensional characteristics of the micromachined element or by encapsulating the micromachined element.

Hetero-epitaxially grown compound semiconductor substrate

Abstract: A method of growing a gallium arsenide single crystal layer on a silicon substrate comprises steps of growing a buffer layer of aluminium arsenide on the silicon substrate by atomic layer epitaxy, and growing the gallium arsenide single crystal layer on the buffer layer epitaxially.

Semiconductor device including a plurality of thin film transistors at least some of which have a crystalline silicon film crystal-grown substantially in parallel to the surface of a substrate for the transistor

Abstract: Nickel is introduced to a predetermined region of a peripheral circuit section, other than a picture element section, on an amorphous silicon film to crystallize from that region. After forming gate electrodes and others, sources, drains and channels are formed by doping impurities, and laser is irradiated to improve the crystallization. After that, electrodes/wires are formed. Thereby an active matrix type liquid crystal display whose thin film transistors (TFT) in the peripheral circuit section are composed of the crystalline silicon film whose crystal is grown in the direction parallel to the flow of carriers and whose TFTs in the picture element section are composed of the amorphous silicon film can be obtained.

Method of fabricating a semiconductor device

Abstract: Method of fabricating a semiconductor device, such as a thin-film transistor, having improved characteristics and improved reliability. The method is initiated with formation of a thin amorphous silicon film on a substrate. A metallization layer containing at least one of nickel, iron, cobalt, and platinum is selectively formed on or under the amorphous silicon film so as to be in intimate contact with the silicon film, or these metal elements are added to the amorphous silicon film. The amorphous silicon film is thermally annealed to crystallize it. The surface of the obtained crystalline silicon film is etched to a depth of 20 to 200Å, thus producing a clean surface. An insulating film is formed on the clean surface by CVD or physical vapor deposition. Gate electrodes are formed on the insulating film.

Semiconductor device and process for fabricating the same

Abstract: A semiconductor device comprising at least two thin film transistors on a substrate having an insulating surface thereon, provided that the thin film transistors are isolated by oxidizing the outer periphery of the active layer of each of the thin film transistors to the bottom to provide an oxide insulating film.

Process of fabricating a semiconductor substrate

Abstract: A process for preparing a semiconductor substrate comprises a step of porousifying a silicon monocrystalline substrate to form a porous layer, a step of making a silicon monocrystalline thin film to epitaxially grow on a surface of the porous layer, a step of oxidizing the surface of the epitaxial growth layer, a step of forming a deposited film on the oxidized surface, thereby obtainig a first substrate, a step of closely contacting the deposited film of the first substrate to a second substrate, a step of heat treating the closely contacted substrates and a step of selectively etching the porous layer.