Showing papers on "Substrate (electronics) published in 1998"

Plasma assisted molecular beam epitaxy of ZnO on c -plane sapphire: Growth and characterization

Abstract: ZnO single crystal thin films were grown on c-plane sapphire using oxygen microwave plasma assisted molecular beam epitaxy. Atomically flat oxygen-terminated substrate surfaces were obtained by pre-growth cleaning procedures involving an oxygen plasma treatment. A two dimensional nucleation during the initial growth which is followed by a morphology transition to three dimensional nucleation was observed by in situ reflection high energy electron diffraction. X-ray diffraction (XRD) and photoluminescence investigations suggest that the ZnO epilayer consists of a high quality layer on top of a transition layer containing a high density of defects in the interfacial region. A full width at half maximum (FWHM) of 0.005° is obtained for the ZnO(0002) diffraction peak in an XRD rocking curve, while a broad tail extending from the peak can also be observed. The photoluminescence spectra exhibit dominant bound exciton emission with a FWHM of 3 meV at low temperatures and free exciton emission combined with a ver...

Article having transparent conductive oxide thin film and its production

Abstract: PROBLEM TO BE SOLVED: To obtain an oxide film having excellent transmitting property for blue light while reducing the amt. of In2O3 which is a scarse mineral resource by using an oxide having a specified compsn. of Zn, Al and Ba, In as a target and specifying the substrate temp. and pressure. SOLUTION: An oxide expressed by the general formula of ZnxMyInzO(x+3y/2+3z/2) is used as a target to form an oxide film by sputtering or laser ablation method under the conditions of from room temp. to 300 deg.C substrate temp. and 1×10-2 to 10 (Pa) pressure. In the formula, M is at least one element of Al and Ga, the proportion x/y ranges 0.2 to 12, the proportion z/y ranges 0.4 to 1.4. The conductivity of the oxide of the target is good when the carrier electron density in the conductive band ranges about 1×1018 to 1×1022/cm3. By injecting actions to the oxide, carrier electrons are injected to the conductive band to develop the conductivity.

Ellipsometric determination of optical constants for silicon and thermally grown silicon dioxide via a multi-sample, multi-wavelength, multi-angle investigation

Abstract: Optical constant spectra for silicon and thermally grown silicon dioxide have been simultaneously determined using variable angle of incidence spectroscopic ellipsometry from 0.75 to 6.5 eV. Spectroscopic ellipsometric data sets acquired at multiple angles of incidence from seven samples with oxide thicknesses from 2 to 350 nm were analyzed using a self-contained multi-sample technique to obtain Kramers–Kronig consistent optical constant spectra. The investigation used a systematic approach utilizing optical models of increasing complexity in order to investigate the need for fitting the thermal SiO2 optical constants and including an interface layer between the silicon and SiO2 in modeling the data. A detailed study was made of parameter correlation effects involving the optical constants used for the interface layer. The resulting thermal silicon dioxide optical constants were shown to be independent of the precise substrate model used, and were found to be approximately 0.4% higher in index than publis...

Shape Transition of Germanium Nanocrystals on a Silicon (001) Surface from Pyramids to Domes

Abstract: Chemical vapor deposition of germanium onto the silicon (001) surface at atmospheric pressure and 600 degrees Celsius has previously been shown to produce distinct families of smaller (up to 6 nanometers high) and larger (all approximately 15 nanometers high) nanocrystals. Under ultrahigh-vacuum conditions, physical vapor deposition at approximately the same substrate temperature and growth rate produced a similar bimodal size distribution. In situ scanning tunneling microscopy revealed that the smaller square-based pyramids transform abruptly during growth to significantly larger multifaceted domes, and that few structures with intermediate size and shape remain. Both nanocrystal shapes have size-dependent energy minima that result from the interplay between strain relaxation at the facets and stress concentration at the edges. A thermodynamic model similar to a phase transition accounts for this abrupt morphology change.

Al-doped zinc oxide films deposited by simultaneous rf and dc excitation of a magnetron plasma: Relationships between plasma parameters and structural and electrical film properties

Abstract: A new technique of the simultaneous excitation of a magnetron sputtering discharge by rf and dc was used for the deposition of undoped ZnO- and Al-doped ZnO (ZnO:Al) films. By this technique, it was possible to change the ion-to-neutral ratio ji/jn on the substrates during the film growth by more than a factor of ten, which was revealed by plasma monitor and Langmuir probe measurements. While for a pure dc discharge the ions impinging onto a floating substrate have energies of about Ei≈17 eV, the rf discharge is characterized by Ar-ion energies of about 35 eV. Furthermore, the ion current density for the rf excitation is higher by a factor of about five, which is caused by the higher plasma density in front of the substrate. This leads to a much higher ion-to-neutral ratio ji/jn on the growing film in the case of the rf discharge, which strongly influences the structural and electrical properties of the ZnO(:Al) films. The rf-grown films exhibit about the three times lower specific resistances (ρ≈6×10−4 Ω...

Group III nitride photonic devices on silicon carbide substrates with conductive buffer interlayer structure

Abstract: An optoelectronic device with a Group III Nitride active layer is disclosed that comprises a silicon carbide substrate; an optoelectronic diode with a Group III nitride active layer; a buffer structure selected from the group consisting of gallium nitride and indium gallium nitride between the silicon carbide substrate and the optoelectronic diode; and a stress-absorbing structure comprising a plurality of predetermined stress-relieving areas within the crystal structure of the buffer structure, so that stress-induced cracking that occurs in the buffer structure occurs at predetermined areas rather than elsewhere in the buffer structure.

Damage-free separation of GaN thin films from sapphire substrates

Abstract: Gallium nitride thin films grown on sapphire substrates were successfully separated and transferred onto Si substrates using single 38 ns KrF excimer laser pulses directed through the transparent substrate at fluences in the range of 400–600 mJ/cm2. The absorption of the 248 nm radiation by the GaN at the interface induces rapid thermal decomposition of the interfacial layer, yielding metallic Ga and N2 gas. The substrate is easily removed by heating above the Ga melting point of 30 °C. Scanning electron microscopy and x-ray diffraction of the GaN films before and after lift-off demonstrate that the structural quality of the GaN films is not altered by the separation and transfer process.

Making silicon nitride film a viable gate dielectric

Abstract: To extend the scaling limit of thermal SiO/sub 2/ in the ultrathin regime when the direct tunneling current becomes significant, members of this author's research team at Yale University, in collaboration with the Jet Process Corporation, embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. In this paper, high-quality silicon nitride (or oxynitride) films made by a novel jet vapor deposition (JVD) technique are described. The JVD process utilizes a high-speed jet of light carrier gas to transport the depositing species onto the substrate to form the desired films. The film composition has been determined to consist primarily of Si and N, with some amounts of O and H. Metal-nitride-Si (MNS) capacitors based on the JVD nitride films deposited directly on Si exhibit relatively low densities of interface traps, fixed charge, and bulk traps. The interface traps at the nitride/Si interface exhibit different properties from those at the SiO/sub 2//Si interface in several aspects. In contrast to the conventional CVD silicon nitride, the high-field I-V characteristics of the JVD silicon nitride fit the Fowler-Nordheim (F-N) tunneling theory over four to five orders of magnitude in current, but do not fit at all the Frenkel-Poole (F-P) transport theory. This is consistent with the much lower concentration of electronic traps in the JVD silicon nitride. Results from the carrier separation experiment indicate that electron current dominates the gate current with very little hole contribution. Both theoretical calculation and experimental data indicate that the gate leakage current in JVD silicon nitride is significantly lower than that in silicon dioxide of the same equivalent oxide thickness. The breakdown characteristics of the JVD nitride are also respectable. Compared to their MOSFET counterparts, MNS transistors exhibit reduced low-field transconductance but enhanced high-field transconductance, perhaps due to the presence of border traps. As expected, the JVD silicon nitride films exhibit very strong resistance to boron penetration and oxidation at high temperatures. These properties, coupled with its room-temperature deposition process, make JVD silicon nitride an attractive candidate to succeed thermal SiO/sub 2/ as an advanced gate dielectric in future generations of ULSI devices.

Zirconium and/or hafnium oxynitride gate dielectric

Abstract: A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A zirconium oxynitride gate dielectric layer 36 is formed over this substrate, followed by a conductive gate 38. Zirconium oxynitride gate dielectric layer 36 has a dielectric constant is significantly higher than the dielectric constant of silicon dioxide.

Ultraviolet and violet GaN light emitting diodes on silicon

Abstract: We report the fabrication and characterization of GaN-based double heterostructure light emitting diodes grown by molecular beam epitaxy on Si(111) substrates. Light emitting diode operation is achieved by using the conducting Si(111) substrate as a backside n contact and a standard transparent Ni/Au p contact. We observe electroluminescence peaked in the ultraviolet ∼360 nm, with a full width at half maximum of ∼17 nm and in the violet at ∼420 nm. Electron microscopy studies indicate a high density of threading and planar defects. Consequences of these are discussed.

Nucleation and growth of Si nanowires from silicon oxide

Abstract: Nucleation and growth of Si nanowires by laser ablation and thermal evaporation of Si powder sources mixed with ${\mathrm{SiO}}_{2}$ have been investigated by means of transmission electron microscopy. At the initial nucleation stage, Si oxide vapor condensed on the substrate and formed Si nanoparticles (the nuclei of nanowires). Each Si nanowire nucleus consisted of a polycrystalline Si core containing a high density of defects and a Si oxide shell. A growth mechanism was proposed based on the microstructure and different morphologies of the Si nanowires observed.

Carbon fiber-based field emission devices

Abstract: Electron field emission devices (cold cathodes), vacuum microelectronic devices and field emission displays which incorporate cold cathodes and methods of making and using same. More specifically, cold cathode devices comprising electron emitting structures grown directly onto a substrate material. The invention also relates to patterned precursor substrates for use in fabricating field emission devices and methods of making same and also to catalytically growing other electronic structures, such as films, cones, cylinders, pyramids or the like, directly onto substrates.

CONTROLLING THREADING DISLOCATION DENSITIES IN Ge ON Si USING GRADED GeSi LAYERS AND PLANARIZATION

Abstract: A semiconductor structure including a semiconductor substrate, at least one first crystalline epitaxial layer on the substrate, the first layer having a surface which is planarized, and at least one second crystalline epitaxial layer on the at least one first layer In another embodiment of the invention there is provided a semiconductor structure including a silicon substrate, and a GeSi graded region grown on the silicon substrate, compressive strain being incorporated in the graded region to offset the tensile strain that is incorporated during thermal processing In yet another embodiment of the invention there is provided a semiconductor structure including a semiconductor substrate, a first layer having a graded region grown on the substrate, compressive strain being incorporated in the graded region to offset the tensile strain that is incorporated during thermal processing, the first layer having a surface which is planarized, and a second layer provided on the first layer In still another embodiment of the invention there is provided a method of fabricating a semiconductor structure including providing a semiconductor substrate, providing at least one first crystalline epitaxial layer on the substrate, and planarizing the surface of the first layer

Method for manufacturing a semiconductor substrate

Abstract: Methods for manufacturing semiconductor substrates in which a semiconductor layer for forming semiconductor device therein is formed on a supporting substrate with an insulating film interposed between, with which in forming the semiconductor layer on a substrate on which a buried pattern structure has been formed it is possible to greatly increase the film thickness uniformity of the semiconductor layer and the film thickness controllability, particularly when the semiconductor layer is being formed as an extremely thin film. As a result, it is possible to achieve improved quality and characteristics of the semiconductor substrates and make possible the deployment of such semiconductor substrates to various uses.

Direct measurement of strain effects on magnetic and electrical properties of epitaxial SrRuO3 thin films

Abstract: By lifting an epitaxial thin film off its growth substrate, we directly and quantitatively demonstrate how elastic strain can alter the magnetic and electrical properties of single-domain epitaxial SrRuO3 thin films (1000 A thick) on vicinal (001) SrTiO3 substrates. Free-standing films were then obtained by selective chemical etching of the SrTiO3. X-ray diffraction analysis shows that the free-standing films are strain free, whereas the original as-grown films on SrTiO3 substrates are strained due to the lattice mismatch at the growth interface. Relaxation of the lattice strain resulted in a 10 K increase in the Curie temperature to 160 K, and a 20% increase in the saturation magnetic moment to 1.45 μB/Ru atom. Both values for the free-standing films are the same as that of the bulk single crystals. Our results provide direct evidence of the crucial role of the strain effect in determining the properties of the technologically important perovskite epitaxial thin films.

Integrated circuit devices having buffer layers therein which contain metal oxide stabilized by heat treatment under low temperature

Abstract: Integrated circuit devices include a first dielectric layer, an electrically insulating layer on the first dielectric layer and an an aluminum oxide buffer layer formed by atomic layer deposition (ALD) and stabilized by heat treatment at a temperature of less than about 600° C., between the first dielectric layer and the electrically insulating layer. The first dielectric layer may comprise a high dielectric material such as a ferroelectric or paraelectric material. The electrically insulating layer may also comprise a material selected from the group consisting of silicon dioxide, borophosphosilicate glass (BPSG) and phosphosilicate glass (PSG). To provide a preferred integrated circuit capacitor, a substrate may be provided and an interlayer dielectric layer may be provided on the substrate. Here, a metal layer may also be provided between the interlayer dielectric layer and the first dielectric layer. The metal layer may comprise a material selected from the group consisting of Pt, Ru, Ir, and Pd.

Deposition of silicon dioxide films with an atmospheric-pressure plasma jet

Abstract: A plasma jet has been developed which deposits silica films at up to at 760 Torr and 115 to C. The jet operates by feeding oxygen and helium gas between two coaxial electrodes that are driven by a 13.56 MHz radio frequency source at 40 to 500 W. Tetraethoxysilane is mixed with the effluent of the plasma jet and directed onto a substrate located 1.7 cm downstream. The properties of the silica films, as determined by infrared spectroscopy and capacitance measurements, are comparable to those of thermally grown silicon dioxide films at C.

Transparent conducting ZnO thin films prepared by XeCl excimer laser ablation

Abstract: Highly conductive and transparent aluminum- and gallium-doped zinc oxide (ZnO:Al and ZnO:Ga) thin films in place of indium tin oxide films have been prepared by using XeCl excimer laser ablation at relatively low temperatures. The impurity content of Al or Ga in the ZnO target was optimized on the basis of the measurements of resistivity, carrier concentration, and Hall mobility of the deposited transparent conducting ZnO films. The effects of substrate temperature on the properties of ZnO films were investigated. The crystalline, electrical and optical properties of the films were found to depend directly on substrate temperature during deposition. The minimum resistivity of 1.4×10−4 Ω cm was obtained for the ZnO:Al film prepared at a substrate temperature of 300 °C using a ZnO target with an Al2O3 content of 1% by weight (wt %). Moreover, the ZnO:Al film prepared at a substrate temperature of 100 °C showed a low resistivity value of 2.5×10−4 Ω cm. As for the ZnO:Ga film, on the other hand, the minimum r...

Crystallization processing of semiconductor film regions on a substrate, and devices made therewith

Abstract: Semiconductor integrated devices such as transistors are formed in a film of semiconductor material formed on a substrate. For improved device characteristics, the semiconductor material has regular, quasi-regular or single-crystal structure. Such a structure is made by a technique involving localized irradiation of the film with one or several pulses of a beam of laser radiation, locally to melt the film through its entire thickness. The molten material then solidifies laterally from a seed area of the film. The semiconductor devices can be included as pixel controllers and drivers in liquid-crystal display devices, and in image sensors, static random-access memories (SRAM), silicon-on-insulator (SOI) devices, and three-dimensional integrated circuit devices.

Substrate structures for electronic devices

Abstract: A substrate structure includes a single crystal Si substrate and a surface layer, with a buffer layer interleaved therebetween. The buffer layer includes at least one of an R--Zr family oxide thin film composed mainly of a rare earth oxide and/or zirconium oxide, an AMnO3 thin film composed mainly of rare earth element A, Mn and O and having a hexagonal YMnO3 type structure, an AlOx thin film composed mainly of Al and O, and a NaCl type nitride thin film composed mainly of titanium nitride, niobium nitride, tantalum nitride or zirconium nitride. The surface layer is an epitaxial film containing a wurtzite type oxide and/or nitride. The surface layer can serve as a functional film such as a semiconductor film or an underlying film therefor, and the substrate structure is useful for the manufacture of electronic devices.

Semiconductor substrate and method of manufacturing the same

Abstract: Before a semiconductor substrate and a base substrate is directly bonded to one another, in a protective film removing step, a contamination protective film formed on the semiconductor substrate to protect it from contamination during an ion implanting step is removed. Consequently, even when flatness of the contamination protective film is degraded during the ion implanting step or even when contaminants remain in a segregated state in the vicinity of the surface of the contamination protective film, the state of the bonding between the semiconductor substrate and the base substrate after the bonding step can be made uniform over the entire area of the bonding. As a result, a high-quality semiconductor substrate can be manufactured at low cost.

Method of high density plasma CVD gap-filling

Abstract: A gap filling process of depositing a film of SiO2 in gaps on a substrate by generating plasma in a process chamber by energizing gas containing silicon, oxygen and a heavy noble gas such as xenon or krypton. The gaps can have widths below 0.5 μm and aspect ratios higher than 1.5:1. A substrate is supported on a substrate support wherein a gas passage supplies a temperature control gas into a space between opposed surfaces of the substrate and the substrate support, and the film is grown in the gaps on the substrate by contacting the substrate with the plasma. The silicon reactant can be SiH4 and the oxygen reactant can be pure oxygen gas supplied by O2 /SiH4 ratio of ≦1.05. The plasma can be a high density plasma produced in an ECR or TCP reactor and the substrate can be a silicon wafer including aluminum conductor lines.

Electron field emission from phase pure nanotube films grown in a methane/hydrogen plasma

Abstract: Phase pure nanotube films were grown on silicon substrates by a microwave plasma under conditions which normally are used for the growth of chemical vapor deposited diamond films. However, instead of using any pretreatment leading to diamond nucleation we deposited metal clusters on the silicon substrate. The resulting films contain only nanotubes and also onion-like structures. However, no other carbon allotropes like graphite or amorphous clustered material could be found. The nanotubes adhere very well to the substrates and do not need any further purification step. Electron field emission was observed at fields above 1.5 V/μm and we observed an emission site density up to 104/cm2 at 3 V/μm. Alternatively, we have grown nanotube films by the hot filament technique, which allows to uniformly cover a two inch wafer.

Interface structure between silicon and its oxide by first-principles molecular dynamics

Abstract: The requirement for increasingly thin (<50 A) insulating oxide layers in silicon-based electronic devices highlights the importance of characterizing the Si–SiO2 interface structure at the atomic scale. Such a characterization relies to a large extent on an understanding of the atomic-scale mechanisms that govern the oxidation process. The widely used Deal–Grove model invokes a two-step process in which oxygen first diffuses through the amorphous oxide network before attacking the silicon substrate, resulting in the formation of new oxide at the buried interface1. But it remains unclear how such a process can yield the observed near-perfect interface2,3,4,5,6,7,8,9,10,11,12. Here we use first-principles molecular dynamics13,14,15 to generate a model interface structure by simulating the oxidation of three silicon layers. The resulting structure reveals an unexpected excess of silicon atoms at the interface, yet shows no bonding defects. Changes in the bonding network near the interface occur during the simulation via transient exchange events wherein oxygen atoms are momentarily bonded to three silicon atoms — this mechanism enables the interface to evolve without leaving dangling bonds.

Method of gap filling

Abstract: A method of gap filling by using HDPCVD. On a substrate having a conductive structure, a first oxide layer is formed to protect the conductive structure. While forming the first oxide layer no bias is applied. An argon flow with a high speed of etching/deposition is provided to form a second oxide layer. While forming the second oxide layer a triangular or trapezium profile is formed due to an etching effect to the corner. An argon flow with a low speed of etching/deposition is provided to form a third oxide layer. The gap filling is completed.

Process scheme to form controlled airgaps between interconnect lines to reduce capacitance

Abstract: A process for forming controlled airgaps (22) between metal lines (16). A two-step high density plasma (HDP) chemical vapor deposition (CVD) process is used to form the silicon dioxide dielectric layer (20) with the controlled airgaps (22). The first step involves a high gas flow and low substrate bias conditions to deposit silicon dioxide with a high deposition to sputter etch ratio. The second step uses a low gas flow and high substrate bias condition to increase the sputter component of the deposition.

Process for fabricating an array of nanowires

Abstract: An array of nanowires having a relativley constant diameter and techniques and apparatus for fabrication thereof are described. In one embodiment, a technique for melting a material under vacuum and followed by pressure injection of the molten material into the pores of a porous substrate produces continuous nanowires. In another embodiment, a technique to systematically change the channel diameter and channel packing density of an anodic alumina substrate includes the steps of anodizing an aluminum substrate with an electrolyte to provide an anodic aluminum oxide film having a pore with a wall surface composition which is different than aluminum oxide and etching the pore wall surface with an acid to affect at least one of the surface properties of the pore wall and the pore wall composition.