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Showing papers on "Substrate (electronics) published in 2001"


Patent
23 Mar 2001
TL;DR: In this paper, a thin film transistor with a ZnO film as active layer is presented, which suppresses a leak current of a gate insulating film and obtains good transistor characteristics.
Abstract: (57) Abstract: Provided is a thin film transistor including a ZnO film as a semiconductor active layer, which suppresses a leak current of a gate insulating film and obtains good transistor characteristics. A thin film transistor T1 formed on an insulating substrate 1. On the substrate 1, a gate electrode 2, a gate insulating film 31, an intermediate layer 32, and a semiconductor active layer 4 made of ZnO are sequentially formed. On the semiconductor active layer 4, a source electrode 5 and a drain electrode 6 are formed. ing. The mid layer 32 It is provided to prevent mobile ions (Zn ions) from entering the gate insulating film 32 from the semiconductor active layer (ZnO film) 4 and is made of silicon nitride.

1,124 citations


Journal ArticleDOI
TL;DR: In this paper, a new type of thin-film solar cell was proposed, which was composed of Al/ZnO:Al/CdS/CZTS/Mo-SLG.

519 citations


Journal ArticleDOI
01 Oct 2001
TL;DR: In this paper, the authors describe the technology used to produce the particles and deposit them, and discuss the details of the landing on the surface and subsequent surface kinetics, as well as the equilibrium structures and morphologies of the particles as also how the organisation of the particle assemblies is influenced by the particle-surface and interparticle interactions.
Abstract: Recently, films produced by depositing pre-formed mass-selected atomic clusters in the size range 1–10 nm have generated a great deal of attention. The ability to control the size, density and in some cases the morphology of the deposited particles allows unprecedented flexibility in the creation of new types of nanostructure. The technique enables research on the fundamental behaviour of matter at mesoscopic length scales and in addition has enormous potential in the creation of new materials whose properties can be widely varied. This review will describe the technology used to produce the particles and deposit them, and discuss the details of the landing on the surface and subsequent surface kinetics. The equilibrium structures and morphologies of the particles will be reviewed as also how the organisation of the particle assemblies is influenced by the particle–surface and inter-particle interactions. As a result of the reduced average atomic coordination, the quantum size effect and the modified screening response in nanoscale systems, the clusters display novel electronic and magnetic properties and these will be described for a range of elements including transition metals, noble and simple metals, and rare-earths. In addition to the native properties, the effect of the interaction with the substrate and other deposited particles will be explored. Finally, the work on coated particles and particles embedded in matrices will be reviewed and the potential to create new materials and devices will be discussed.

410 citations


Journal ArticleDOI
TL;DR: In this paper, the authors obtained a lower bound of 10 TΩ for the resistance of a DNA molecule at length scales larger than 40 nm, based on an extensive set of experiments in which they varied key parameters such as the base-pair sequence [mixed sequence and homogeneous poly(dG)⋅poly(dC)], length between contacts (40-500 nm), substrate (SiO2 or mica), electrode material (gold or platinum), and electrostatic doping fields.
Abstract: Electrical transport measurements are reported for double-stranded DNA molecules located between nanofabricated electrodes. We observe the absence of any electrical conduction through these DNA-based devices, both at the single-molecule level as well as for small bundles of DNA. We obtain a lower bound of 10 TΩ for the resistance of a DNA molecule at length scales larger than 40 nm. It is concluded that DNA is insulating. This conclusion is based on an extensive set of experiments in which we varied key parameters such as the base-pair sequence [mixed sequence and homogeneous poly(dG)⋅poly(dC)], length between contacts (40–500 nm), substrate (SiO2 or mica), electrode material (gold or platinum), and electrostatic doping fields. Discrepancies with other reports in the literature are discussed.

399 citations


Patent
20 Jun 2001
TL;DR: An atomic layer deposition method of forming a solid thin film layer containing silicon is described in this article, where a substrate is loaded into a chamber and a first portion of a first reactant is chemisorbed onto the substrate, and a second portion of the first reaction on the substrate is purged from the substrate and the chamber.
Abstract: An atomic layer deposition method of forming a solid thin film layer containing silicon. A substrate is loaded into a chamber. A first portion of a first reactant is chemisorbed onto the substrate, and a second portion of the first reactant is physisorbed onto the substrate. The physisorbed portion is purged from the substrate and the chamber. A second reactant is injected into the chamber. A first portion is chemically reacted with the chemisorbed first reactant to form a silicon-containing solid on the substrate. The first reactant is preferably Si[N(CH 3 ) 2 ] 4 , SiH[N(CH 3 ) 2 ] 3 , SiH 2 [N(CH 3 ) 2 ] 2 or SiH 3 [N(CH 3 ) 2 ]. The second reactant is preferably activated NH 3 .

353 citations


Patent
15 May 2001
TL;DR: In this paper, a field emission device has bundles of aligned parallel carbon nanotubes on a substrate, which are oriented perpendicular to the substrate, and can be up to 300 microns tall.
Abstract: A field emission device having bundles of aligned parallel carbon nanotubes on a substrate. The carbon nanotubes are oriented perpendicular to the substrate. The carbon nanotube bundles may be up to 300 microns tall, for example. The bundles of carbon nanotubes extend only from regions of the substrate patterned with a catalyst material. Preferably, the catalyst material is iron oxide. The substrate is preferably porous silicon, as this produces the highest quality, most well-aligned nanotubes. Smooth, nonporous silicon or quartz can also be used as the substrate. The method of the invention starts with forming a porous layer on a silicon substrate by electrochemical etching. Then, a thin layer of iron is deposited on the porous layer in patterned regions. The iron is then oxidized into iron oxide, and then the substrate is exposed to ethylene gas at elevated temperature. The iron oxide catalyzes the formation of bundles of aligned parallel carbon nanotubes which grow perpendicular to the substrate surface. The height of the nanotube bundles above the substrate is determined by the duration of the catalysis step. The nanotube bundles only grow from the patterned regions.

349 citations


Patent
24 Oct 2001
TL;DR: The atomic layer deposition (ALD) process is based upon the sequential supply of at least two separate reactants into a process chamber as discussed by the authors, where a first reactant reacts (becomes adsorbed) with the surface of the substrate via chemisorption.
Abstract: An atomic layer deposition (ALD) process is based upon the sequential supply of at least two separate reactants into a process chamber. A first reactant reacts (becomes adsorbed) with the surface of the substrate via chemisorption. The first reactant gas is removed from the chamber, and a second reactant gas reacts with the adsorbed reactant to form a monolayer of the desired film. The process is repeated to form a layer of any thickness. To reduce the process time, there is no separate purge gas used to purge the first reactant gas from the chamber prior to introducing the second gas, containing the second reactant. Instead, the purge gas also includes the second reactant. Thus, there can be very little or no delay between introducing the first and second gases. In one embodiment, a plasma of the second gas is created using an RF source, which forms energized ions and reactive atoms to drive the reaction at low temperatures.

339 citations


Journal ArticleDOI
TL;DR: In this paper, a freestanding GaN substrate over 2 inches in size was successfully prepared for the first time by hydride vapor phase epitaxy (HVPE) using GaAs as a starting substrate.
Abstract: A freestanding GaN substrate over 2 inches in size was successfully prepared for the first time by hydride vapor phase epitaxy (HVPE) using GaAs as a starting substrate. In the experiment, a GaAs (111)A substrate with a SiO2 mask pattern on its surface was used. A thick GaN layer was grown on the GaAs substrate at 1030°C through the openings in the SiO2 mask. By dissolving the GaAs substrate in aqua regia, a freestanding GaN substrate about 500 µm thick was obtained. The full-width at half maximum (FWHM) in the ω-mode X-ray diffraction (XRD) profile of GaN (0002) plane was 106 arcsec. The dislocation density of the GaN substrate obtained was determined to be as low as 2×105 cm-2 by plan-view transmission electron microscopy (TEM). Hall measurements revealed the n-type conductivity of the GaN substrate with typical carrier concentration and carrier mobility of 5×1018 cm-3 and 170 cm2V-1s-1, respectively.

332 citations


Patent
28 Jun 2001
TL;DR: The use of these nitrate-based precursors is well suited to forming high dielectric constant materials on hydrogen passivated silicon surfaces, such as nanolaminates of hafnium oxide and zirconium oxide.
Abstract: Methods of forming hafnium oxide, zirconium oxide and nanolaminates of hafnium oxide and zirconium oxide are provided. These methods utilize atomic layer deposition techniques incorporating nitrate-based precursors, such as hafnium nitrate and zirconium nitrate. The use of these nitrate based precursors is well suited to forming high dielectric constant materials on hydrogen passivated silicon surfaces.

327 citations


Journal ArticleDOI
TL;DR: In this article, a high performance photocatalytic TiO2 thin film was successfully obtained by reactive DC magnetron sputtering, which was deposited onto SiO2-coated glass at a substrate temperature of 220°C using a titanium metal target.

318 citations


Journal ArticleDOI
TL;DR: In this article, polycrystalline aluminum nitride thin films were deposited onto platinum, aluminum, and titanium electrodes by reactive magnetron sputtering in the pulsed direct current mode.
Abstract: Polycrystalline aluminum nitride thin films were deposited onto platinum, aluminum, and titanium electrodes by reactive magnetron sputtering in the pulsed direct current mode. The films exhibited all a columnar microstructure and a c-axis texture. The built-in stress and the piezoelectric properties of these films were studied as a function of both the processing conditions and the electrode material. Stress was found to be very much dependent on the growth conditions, and values ranging from strong compression to high tension were observed. The piezoelectric d33,f coefficient was shown to rely on substrate quality and ionic bombardment: The nucleation surface must be stable with regard to the nitrogen plasma and present a hexagonal symmetry and, on the other hand, enough energy must be delivered to the growing film through ionic bombardment.

Patent
16 Oct 2001
TL;DR: In this paper, a method of manufacturing a semiconductor device having a microminiture trench isolation in which an insulating film is embedded by an HDP-CVD method is presented.
Abstract: A method of manufacturing a semiconductor device having a microminiture trench isolation in which an insulating film is embedded by an HDP-CVD method comprising: a step of pre-planarization by conducting a dry etching selectively with respect to the insulating film laminated excessively on the surface of substrate, which is to be an active region, and a step of polishing by a CMP method in order to improve a surface planarity of the insulating film, wherein an etching mask used at the time of opening a trench opening portion has a multi-layer structure including a silicon nitride film and a polycrystal silicon film; the polycrystal silicon film is used as an etching stopper at the time of pre-planarization; and the silicon nitride film is used as an etching stopper at the time of polishing by a CMP method in order to remove simultaneously the excessive insulating film and the polycrystal silicon film to expose and a surface of the substrate, which is the active region, whereby the trench isolation having a satisfactory shape is obtainable.

Journal ArticleDOI
TL;DR: An ordered anodic porous alumina membrane has been used as a lithographic mask of SF6 fast atom beam etching to generate a 100 nm period antireflection structure on a silicon substrate.
Abstract: An ordered anodic porous alumina membrane has been used as a lithographic mask of SF6 fast atom beam etching to generate a 100 nm period antireflection structure on a silicon substrate. The antireflection structure consists of a deep hexagonal grating with 100 nm period and aspect ratio of 12, which is a fine two-dimensional antireflection structure. In the wavelength region from 400 to 800 nm, the reflectivity of the silicon surface decreases from around 40% to less than 1.6%. The measured results are explained well with the theoretical results calculated on the basis of rigorous coupled-wave analysis.

Journal ArticleDOI
TL;DR: Transparent conducting indium tin oxide (ITO) thin films were grown by pulsed laser deposition (PLD) on flexible polyethylene terephthalate (PET) substrates.
Abstract: Transparent conducting indium tin oxide (ITO) thin films were grown by pulsed laser deposition (PLD) on flexible polyethylene terephthalate (PET) substrates. The structural, electrical, and optical properties of these films were investigated as a function of substrate deposition temperature and background gas pressure. ITO films (200 nm thick), deposited by PLD on PET at 25 °C and 45 mTorr of oxygen, exhibit high optical transparency (∼87%) in the visible (400–700 nm) with a low electrical resistivity of 7×10−4 Ω cm. ITO films grown by PLD on PET were used as the anode contact in organic light-emitting devices. A luminous power efficiency of ∼1.6 lm/W was achieved at 100 cd/m2, slightly higher than that (∼1.5 lm/W) measured for the control device based on a sputter-deposited ITO on glass.

Patent
14 Mar 2001
TL;DR: In this article, the authors proposed a gas barrier film consisting of a substrate, a vacuum deposition film, formed on one surface or both surfaces of the above substrate, and a water-repellent layer which is a film having water repellency.
Abstract: It is an object of the present invention to provide a gas barrier film improved in gas barrier characteristics by decreasing the adsorbent of the surface of a gas barrier layer to water and the like. The present invention attains the above object by providing a gas barrier film comprising a substrate, a gas barrier layer which is a vacuum deposition film, formed on one surface or both surfaces of the above substrate, and a water-repellent layer which is a film having water repellency, formed on the above gas barrier layer.

Journal ArticleDOI
Klaus Thonke1, Th. Gruber1, N. Teofilov1, R. Schönfelder1, Andreas Waag1, Rolf Sauer1 
TL;DR: In this article, the state-of-the-art ZnO substrate material grown by seeded chemical vapour transport was investigated and the bound exciton lines were identified as donor related.
Abstract: We investigate the state-of-the-art ZnO substrate material grown by seeded chemical vapour transport. The low-temperature photoluminescence (PL) spectra are dominated by very sharp bound exciton lines, which are followed by two-electron satellite transitions. This identifies the major bound exciton lines as donor related and allows us to derive a binding energy of ≈40 meV for the very similar donors observed here. From a donor–acceptor pair transition at ≈3.22 eV and its associated band-acceptor line emerging at sample temperatures above 40 K, we calculate the acceptor binding energy as ≈195 meV. Hall data confirm these findings.

Journal ArticleDOI
TL;DR: The phase evolution and preferred orientation of the ZnO films at the initial stage of the film growth at the interface are discussed in this article, which indicates that during the initial film growth particles may satisfy the tetrahedral coordination, which results in nucleation with c-axis orientation even on the amorphous substrate.

Patent
14 Jun 2001
TL;DR: In this article, a method for producing an insulating or barrier layer, useful for semiconductor devices, comprises depositing a layer of silicon and at least one additional element on a silicon substrate whereby said deposited layer is substantially free of defects such that epitaxial silicon substantially free from defects can be deposited on said deposition layer.
Abstract: A method for producing an insulating or barrier layer, useful for semiconductor devices, comprises depositing a layer of silicon and at least one additional element on said silicon substrate whereby said deposited layer is substantially free of defects such that epitaxial silicon substantially free of defects can be deposited on said deposited layer. Alternatively, a monolayer of one or more elements, preferably comprising oxygen, is absorbed on a silicon substrate. A plurality of insulating layers sandwiched between epitaxial silicon forms a barrier composite. Semiconductor devices are disclosed which comprise said barrier composite.

Patent
11 May 2001
TL;DR: In this paper, a method of forming a silicon oxide layer over a substrate disposed in a high density plasma substrate processing chamber was proposed, where the hydrogen-containing source was selected from the group of H2, H2O, NH3, CH4 and C2H6.
Abstract: A method of forming a silicon oxide layer over a substrate disposed in a high density plasma substrate processing chamber. The silicon oxide layer is formed by flowing a process gas including a silicon-containing source, an oxygen-containing source, an inert gas and a hydrogen-containing source into the substrate processing chamber and forming a high density plasma (i.e., a plasma having an ion density of at least 1×1011 ions/cm3) from the process gas to deposit said silicon oxide layer over said substrate. In one embodiment, the hydrogen-containing source in the process gas is selected from the group of H2, H2O, NH3, CH4 and C2H6.

Journal ArticleDOI
TL;DR: In this article, the production of ordered assemblies of silicon nanostructures by means of irradiation of a Si(100) substrate with 1.2 keV Ar ions at normal incidence is reported.
Abstract: We report on the production of ordered assemblies of silicon nanostructures by means of irradiation of a Si(100) substrate with 1.2 keV Ar ions at normal incidence. Atomic Force and High-Resolution Transmission Electron microscopies show that the silicon structures are crystalline, display homogeneous height, and spontaneously arrange into short-range hexagonal ordering. Under prolonged irradiation (up to 16 hours) all dot characteristics remain largely unchanged and a small corrugation develops at long wavelengths. We interpret the formation of the dots as a result of an instability due to the sputtering yield dependence on the local surface curvature

Patent
Kent Rossman1
08 Feb 2001
TL;DR: In this paper, the authors present a method of depositing an improved seasoning film on a substrate prior to performing a substrate processing operation, forming a layer of silicon over an interior surface of the substrate processing chamber.
Abstract: Embodiments of the present invention include a method of depositing an improved seasoning film. In one embodiment the method includes, prior to performing a substrate processing operation, forming a layer of silicon over an interior surface of the substrate processing chamber as opposed to a layer of silicon oxide. In certain embodiments, the layer of silicon comprises at least 70% atomic silicon, is deposited from a high density silane (Si n H 2n+2 ) process gas and/or is deposited from a plasma having a density of at least 1×10 11 ions/cm 3 .

Journal ArticleDOI
TL;DR: In this article, the microstructural and magnetic properties of the FePt/Ag films at varied substrate temperature and thickness were studied to investigate the L10 FePts ordering.
Abstract: In this work Ag underlayers, with a slightly larger unit cell than FePt, were found not only to induce epitaxial growth of the FePt films but also to reduce the FePt ordering temperature. Without using the Ag underlayer, the FePt film deposited onto the Si substrate was fcc disordered. By the use of the Ag underlayer, it was observed that the FePt unit cells were expanded in the film plane. This has caused the shrinkage of the FePt unit cells along the film normal direction and resulted in the in situ ordering of the FePt thin film at reduced temperatures. The microstructural and magnetic properties of the FePt/Ag films at varied substrate temperature and FePt thickness were studied to investigate the L10 FePt ordering.

Journal ArticleDOI
TL;DR: In this paper, the production of ordered assemblies of silicon nanostructures by means of irradiation of a Si (100) substrate with 1.2 keV Ar+ ions at normal incidence is reported.
Abstract: We report on the production of ordered assemblies of silicon nanostructures by means of irradiation of a Si (100) substrate with 1.2 keV Ar+ ions at normal incidence. Atomic force and high-resolution transmission electron microscopies show that the silicon structures are crystalline, display homogeneous height, and spontaneously arrange into short-range hexagonal ordering. Under prolonged irradiation (up to 16 h) all dot characteristics remain largely unchanged and a small corrugation develops at long wavelengths. We interpret the formation of the dots as a result of an instability due to the sputtering yield dependence on the local surface curvature.

Journal ArticleDOI
TL;DR: In this article, it was shown that polycrystalline transistors with a grain size that increases when the temperature of the substrate is increased, and that the carrier mobility of the transistors increases with grain size.

Patent
Vidya Kaushik1
16 Apr 2001
TL;DR: In this article, the authors proposed a method to remove a single monolayer at a time by inserting a first gas to form a reaction layer on the silicon oxide and then the reaction layer is activated by either another gas or heat.
Abstract: Highe quality silicon oxide having a plurality of monolayers is grown at a high temperature on a silicon substrate. A monolayer of silicon oxide is a single layer of silicon atoms and two oxygen atoms per silicon atom bonded thereto. The silicon oxide is etched one monolayer at a time until a desired thickness of the silicon layer is obtained. Each monolayer is removed by introducing a first gas to form a reaction layer on the silicon oxide. The gas is then purged. Then the reaction layer is activated by either another gas or heat. The reaction layer then acts to remove a single monolayer. This process is repeated until a desired amount of silicon oxide layer remains. Because this removal process is limited to removing one monolayer at a time, the removal of silicon oxide is well controlled. This allows for a precise amount of silicon oxide to remain.

Patent
23 Oct 2001
TL;DR: In this article, a process for producing aluminum oxide thin films on a substrate by the ALD method comprises the steps of bonding a vaporizable aluminum compound to a growth substrate, and converting the bonded organoaluminum compound to aluminum oxide.
Abstract: A process for producing aluminum oxide thin films on a substrate by the ALD method comprises the steps of bonding a vaporizable aluminum compound to a growth substrate, and converting the bonded organoaluminum compound to aluminum oxide. The bonded aluminum compound is converted to aluminum oxide by contacting it with a reactive vapor source of oxygen other than water, and the substrate is kept at a temperature of less than 190° C. during the growth process. By means of the invention it is possible to produce films of good quality at low temperatures. The dielectric thin films having a dense structure can be used for passivating surfaces that do not endure high temperatures. Such surfaces include, for example, polymer films such as organic electroluminescent displays. Further, when a water-free oxygen source is used, surfaces that are sensitive to water can be passivated.

Journal ArticleDOI
TL;DR: In this article, a suspended membrane of silicon rich silicon nitride SiNx makes it possible to carry out the heat insulation between the heater and the substrate, and the experiments show that the temperature rise of the sensor is not sensitive to the ambient temperature.
Abstract: The techniques of micromachining silicon are used for the manufacture of an anemometer with low electric consumption and great sensitivity. To reduce the energy consumption, a suspended membrane of silicon rich silicon nitride SiNx makes it possible to carry out the heat insulation between the heater and the substrate. Platinum (Pt) thin film (3000 A) with titanium (300 A) adhesion layer on SiNx/Si substrate is used for the hot resistor. Among the methods of Pt deposition tested, electron beam evaporation gives the best results for the temperature coefficient of resistance (TCR) of Pt. Its response time is about 6 ms. Sensitivity in laminar and turbulent flow range are respectively 4.80 mV/(m/s)0.45/mW and of 0.705 mV/(m/s)0.8/mW for about 20 mW power supplied. The experiments show that the temperature rise of the sensor is not sensitive to the ambient temperature. Moreover, sensor response shows no significant changes according to parallel or perpendicular orientation of the gas flow.

Journal ArticleDOI
TL;DR: In this article, high conducting and transparent aluminum-doped zinc oxide films were prepared on quartz and corning glass 7059 substrate by ablating the sintered ZnO target containing 2 wt % Al2O3 with a XeCl excimer laser.
Abstract: Highly conducting and transparent aluminum-doped zinc oxide films were prepared on quartz and corning glass 7059 substrate by ablating the sintered ZnO target containing 2 wt % Al2O3 with a XeCl excimer laser (λ=308 nm). To grow the films, a repetition rate of 5 Hz and energy density of 1.5 J/cm2 was kept. The effect of substrate temperature from room temperature to 400 °C and oxygen pressure (0.1–5 mTorr) have been investigated by analyzing the optical and electrical properties of these films. The average transmittance was found to be in the range of 86%–92%, and a variable resistivity (ρ) 3.56×10−3–7.0×10−3 Ω cm have been obtained. The lowest resistivity was found to be 1.4×10−4 Ω cm at 300 °C in 1 mTorr of oxygen pressure. Structural changes in the films were also investigated by determining the full width at half maximum of (002) x-ray diffraction peak. These results show improvement in the crystallinity of films, which support our conductivity and transmittance data. The sharp decrease in the transmi...

Journal ArticleDOI
TL;DR: In this paper, polycrystalline ZnO thin films have been grown on Si (1.0.0) substrate using filtered cathodic vacuum arc technique, where room temperature photoluminescence reveals a strong near-band edge emission at 378-nm and a weak green emission at around 510-nm from the znO film deposited at 230°C.

Patent
27 Sep 2001
TL;DR: In this paper, a quaternary alloy film of Co-W-P-Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed.
Abstract: A method for forming a quaternary alloy film of Co—W—P—Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed. In the method, a substrate that has copper conductive regions on top is first pre-treated by two separate pre-treatment steps. In the first step, the substrate is immersed in a H2SO4 rinsing solution and next in a solution containing palladium ions for a length of time sufficient for the ions to deposit on the surface of the copper conductive regions. The substrate is then immersed in a solution that contains at least 15 gr/l sodium citrate or EDTA for removing excess palladium ions from the surface of the copper conductive regions. After the pre-treated substrate is rinsed in a first rinsing step by distilled water, the substrate is electroless plated a Co—W—P film on the surfaces of the copper conductive regions in a first plating solution that contains cobalt ions, tungstate ions, citrate ions and a reducing agent. After the substrate coated with the Co—W—P film is rinsed in a second rinsing step by distilled water, the substrate is immersed in a second electroless plating solution for depositing a Au layer on top of the Co—W—P film. The present invention novel quaternary alloy film can be used as an effective diffusion barrier layer between a copper interconnect and silicon substrate or SiO2 dielectric layers.