Showing papers on "Substrate (electronics) published in 2002"

Atomic Layer Deposition of Hafnium and Zirconium Oxides Using Metal Amide Precursors

Abstract: Atomic layer deposition (ALD) of smooth and highly conformal films of hafnium and zirconium oxides was studied using six metal alkylamide precursors for hafnium and zirconium. Water was used as an oxygen source during these experiments. As deposited, these films exhibited a smooth surface with a measured roughness equivalent to that of the substrate on which they were deposited. These films also exhibited a very high degree of conformality: 100% step coverage on holes with aspect ratios greater than 35. The films were completely uniform in thickness and composition over the length of the deposition reactor. The films were free of detectable impurities and had the expected (2:1) oxygen-to-metal ratio. Films were deposited at substrate temperatures from 50 to 500 °C from precursors that were vaporized at temperatures from 40 to 140 °C. The precursors were found to be highly reactive with hydroxylated surfaces. Their vapor pressures were measured over a wide temperature range. Deposition reactor design and ...

Catalyst-free growth and characterization of ZnO nanorods

Abstract: Highly oriented ZnO nanorods have been grown on various substrates, such as fused silica, Si(100), and sapphire (110), using a simple catalyst-free CVD method at low temperatures. TEM analyses indicate that epitaxial ZnO nanorods have been grown on sapphire (110) with the ZnO/sapphire orientational relationship [001]||[110] and [110]||[001]. In the Si(100) substrate, an amorphous SiOx interfacial layer exists between ZnO nanorods and Si(100). The well-aligned ZnO nanorods on fused silica substrates exhibit a strong UV emission and absorption at around 386 nm under room temperature. Photoluminescence and Raman spectra indicate that there is a very low concentration of oxygen vacancies in the highly oriented ZnO nanorods. Diameter control of the well-oriented and high-quality ZnO nanorods is achievable by variation of the growth conditions.

Atomic layer-deposited laaio3 films for gate dielectrics

Abstract: A dielectric film containing LaAlO 3 and method of fabricating a dielectric film contained LaAlO 3 produce a reliable gate dielectric having a thinner equivalent oxide thickness than attainable using SiO 2 . The LaAlO 3 gate dielectrics formed are thermodynamically stable such that these gate dielectrics will have minimal reactions with a silicon substrate or other structures during processing. A LaAlO 3 gate dielectric is formed by atomic layer deposition employing a lanthanum sequence and an aluminum sequence. A lanthanum sequence uses La(thd) 3 (thd=2,2,6,6-tetramethl-3,5-heptanedione) and ozone. An aluminum sequence uses either trimethylaluminium, Al(CH 3 ) 3 , or DMEAA, an adduct of alane (AlH 3 ) and dimethylehtylamine [N(CH 3 ) 2 (C 2 H 5 )], with distilled water vapor.

Site-specific growth of Zno nanorods using catalysis-driven molecular-beam epitaxy

Abstract: We report on catalyst-driven molecular beam epitaxy of ZnO nanorods. The process is site specific, as single crystal ZnO nanorod growth is realized via nucleation on Ag films or islands that are deposited on a SiO2-terminated Si substrate surface. Growth occurs at substrate temperatures on the order of 300–500 °C. The nanorods are uniform cylinders, exhibiting diameters of 15–40 nm and lengths in excess of 1 μm. With this approach, nanorod placement can be predefined via location of metal catalyst islands or particles. This, coupled with the relatively low growth temperatures needed, suggests that ZnO nanorods could be integrated on device platforms for numerous applications, including chemical sensors and nanoelectronics.

Current sensor, its production substrate, and its production process

Abstract: A new current sensor, its production substrate, and its production process, wherein the surface layer of the substrate is made of the thin film of low temperature coefficient of resistivity such as nickel-copper alloy, manganese-copper alloy or nickel-chromium alloy, it is tightly adhered onto the thin plates of ceramic, aluminum oxide, aluminum nitride or Beryllium dioxide (BeO) to form a new substrate by a hot-press laminating; next, by optical mask etching, the pattern of current sensor are formed on the surface of the substrate; and the flip-chip is formed on the lateral electrodes in the bottom of the current sensor unit, and the front electrodes are plated to increase the thickness; then, the pattern are modified with laser to obtain the pattern of sensor with precise and constant resistivity; after that, and the pattern of a sensor are coated with a protection layer; and the substrate is segmented, and is plated on the end face electrode 60 by sputtering; finally, a single and small chip-scaled current sensor is obtained by dicing and barrel plating.

Measurement of thermal conductivity of silicon dioxide thin films using a 3ω method

Abstract: The thermal conductivity of SiO2 thin films prepared using various procedures has been studied using a 3ω method. The thermal conductivity of SiO2 thin films of above approximately 500 nm thickness decreases as the porosity of the specimen, which is determined by infrared absorption spectroscopy, increases. Below approximately 250 nm thickness, the observed thermal conductivity of the SiO2 thin films systematically decreases as a function of film thickness. The data have been analyzed based on a SiO2-thickness-independent thermal conductivity and interfacial resistance. The total estimated interfacial resistance between the metal strip and the film, and between the film and the substrate is about 2×10−8 m2 KW−1.

Molten gallium as a catalyst for the large-scale growth of highly aligned silica nanowires.

Abstract: The vapor-liquid-solid (VLS) process is a fundamental mechanism for the growth of nanowires, in which a small size (5-100 nm in diameter), high melting point metal (such as gold and iron) catalyst particle directs the nanowire's growth direction and defines the diameter of the crystalline nanowire. In this article, we show that the large size (5-50 Im in diameter), low melting point gallium droplets can be used as an effective catalyst for the large-scale growth of highly aligned, closely packed silica nanowire bunches. Unlike any previously observed results using gold or iron as catalyst, the gallium-catalyzed VLS growth exhibits many amazing growth phenomena. The silica nanowires tend to grow batch by batch. For each batch, numerous nanowires simultaneously nucleate, grow at nearly the same rate and direction, and simultaneously stop growing. The force between the batches periodically lifts the gallium catalyst upward, forming two different kinds of products on a silicon wafer and alumina substrate. On the silicon wafer, carrot-shaped tubes whose walls are composed of highly aligned silica nanowires with diameters of 15- 30 nm and length of 10-40 Im were obtained. On the alumina substrate, cometlike structures composed of highly oriented silica nanowires with diameters of 50-100 nm and length of 10-50 Im were formed. A growth model was proposed. The experimental results expand the VLS mechanism to a broader range.

Growth kinetics and mechanisms of aluminum-oxide films formed by thermal oxidation of aluminum

Abstract: The growth kinetics and mechanisms of thin aluminum-oxide films formed by the dry, thermal oxidation of a bare Al(431) substrate at a partial oxygen pressure of 1.33×10−4 Pa in the temperature range of 373–773 K were studied using x-ray photoelectron spectroscopy. The initial oxidation of the bare Al substrate proceeds by an island-by-layer growth mechanism, involving the lateral diffusion over the bare Al substrate surface of mobile oxygen species. At low temperatures (T⩽573 K), an amorphous oxide film develops that attains a limiting (uniform) thickness. At high temperatures (T>573 K), growth is not impeded at a limiting thickness. Kinetic analysis established the occurrences of two different oxide-film growth regimes: an initial regime of very fast oxide-film growth and a second, much slower oxidation stage that is observed only at T>573 K. These results could be discussed in terms of electric-field controlled, interstitial, outward transport of Al cations through a close packing of O anions in the amo...

Organic light-emitting devices with extended operating lifetimes on plastic substrates

Abstract: We fabricate long-lived organic light-emitting devices using a 175 μm thick polyethylene terephthalate substrate coated with an organic–inorganic multilayered barrier film and compare the rate of degradation to glass-based devices. The observed permeation rate of water vapor through the plastic substrate was estimated to be 2×10−6 g/m2/day. Driven at 2.5 mA/cm2, we measure a device lifetime of 3800 h from an initial luminance of 425 cd/m2.

Apparatus and method to achieve continuous interface and ultrathin film during atomic layer deposition

Abstract: A method and apparatus for performing atomic layer deposition in which a surface of a substrate is pretreated to make the surface of the substrate reactive for performing atomic layer deposition.

Gallium nitride materials and methods

Abstract: The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.

A π-Stacking Terthiophene-Based Quinodimethane Is an n-Channel Conductor in a Thin Film Transistor

Abstract: A terthiophene-based quinodimethane, 3‘,4‘-dibutyl-5,5‘ ‘-bis(dicyanomethylene)-5,5‘ ‘-dihydro-2,2‘:5‘,2‘ ‘-terthiophene (1) was synthesized and crystallized. Compound 1 has a planar quinoid geometry that is stabilized by dicyanomethylene groups at each end of the molecule. In the crystal each molecule is part of a dimerized face-to-face π-stack, with intermolecular spacings of 3.47 and 3.63 A, respectively. Cyclic voltammetry showed that 1 could be reversibly reduced and oxidized in methylene chloride solution. Thin film transistors (TFTs) were prepared by vacuum evaporation of 1 onto SiO2(300 nm)/Si substrates, followed by evaporation of Ag source and drain contacts. The doped Si substrate served as the gate electrode. X-ray diffraction and atomic force microscopy indicate the films are polycrystalline, with the long axes of the molecules approximately perpendicular to the substrate. The TFT measurements revealed n-channel conduction in films of 1, with room-temperature electron field effect mobilities ...

Very low bulk and surface recombination in oxidized silicon wafers

Abstract: Bulk and surface processes determine the recombination rate in crystalline silicon wafers. In this paper we report effective lifetime measurements for a variety of commercially available float-zone silicon wafers that have been carefully passivated using alnealed silicon oxide. Different substrate resistivities have been explored, including both p-type (boron) and n-type (phosphorus) dopants. Record high effective lifetimes of 29 and 32 ms have been measured for 90 Ω cm n-type and 150 Ω cm p-type silicon wafers, respectively. The dependence of the effective lifetime has been measured for excess carrier densities in the range of 1012–1017 cm−3. These results demonstrate that very low bulk and surface recombination rates can be maintained during high-temperature oxidation (1050 °C) by carefully optimizing the processing conditions.

Passivation method for improved uniformity and repeatability for atomic layer deposition and chemical vapor deposition

Abstract: A method to deposit a passivating layer of a first material on an interior reactor surface of a cold or warm wall reactor, in which the first material is non-reactive with one or more precursors used to form a second material. Subsequently when a film layer is deposited on a substrate by subjecting the substrate to the one or more precursors, in which at least one precursor has a low vapor pressure, uniformity and repeatability is improved by the passivation layer.

Three-dimensional integrated semiconductor devices

Abstract: The present invention describes a process for three-dimensional integration of semiconductor devices and a resulting device. The process combines low temperature wafer bonding methods with backside/substrate contact processing methods, preferably with silicon on insulator devices. The present invention utilizes, in an inventive fashion, low temperature bonding processes used for bonded silicon on insulator (SOI) wafer technology. This low temperature bonding technology is adopted for stacking several silicon layers on top of each other and building active transistors and other circuit elements in each one. The back-side/substrate contact processing methods allow the interconnection of the bonded SOI layers.

Low temperature gate stack

Abstract: The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed. The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300° C.

Thin film device transfer method, thin film device, thin film integrated circuit device, active matrix board, liquid crystal display, and electronic apparatus

Abstract: A thin film device fabrication method in which a thin film device formed on a substrate are transferred to a primary destination-of-transfer part and then the thin film device is transferred to a secondary destination-of-transfer part. A first separation layer ( 120 ) made of such a material as amorphous silicon is provided on a substrate ( 100 ) which allows passage of laser. A thin film device ( 140 ) such as TFTs are formed on the substrate ( 100 ). Further, a second separation layer ( 160 ) such as a hot-melt adhesive layer is formed on the thin film devices ( 140 ), and a primary destination-of-transfer part ( 180 ) is mounted thereon. The bonding strength of the first separation layer is weakened by irradiation with light, and the substrate ( 100 ) is removed. Thus, the thin film device ( 140 ) is transferred to the primary destination-of-transfer part. Then, a secondary destination-of-transfer part ( 200 ) is attached onto the bottom of an exposed part of the thin film device ( 140 ) via an adhesive layer ( 190 ). Thereafter, the bonding strength of the second separation layer is weakened by such means as thermal fusion, and the primary destination-of-transfer part is removed. In this manner, the thin film device ( 140 ) can be transferred to the secondary destination-of-transfer part ( 200 ) while maintaining layering relationship with respect to the substrate ( 100 ).

Properties of hafnium oxide films grown by atomic layer deposition from hafnium tetraiodide and oxygen

Abstract: Polycrystalline monoclinic HfO2 films were atomic layer deposited on Si(100) substrates by a nonhydrous carbon-free process of HfI4 and O2. The oxygen to hafnium ratio corresponded to the stoichiometric dioxide within the limits of accuracy of ion beam analysis. A 1.5–2.0 nm thick SiO2 interface layer formed between the HfO2 films and Si substrates. Hysteresis of the capacitance–voltage curves was observed in Al/HfO2/p-Si(100) structures with oxide grown in the substrate temperature range of 570–755 °C. The hysteresis ceased with an increase in O2 pressure. The effective permittivity of the dielectric layers varied between 12 and 16. The breakdown voltages were found to be lower in the case of higher oxygen doses and higher HfO2 deposition temperatures.

Vertically segregated polymer-blend photovoltaic thin-film structures through surface-mediated solution processing

Abstract: Surface treatment and solvent evaporation control are used to promote vertical segregation in polyfluorene-blend thin films. This surface-mediated control of the compositional structure in the direction normal to the plane of the film has important implications for optimizing charge transport in solution-processed conjugated polymer-blend optoelectronics. Here, the surface energy of the hole-collector electrode of photovoltaic devices is modified by deposition of self-assembled monolayers to favor segregation of the hole-accepting component of the blend to the substrate. Devices fabricated with intentionally vertically segregated blends showed external quantum efficiencies of up to 14%, which is ten times higher than that of devices fabricated without surface modification.

Semiconductor light-emitting device

Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor light emitting device using a gallium nitride series semiconductor, wherein the semiconductor light emitting device such as a light emitting diode or the like having a high luminous efficiency even by using a silicon substrate is obtained. SOLUTION: The semiconductor light emitting device has such a structure that the surface of an active layer 6 composed of the gallium nitride series semiconductor has the uneven structure of a pyramid shape, and the recess of this uneven structure is filled with a first clad layer 7 composed of a p-type gallium nitride series semiconductor. Preferably, the dislocation defect density of a second clad layer 5 composed of an n-type gallium nitride series semiconductor forming a part of an underlaying layer of the active layer 6 is 10 9 to 10 11 /cm 2 , and preferably, the gap of a dislocation defect in the second clad layer 5 is 120 to 170 nm. Further, preferably, the entire thickness of the underlaying layer is 3 μm or less. The active layer 6 is formed by an organic metal vapor deposition, and its film forming pressure conditions are set to atmospheric pressure or rather lower pressure than the atmospheric pressure. COPYRIGHT: (C)2005,JPO&NCIPI

Atomic layer-deposited hafnium aluminum oxide

Abstract: A dielectric film containing HfAlO3 and a method of fabricating such a dielectric film produce a reliable gate dielectric having an equivalent oxide thickness thinner than attainable using SiO2. A gate dielectric is formed by atomic layer deposition employing a hafnium sequence and an aluminum sequence. The hafnium sequence uses HfCl4 and water vapor. The aluminum sequence uses either trimethylaluminum, Al(CH3)3, or DMEAA, an adduct of alane (AlH3) and dimethylethylamine [N(CH3)2(C2H5)], with distilled water vapor. These gate dielectrics containing a HfAlO3 film are thermodynamically stable such that the HfAlO3 film will have minimal reactions with a silicon substrate or other structures during processing.

Semiconductor device and its manufacture method

Abstract: A semiconductor device formed by cutting a first substrate and a second substrate bonded together by a spacer, wherein: the spacer is disposed at an end of the first substrate after cutting; the second substrate is a semiconductor wafer formed with a light reception element or elements; and the first substrate has an optical element or an optical element set for converging light on the light reception element or elements. A method of manufacturing such a semiconductor device. A semiconductor device manufacture method includes: a step of detecting a warp of a semiconductor substrate; a step of holding the semiconductor substrate on a base under a condition that the warp is removed; a step of bonding an opposing substrate to the semiconductor substrate; and a step of cutting the opposing substrate, wherein the opposing substrate bonded to the semiconductor substrate is set with a size corresponding to the warp of the semiconductor substrate or with a gap to an adjacent opposing substrate.

Low-voltage inverted transparent vacuum deposited organic light-emitting diodes using electrical doping

Abstract: We demonstrate low-voltage inverted transparent vacuum deposited organic light-emitting diodes employing an indium-tin-oxide coated glass substrate directly as cathode and a semitransparent top Au thin film as anode. The devices comprise an intrinsic 8-tris-hydroxyquinoline aluminum (Alq3) emitting layer sandwiched in between n- and p-doped charge transport layer with appropriate blocking layers. They exhibit low driving voltages (∼4 V for a luminance of ∼100 cd/m2). The devices are about 50% transparent in the Alq3 emission region and emit green light from both sides with a total external current efficiency of about 2.5 cd/A.

Determination of channel temperature in AlGaN/GaN HEMTs grown on sapphire and silicon substrates using DC characterization method

Abstract: Self-heating effects and temperature rise in AlGaN/GaN HEMTs grown on silicon and sapphire substrates are studied, exploiting transistor DC characterization methods A negative differential output resistance is observed for high dissipated power levels An analytical formula for a source-drain current drop as a function of parasitic source resistance and threshold voltage changes is proposed to explain this behavior The transistor source resistance and threshold voltage is determined experimentally at different elevated temperatures to construct channel temperature versus dissipated power transfer characteristic It is found that the HEMT channel temperature increases rapidly with dissipated power and at 6 W/mm reaches values of /spl sim/320/spl deg/C for sapphire and /spl sim/95/spl deg/C for silicon substrate, respectively

Growth of Au-catalyzed ordered GaAs nanowire arrays by molecular-beam epitaxy

Abstract: Ordered gallium arsenide (GaAs) nanowires are grown by molecular-beam epitaxy on GaAs (111)B substrates using Au-catalyzed vapor–liquid–solid growth defined by nanochannel alumina (NCA) templates. Field-emission scanning electron microscope images show highly ordered nanowires with a growth direction perpendicular to the substrate. The size (i.e., diameter) distribution of the wires is drastically narrowed by depositing the gold catalyst through an NCA template mask; this narrows the size distribution of the gold dots and arranges them in a well-ordered array, as defined by the NCA template. The nanowire diameter distribution full width at half maximum on the masked substrate is 5.1 nm, compared with 15.7 nm on an unmasked substrate.

Impact of thermal strain on the dielectric constant of sputtered barium strontium titanate thin films

Abstract: Barium strontium titanate thin films were deposited by sputtering on Pt/SiO2 structures using five different host substrates: magnesium oxide, strontium titanate, sapphire, silicon, and vycor glass. These substrates were chosen to provide a systematic change in thermal strain while maintaining the same film microstructure. All films have a weakly textured microstructure. Temperature dependent dielectric measurements from 100–500 K determined that decreasing thermal expansion coefficient of the host substrate (i.e., larger tensile thermal strain) reduced the film dielectric permittivity. The experimentally determined Curie–Weiss temperature decreased with increasing tensile thermal strain and the Curie–Weiss constant increased with tensile strain as predicted by Pertsev et al. [J. Appl. Phys. 85, 1698 (1999)].