Showing papers on "Substrate (electronics) published in 2004"

Large-Scale Hexagonal-Patterned Growth of Aligned ZnO Nanorods for Nano-optoelectronics and Nanosensor Arrays

Abstract: An effective approach is demonstrated for growing large-area, hexagonally patterned, aligned ZnO nanorods. The synthesis uses a catalyst template produced by a self-assembled monolayer of submicron spheres and guided vapor-liquid-solid (VLS) growth on a single crystal alumina substrate. The ZnO nanorods have uniform shape and length, align vertically on the substrate, and are distributed according to the pattern defined by the catalyst template. The nanorods grow along [0001] with side surfaces defined by {2110}. This approach opens the possibility of creating patterned one-dimensional nanostructures for applications as sensor arrays, piezoelectric antenna arrays, optoelectronic devices, and interconnects.

Reversible Switching between Superhydrophilicity and Superhydrophobicity

Abstract: Wettability is a very important property that is governed by both chemical composition and surface structure. Recently, the control of surface wettability has aroused great interest because of its wide variety of applications. In general, superhydrophobic surfaces with a water contact angle (CA) greater than 1508 can be obtained by controlling the topography of hydrophobic surfaces, while superhydrophilic surfaces with a CA about 08 can be realized through a 3D or 2D capillary effect on hydrophilic surfaces. Stimuli-responsive surfaces make it possible to reversibly control the wettability of the surface and has been demonstrated by various methods, including light-irradiation, 12] use of an electric field, 14] thermal treatment and treatment with solvent. However, reversible switching between superhydrophilicity and superhydrophobicity has never been reported. Herein we show the roughness-enhanced thermally responsive wettability of a poly(N-isopropylacrylamide) (PNIPAAm)-modified surface. 18] Reversible switching between superhydrophilicity and superhydrophobicity can be achieved in a narrow temperature range of about 10 8C, which is considered to result from the combined effect of the chemical variation of the surface, and surface roughness. Such switchable surfaces may have wide applications in functional textiles, intelligent microfluidic switching, controllable drug release, and thermally responsive filters. Surface-initiated atom-transfer radical polymerization 20] was used to fabricate thermally responsive PNIPAAm thin films on both a flat and a rough silicon substrate. Results from atomic force microscopy (AFM) and scanning electron microscopy (SEM) showed that the thickness of the PNIPAAm thin film could be well controlled by the polymerization time. Figure 1a (left) shows a typical SEM image of a rough substrate that has been modified with a PNIPAAm thin film. Compared with the smooth surface (Figure 1a right) of the flat substrate, the rough substrate exhibits a regular array of square silicon microconvexes (bright squares). The dark lines are microgrooves that are about 6 mm in width and about 5 mm in depth. These microgrooves were generated by a laser cutter (see Experimental Section) on a silicon wafer in a region of about 1 : 1 cm. The surface roughness can be adjusted by controlling the spacing between the grooves. In our experiments, different groove spacings of about 31 mm, 18 mm, 8 mm, and 6 mm were selected. The magnified image of the rough surface shows that both microconvexes and microgrooves were also rather rough (Figure 1b). Further magnified SEM images of the silicon microconvexes before (Figure 1c) and after (Figure 1d) PNIPAAm polymerization show that these

A 90-nm logic technology featuring strained-silicon

Abstract: A leading-edge 90-nm technology with 1.2-nm physical gate oxide, 45-nm gate length, strained silicon, NiSi, seven layers of Cu interconnects, and low-/spl kappa/ CDO for high-performance dense logic is presented. Strained silicon is used to increase saturated n-type and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) drive currents by 10% and 25%, respectively. Using selective epitaxial Si/sub 1-x/Ge/sub x/ in the source and drain regions, longitudinal uniaxial compressive stress is introduced into the p-type MOSEFT to increase hole mobility by >50%. A tensile silicon nitride-capping layer is used to introduce tensile strain into the n-type MOSFET and enhance electron mobility by 20%. Unlike all past strained-Si work, the hole mobility enhancement in this paper is present at large vertical electric fields in nanoscale transistors making this strain technique useful for advanced logic technologies. Furthermore, using piezoresistance coefficients it is shown that significantly less strain (/spl sim/5 /spl times/) is needed for a given PMOS mobility enhancement when applied via longitudinal uniaxial compression versus in-plane biaxial tension using the conventional Si/sub 1-x/Ge/sub x/ substrate approach.

Semiconductor device and method for forming the same

Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3

FTIR study of polycaprolactone chain organization at interfaces.

Abstract: Polycaprolactone (PCL), extensively known as a biomaterial, is the subject of this paper. Knowing well that some biomaterial applications exhibit specific chain organization, we focused our study on the orientation of PCL chains when this polymer is adsorbed (spin-coated) on inert substrates such as gold-coated glass slides. The main technique allowing adsorbed thin films analysis that we chose is polarization-modulation infrared reflection-absorption spectroscopy (PM-IRRAS), which permits qualitative and quantitative determination of chain anisotropy in the confined layers at the interface. Based on our spectroscopic results, we achieved an adsorption model of PCL chains and we calculated orientation angles with respect to the substrate normal. Calculated values show a quasi-perpendicular deposition of PCL chains on the gold substrate. Moreover, PCL thin films remain highly crystalline, a fact which could be the basis of the important anisotropy of PCL chains.

ZnO nanowire growth and devices

Abstract: The large surface area of ZnO nanorods makes them attractive for gas and chemical sensing, and the ability to control their nucleation sites makes them candidates for micro-lasers or memory arrays. In addition, they might be doped with transition metal (TM) ions to make spin-polarized light sources. To date, most of the work on ZnO nanostructures has focused on the synthesis methods and there have been only a few reports of the electrical characteristics. We review fabrication methods for obtaining device functionality from single ZnO nanorods. A key aspect is the use of sonication to facilitate transfer of the nanorods from the initial substrate on which they are grown to another substrate for device fabrication. Examples of devices fabricated using this method are briefly described, including metal-oxide semiconductor field effect depletion-mode transistors with good saturation behavior, a threshold voltage of ∼−3 V and a maximum transconductance of order 0.3 mS/mm and Pt Schottky diodes with excellent ideality factors of 1.1 at 25 °C and very low (1.5 × 10 −10 A, equivalent to 2.35 A cm −2 , at −10 V) reverse currents. The photoresponse showed only a minor component with long decay times (tens of seconds) thought to originate from surface states. These results show the ability to manipulate the electron transport in nanoscale ZnO devices.

Crystallographic alignment of high-density gallium nitride nanowire arrays

Abstract: Single-crystalline, one-dimensional semiconductor nanostructures are considered to be one of the critical building blocks for nanoscale optoelectronics1 Elucidation of the vapour–liquid–solid growth mechanism2 has already enabled precise control over nanowire position and size1,3,4,5,6,7,8, yet to date, no reports have demonstrated the ability to choose from different crystallographic growth directions of a nanowire array Control over the nanowire growth direction is extremely desirable, in that anisotropic parameters such as thermal and electrical conductivity, index of refraction, piezoelectric polarization, and bandgap may be used to tune the physical properties of nanowires made from a given material Here we demonstrate the use of metal–organic chemical vapour deposition (MOCVD) and appropriate substrate selection to control the crystallographic growth directions of high-density arrays of gallium nitride nanowires with distinct geometric and physical properties Epitaxial growth of wurtzite gallium nitride on (100) γ-LiAlO2 and (111) MgO single-crystal substrates resulted in the selective growth of nanowires in the orthogonal [110] and [001] directions, exhibiting triangular and hexagonal cross-sections and drastically different optical emission The MOCVD process is entirely compatible with the current GaN thin-film technology, which would lead to easy scale-up and device integration

Effect of substrate-induced strain on the structural, electrical, and optical properties of polycrystalline ZnO thin films

Abstract: The effect of substrate-induced strain in polycrystalline ZnO thin films on different substrate, e.g., GaN epilayer, sapphire (0001), quartz glass, Si(111)∕SiO2, and glass deposited by sol-gel process, has been investigated by x-ray diffraction, scanning electron microscope, electrical resistivity, and photoluminescence measurements. A strong dependence of orientation, crystallite size, and electrical resistivity upon the substrate-induced strain along the c axis has been found. The results of structural and morphological studies indicate that relatively larger tensile strain exists in ZnO deposited on sapphire and glass, while a smaller compressive strain appears in film deposited on GaN and the strain is relaxed in larger crystallite size. The electrical resistivity of the films increases exponentially with increasing strain. The excitonic peak positions are found to shift slightly towards lower energy side with increasing strain. The analysis shows that GaN being a closely lattice-matched substrate produces ZnO films of better crystallinity with a lower resistivity.

Organic Thin Film Transistors Based on N-Alkyl Perylene Diimides: Charge Transport Kinetics as a Function of Gate Voltage and Temperature

Abstract: We report structural and electrical transport properties of a family of π-stacking soluble organic semiconductors, N,N‘-dialkyl-3,4,9,10-perylene tetracarboxylic diimides (alkyl − pentyl [1], octyl [2], and dodecyl [3]). The structures of evaporated polycrystalline films of 1−3 were studied using X-ray diffraction and atomic force microscopy. Films of 1−3 pack similarly with the direction of π−π overlap in the substrate plane. Organic thin film transistors (OTFTs) based on 1−3 deposited on SiO2 gate dielectric showed linear regime electron mobilities of 0.1, 0.6, and 0.2 cm2/(V s), respectively, corrected for contact resistance. OTFTs of 2 had saturation electron mobilities as high as 1.7 cm2/(V s) with on-to-off current ratios of 107. Variable temperature measurements were used to examine the charge transport kinetics in the range 80−300 K and revealed (1) thermally activated electron mobilities with activation energies dependent on gate voltage and (2) the presence of well-defined isokinetic points, i.e...

Building Blocks for n-Type Molecular and Polymeric Electronics. Perfluoroalkyl- versus Alkyl-Functionalized Oligothiophenes (nT; n = 2−6). Systematics of Thin Film Microstructure, Semiconductor Performance, and Modeling of Majority Charge Injection in Field-Effect Transistors

Abstract: The solid-state properties and FET electrical behavior of several series of α,ω- and β,β‘-fluorocarbon- and alkyl-substituted and unsubstituted oligothiophenes nTs (n = 2−6) are compared and contrasted. The thin films were grown by slow vacuum deposition over a range of substrate temperatures and/or by casting from solution and were investigated by X-ray diffraction and scanning electron microscopy. Our results indicate that vacuum deposition at 60−80 °C affords films with remarkably similar microstructures despite the extensive H → F substitution. Trends in observed d spacing versus molecular core extension provide quantitative information on molecular orientation. Field-effect transistor measurements performed for all systems and having the same device structure, components, and fabrication conditions demonstrate that all nTs functionalized with fluorocarbon chains at the thiophene termini are n-type semiconductors, in contrast to the p-type activity of the remaining systems. One of these systems, α,ω-d...

Efficiency enhancement of Cu(In,Ga)Se2 solar cells due to post-deposition Na incorporation

Abstract: Cu(In,Ga)Se2 (CIGS) absorber layers for thin-film solar cells were grown without sodium. Na was diffused into some of the absorbers after growth, which led to strongly improved device performance compared with Na-free cells. Efficiencies of 13.3% and 14.4% were achieved at substrate temperatures as low as 400 and 450 °C, respectively. With the post-deposition treatment, the effects of Na on CIGS growth are excluded, and most of the Na is expected to reside at grain boundaries. The dominating cause for Na-induced device improvements might be passivation of grain boundaries.

High mobility of dithiophene-tetrathiafulvalene single-crystal organic field effect transistors.

Abstract: Single-crystal field effect transistors of the organic semiconductor dithiophene-tetrathiafulvalene (DT-TTF) were prepared by drop casting. Long, thin crystals connected two microfabricated gold electrodes, and a silicon substrate was used as a back gate. The highest hole mobility observed was 1.4 cm2/Vs, which is the highest reported for an organic semiconductor not based on pentacene. A high ON/OFF ratio of at least 7 x 105 was obtained for this device.

Systems and methods of forming refractory metal nitride layers using disilazanes

Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.

Well‐Aligned ZnO Nanowire Arrays Fabricated on Silicon Substrates

Abstract: Arrays of well-aligned single-crystal zinc oxide (ZnO) nanowires of uniform diameter and length have been synthesized on a (100) silicon substrate via a simple horizontal double-tube system using chemical vapor transport and condensation method. X-ray diffraction and transmission electron microscopy (TEM) characterizations showed that the as-grown nanowires had the single-crystal hexagonal wurtzite structure with detectable defects and a growth direction. Raman spectra revealed phonon confinement effect when compared with those of ZnO bulk powder, nanoribbons, and nanoparticles. Photoluminescence exhibited strong ultraviolet emission at 3.29 eV under 355 nm excitation and green emission at 2.21 eV under 514.5 nm excitation. No catalyst particles were found at the tip of the nanowires, suggesting that the growth mechanism followed a self-catalyzed and saturated vapor–liquid–solid (VLS) model. Self-alignment of nanowires was attributed to the local balance and steady state of vapor flow at the substrate. The growth technique would be of particular interest for direct integration in the current silicon-technology-based optoelectronic devices.

Precursors for depositing silicon containing films and processes thereof

Abstract: Inorganic precursors, namely iodosilane precursors, for the low temperature, low pressure deposition of silicon-containing films is provided therein. In one aspect, there is provided a process for forming a silicon-containing film process comprising: introducing a substrate and gaseous reagents comprising an iodosilane precursor having three or less iodine atoms bound to the silicon atom and at least one reagent selected from an oxygen-containing reactive gas, a nitrogen-containing reactive gas, a hydrogen-containing reactive gas and mixtures thereof into a reaction chamber; heating the reaction chamber to one or more temperatures ranging from 200° C. to 900° C. to form the silicon containing film on the substrate, provided that if the iodosilane precursor has three iodine atoms bound to the silicon atom then the heating step is conducted at one or more pressures less than 600 Torr.

Method for making a semiconductor device having a high-k gate dielectric

Abstract: A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate a gate dielectric with a graded dielectric constant.

Glass-based soi structures

Abstract: Semiconductor-on-insulator (SOI) structures, including large area SOI structures, are provided which have one or more regions composed of a layer (15) of a substantially single-crystal semiconductor (e.g., doped silicon) attached to a support substrate (20) composed of an oxide glass or an oxide glass-ceramic. The oxide glass or oxide glass-ceramic is preferably transparent and preferably has a strain point of less than 1000°C, a resistivity at 250°C that is less than or equal to 1016 -cm, and contains positive ions (e.g., alkali or alkaline-earth ions) which can move within the glass or glass-ceramic in response to an electric field at elevated temperatures (e.g., 300 - 1000°C). The bond strength between the semiconductor layer (15) and the support substrate (20) is preferably at least 8 joules/meter2. The semiconductor layer (15) can include a hybrid region (16) in which the semiconductor material has reacted with oxygen ions originating from the glass or glass-ceramic. The support substrate (20) preferably includes a depletion region (23) which has a reduced concentration of the mobile positive ions.

Photoluminescent properties of copper-doped zinc oxide nanowires

Abstract: Copper-doped zinc oxide nanowires were fabricated on copper-coated silicon substrate by sintering a mixture of zinc oxide and graphite powders at high temperature. Copper functioned as a catalyst in the zinc oxide nanowire growth and was incorporated during the growth as a dopant. The size of copper-doped zinc oxide nanowires ranges from 30 to 100 nm in diameter and tens to hundreds of microns in length. The photoluminescent excitation spectra showed multiple absorption peaks in the ultraviolet and blue/green region. Correspondingly, broad and continuous photoluminescence spectra were observed extending from the ultraviolet to the red region with shoulder peaks at room temperature, which is different from that of the bulk. The x-ray photoelectron spectroscopy and low temperature photoluminescence were employed to analyse the luminescent mechanism.

Ultrafast Electron Crystallography of Interfacial Water

Abstract: We report direct determination of the structures and dynamics of interfacial water on a hydrophilic surface with atomic-scale resolution using ultrafast electron crystallography. On the nanometer scale, we observed the coexistence of ordered surface water and crystallite-like ice structures, evident in the superposition of Bragg spots and Debye-Scherrer rings. The structures were determined to be dominantly cubic, but each undergoes different dynamics after the ultrafast substrate temperature jump. From changes in local bond distances (OH··O and O···O) with time, we elucidated the structural changes in the far-from-equilibrium regime at short times and near-equilibration at long times.

Role of fluorocarbon film formation in the etching of silicon, silicon dioxide, silicon nitride, and amorphous hydrogenated silicon carbide

Abstract: The etching of Si, SiO2, Si3N4, and SiCH in fluorocarbon plasmas is accompanied by the formation of a thin steady-state fluorocarbon film at the substrate surface. The thickness of this film and the substrate etch rate have often been related. In the present work, this film has been characterized for a wide range of processing conditions in a high-density plasma reactor. It was found that the thickness of this fluorocarbon film is not necessarily the main parameter controlling the substrate etch rate. When varying the self-bias voltage, for example, we found a weak correlation between the etch rate of the substrate and the fluorocarbon film thickness. Instead, for a wide range of processing conditions, it was found that ion-induced defluorination of the fluorocarbon film plays a major role in the etching process. We therefore suggest that the fluorocarbon film can be an important source of fluorine and is not necessarily an etch-inhibiting film.

Enhanced light extraction efficiency from organic light emitting diodes by insertion of a two-dimensional photonic crystal structure

Abstract: We studied the characteristics of organic light emitting diode (OLED) devices containing two-dimensional (2D) SiO2∕SiNx photonic crystal (PC) layers. The finite-difference time-domain (FDTD) method was employed for the design and analysis of the PC OLED. Based on the design parameters derived from the FDTD calculations, a 2D PC layer was introduced on the glass substrate of a typical OLED structure by two-step irradiated hologram lithography and reactive ion etching. Experiments showed that incorporation of the PC layer improved the light extraction efficiency by over 50% compared to the conventional OLED, without noticeable degradation in electrical characteristics, under typical operating conditions. This improvement originates from the liberation of the photons trapped in the high-index guiding layers.

Three-dimensional integrated circuit structure and method of making same

Abstract: Vertically oriented semiconductor devices may be added to a separately fabricated substrate that includes electrical devices and/or interconnect The plurality of vertically oriented semiconductor devices are physically separated from each other, and are not disposed within the same semiconductor body, or semiconductor substrate The plurality of vertically oriented semiconductor devices may be added to the separately fabricated substrate as a thin layer including several doped semiconductor regions which, subsequent to attachment, are etched to produce individual doped stack structures Alternatively, the plurality of vertically oriented semiconductor devices may be fabricated prior to attachment to the separately fabricated substrate The doped stack structures may form the basis for diodes, capacitors, n-MOSFETs, p-MOSFETs, bipolar transistors, and floating gate transistors Ferroelectric memory devices, Ferromagnetic memory devices, chalcogenide phase change devices, may be formed in a stackable add-on layer for use in conjunction with a separately fabricated substrate Stackable add-on layers may include interconnect lines

Variable temperature film and contact resistance measurements on operating n-channel organic thin film transistors

Abstract: We report structural and electrical properties in thin films of an n-channel organic semiconductor, N,N′-dipentyl-3,4,9,10-perylene tetracarboxylic dimide (PTCDI–C5). The structure of polycrystalline thin films of PTCDI–C5 was studied using x-ray diffraction and atomic force microscopy. Films order with single crystal-like packing, and the direction of π-π overlap is in the substrate plane. Organic thin film transistors (OTFTs) based on PTCDI–C5 were fabricated on hydrophobic and hydrophilic substrates. OTFTs showed effective mobility as high as 0.1 cm2/V s. Contact resistance of operating OTFTs was studied using resistance versus length plots and a four-probe method for three different contact metals (Au, Ag, Ca). Typical OTFTs had a specific contact resistance of 8×104 Ω cm at high gate voltage. There was no dependence of contact resistance with contact metal. Variable temperature measurements revealed that film resistance in the OTFT was activated in the temperature range 100–300 K, with typical activa...

Supramolecular organization in ultra-thin films of α-sexithiophene on silicon dioxide

Abstract: The supramolecular organization of organic semiconductors on the dielectric layer of thin-film field-effect transistors is a crucial factor in achieving good device performance. Charge transport in these devices occurs near the interface with the gate dielectric. By confocal spectroscopy and microscopy we study the supramolecular organization in ultra-thin films of a prototype organic semiconductor, α-sexithiophene, on silicon dioxide, a widely used transistor gate dielectric. We demonstrate that in submonolayer films of sexithiophene (T6), regions where the molecules stand on their long molecular axis coexist with regions where the molecules lie flat on the substrate. When the first monolayer is completed, all T6 molecules stand on the substrate, and the flat molecules detected in the submonolayer films are no longer present. In films thicker than two monolayers, the photoluminescence spectra of standing molecules show a molecular H-like aggregation as in the single crystal.

Apparatus and method for surface cleaning using plasma

Abstract: There is provided a surface cleaning apparatus and method using plasma to remove a native oxide layer, a chemical oxide layer, and a damaged portion from a silicon substrate surface, and contaminants from a metal surface. By absorbing potential in a grounded grid or baffle between a plasma generator and a substrate, only radicals are passed to the substrate, and HF gas is used as a second processing gas. Thus a native oxide layer, a chemical oxide layer, or a damaged portion formed on the silicon substrate during etching a contact hole is removed and the environment of a chamber is maintained constant by introducing a conditioning gas after each wafer process. Therefore, process uniformity is improved.

Evolution of wrinkles in hard films on soft substrates.

Abstract: A compressively strained film on a substrate can wrinkle into intricate patterns. This Rapid Communication studies the evolution of the wrinkle patterns. The film is modeled as an elastic nonlinear plate and the substrate a viscoelastic foundation. A spectral method is developed to evolve the nonlinear system. When the initial film strains are isotropic, the wrinkles evolve into a pattern with a motif of zigzag segments, in random orientations. When the initial film strains are anisotropic, the wrinkles evolve to an array of herringbones or stripes. The zigzag segments select a width, a length, and an elbow angle that minimize the total elastic energy.

Semiconductor device and method of manufacturing the same

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which is obtained by laminating semiconductor chips, which is not restricted by a chip size, which uses a wire bonding and which is short in height. SOLUTION: First and second semiconductor chips 2a and 2b are laminated in order on a substrate 1, and electrodes on the respective semiconductor chips 2a and 2b and an electrode on the substrate are connected by wire bonding. A space between first and second semiconductor chips 2a and 2b is filled with an insulating adhesive 4, and a first wire 3a to be connected to the upper surface of the first semiconductor chip 2a on a lower side is crushed by the lower surface of the second semiconductor chip 2b. COPYRIGHT: (C)2004,JPO&NCIPI

Transferable device-containing layer for silicon-on-insulator applications

Abstract: A method for forming an integrated circuit on an insulating substrate is described comprising the steps of forming a semiconductor layer on a seed wafer substrate containing an at least partially crystalline porous release layer, processing the semiconductor layer to form a “transferable” device layer containing at least one semiconductor device, and bonding said transferable device layer to a final, insulating substrate before or after separating said device layer from the seed wafer substrate. A second method, for separating a semiconductor layer from a seed wafer substrate, is described wherein an at least partially crystalline porous layer initially connecting the semiconductor layer and seed wafer substrate is split or broken apart by the steps of (i) introducing a fluid including water into the pores of said porous layer, and (ii) expanding said fluid by solidifying or freezing to break apart the porous layer. The at least partially crystalline porous layer may incorporate at least one porous silicon germanium alloy layer alone or in combination with at least one porous Si layer. Also described is an integrated circuit comprising the transfered device layer described above.

Method of increasing deposition rate of silicon dioxide on a catalyst

Abstract: Methods for forming dielectric layers, and structures and devices resulting from such methods, and systems that incorporate the devices are provided. The invention provides an aluminum oxide/silicon oxide laminate film formed by sequentially exposing a substrate to an organoaluminum catalyst to form a monolayer over the surface, remote plasmas of oxygen and nitrogen to convert the organoaluminum layer to a porous aluminum oxide layer, and a silanol precursor to form a thick layer of silicon dioxide over the porous oxide layer. The process provides an increased rate of deposition of the silicon dioxide, with each cycle producing a thick layer of silicon dioxide of about 120 Å over the layer of porous aluminum oxide.