Showing papers on "Substrate (electronics) published in 2006"

New Benchmark for Water Photooxidation by Nanostructured α-Fe2O3 Films

Abstract: Thin films of silicon-doped Fe2O3 were deposited by APCVD (atmospheric pressure chemical vapor deposition) from Fe(CO)5 and TEOS (tetraethoxysilane) on SnO2-coated glass at 415 °C. HRSEM reveals a highly developed dendritic nanostructure of 500 nm thickness having a feature size of only 10−20 nm at the surface. Real surface area determination by dye adsorption yields a roughness factor of 21. XRD shows the films to be pure hematite with strong preferential orientation of the [110] axis vertical to the substrate, induced by silicon doping. Under illumination in 1 M NaOH, water is oxidized at the Fe2O3 electrode with higher efficiency (IPCE = 42% at 370 nm and 2.2 mA/cm2 in AM 1.5 G sunlight of 1000 W/m2 at 1.23 VRHE) than at the best reported single crystalline Fe2O3 electrodes. This unprecedented efficiency is in part attributed to the dendritic nanostructure which minimizes the distance photogenerated holes have to diffuse to reach the Fe2O3/electrolyte interface while still allowing efficient light abso...

Method for making electronic devices using metal oxide nanoparticles

Abstract: A method of making a thin film transistor comprises (a) solution depositing a dispersion comprising semiconducting metal oxide nanoparticles onto a substrate, (b) sintering the nanoparticles to form a semiconductor layer, and (c) optionally subjecting the resulting semiconductor layer to post-deposition processing.

Transparent conductive film and method for manufacturing the same

Abstract: A ZnO-based transparent conductive film is produced by growing ZnO doped with a group III element oxide on a substrate and has a region with a crystal structure in which a c-axis grows along a plurality of different directions. The transparent conductive film produced by growing ZnO doped with a group III element oxide on a substrate has a ZnO (002) rocking curve full width at half maximum of about 13.5° or more. ZnO is doped with a group III element oxide so that the ratio of the group III element oxide in the transparent conductive film is about 7% to about 40% by weight. The transparent conductive film is formed on the substrate with a SiNx thin film provided therebetween. The transparent conductive film is formed on the substrate by a thin film formation method with a bias voltage applied to the substrate.

Method of fabricating oxide semiconductor device

Abstract: A method for fabricating a device using an oxide semiconductor, including a process of forming the oxide semiconductor on a substrate and a process of changing the conductivity of the oxide semiconductor by irradiating a predetermined region thereof with an energy ray.

Ionic amorphous oxide semiconductors: Material design, carrier transport, and device application

Abstract: Recently we have reported the room temperature fabrication of transparent and flexible thin film transistors on a polyethylene terephthalate (PET) film substrate using an ionic amorphous oxide semiconductor (IAOS) in an In2O3–ZnO–Ga2O3 system. These transistors exhibit a field effect mobility of ∼10 cm2 (V s)−1, which is higher by an order of magnitude than those of hydrogenated amorphous Si and pentacene transistors. This article describes a chemical design concept of IAOS, and its unique electron transport properties, and electronic structure, by comparing them with those of conventional amorphous semiconductors. High potential of IAOS for flexible electronics is addressed.

Fabrication of Single-Crystalline Silicon Nanowires by Scratching a Silicon Surface with Catalytic Metal Particles†

Abstract: A novel strategy for preparing large-area, oriented silicon nanowire (SiNW) arrays on silicon substrates at near room temperature by localized chemical etching is presented. The strategy is based on metal-induced (either by Ag or Au) excessive local oxidation and dissolution of a silicon substrate in an aqueous fluoride solution. The density and size of the as-prepared SiNWs depend on the distribution of the patterned metal particles on the silicon surface. High-density metal particles facilitate the formation of silicon nanowires. Well-separated, straight nanoholes are dug along the Si block when metal particles are well dispersed with a large space between them. The etching technique is weakly dependent on the orientation and doping type of the silicon wafer. Therefore, SiNWs with desired axial crystallographic orientations and doping characteristics are readily obtained. Detailed scanning electron microscopy observations reveal the formation process of the silicon nanowires, and a reasonable mechanism is proposed on the basis of the electrochemistry of silicon and the experimental results.

Method for forming silicon-containing materials during a photoexcitation deposition process

Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes. Attributes of the method that are enhanced by the UV photoexcitation process include removing native oxides prior to deposition, removing volatiles from deposited films, increasing surface energy of the deposited films, increasing the excitation energy of precursors, reducing deposition time, and reducing deposition temperature.

Thin films engineering of indium tin oxide: large area flat panel displays application

Abstract: Indium Tin Oxide (ITO) thin films with a variety of microstructures were deposited using a large area conventional DC magnetron sputtering system for flat panel displays manufacturing. Highly uniform ITO films with an average thickness of ∼100 ± 3 nm on the ∼0.6 m2 substrate area were obtained. Film structures with small amounts of crystalline sites were produced by room temperature deposition, and an entirely amorphous structure with excellent etching properties was achieved through optimized incorporation of hydrogen in the film, providing a significant increase in the crystallization temperature of ITO. Post-annealing of such a sample yielded a randomly orientated polycrystalline structure with superior conductivity and transparency. The polycrystalline ITO films, produced at the sputtering substrate temperature of 200 °C, provided structures with preferential grain orientation in both and directions, controlled by the amount of oxygen and increased process pressure. The impact of oxygen and pressure with related structures on the macroscopic properties of the layers was studied. Morphological features of the films such as phase/grain structure and surface roughness were investigated using SEM and AFM. Layers with an equiaxed grain structure of about 30 nm crystal size revealed an ultra smooth surface with RMS values of about 1 nm. Specific resistivities as low as 150 μΩ cm and transmittance values above 92% at 550 nm wavelength were obtained for polycrystalline layers with preferential grain orientation.

Interfacial Properties of the a-Si ∕ Cu :Active–Inactive Thin-Film Anode System for Lithium-Ion Batteries

Abstract: Amorphous silicon thin films deposited on copper foil have been observed to exhibit near theoretical capacity for a limited number of cycles. The films, however, eventually delaminate, leading to failure of the anode. In order to better understand the mechanism of capacity retention and the ultimate failure mode of a model brittle active:elastic/plastic inactive anode system, the films were subjected to in situ adhesion tests while observing the film surface using scanning electron microscopy. Atomic force and transmission electron microscopy, and electrochemical cycling were conducted to analyze the emerging morphology of the films during cycling. The adhesion of the as-deposited Si film to the Cu substrate was measured to ∼7.7 J/m 2 , reflecting a weak interface adhesion strength. Plastic deformation of the underlying Cu substrate combined with a ratcheting mechanism is proposed to occur in the Si:Cu system, with delamination failure mode occurring only after the formation of an interface imperfection. From the analysis of slow rate cycling experiments, nucleation of a lithium compound based on the interdiffusion of Si and Cu is identified as the most probable cause of the ultimate delamination failure of the deposited film.

Fabrication and characterization of ZnO nanowires based UV photodiodes

Abstract: A heterojunction of n-type zinc oxide (ZnO) nanowires and p-type silicon has been successfully constructed to demonstrate ultraviolet (UV) photodiodes. The prototype device consists of naturally doped n-type ZnO nanowires grown on top of a (1 0 0) p-silicon substrate by the bottom-up growth process. The diameter of the nanowires is in the range of 70–120 nm, and the length is controlled by the growth time. The isolation is achieved by using spin-on glass (SOG) that also works as the foundation of the top electrode. The current–voltage (I–V) characteristics show the typical rectifying behavior of heterojunctions, and the photodiode exhibits response of ∼0.07 A/W for UV light (365 nm) under a 20 V reverse bias.

High performance n-channel organic field-effect transistors and ring oscillators based on C60 fullerene films

Abstract: We report on organic n-channel field-effect transistors and circuits based on C60 films grown by hot wall epitaxy. Electron mobility is found to be dependent strongly on the substrate temperature during film growth and on the type of the gate dielectric employed. Top-contact transistors employing LiF∕Al electrodes and a polymer dielectric exhibit maximum electron mobility of 6cm2∕Vs. When the same films are employed in bottom-contact transistors, using SiO2 as gate dielectric, mobility is reduced to 0.2cm2∕Vs. By integrating several transistors we are able to fabricate high performance unipolar (n-channel) ring oscillators with stage delay of 2.3μs.

3-Omega Measurements of Vertically Oriented Carbon Nanotubes on Silicon

Abstract: An exploratory thermal interface structure, made of vertically oriented carbon nanotubes directly grown on a silicon substrate, has been thermally characterized using a 3-omega method The effective thermal conductivities of the carbon nanotubes (CNT) sample, including the effects of voids, are found to be 74 W/m K to 83 W/m K in the temperature range of 295 K to 323 K, one order higher than that of the best thermal greases or phase change materials This result suggests that the vertically oriented CNTs potentially can be a promising next-generation thermal interface solution However, fairly large thermal resistances were observed at the interfaces between the CNT samples and the experimental contact Minimizing these contact resistances is critical for the application of these materials

Nonvolatile memory cell comprising a diode and a resistance-switching material

Abstract: In a novel nonvolatile memory cell formed above a substrate, a diode is paired with a reversible resistance-switching material, preferably a metal oxide or nitride such as, for example, NixOy, NbxOy, TixOy, HfxOy, AlxOy, MgxOy, CoxOy, CrxOy, VxOy, ZnxOy, ZrxOy, BxNy, and AlxNy. In preferred embodiments, the diode is formed as a vertical pillar disposed between conductors. Multiple memory levels can be stacked to form a monolithic three dimensional memory array. In some embodiments, the diode comprises germanium or a germanium alloy, which can be deposited and crystallized at relatively low temperatures, allowing use of aluminum or copper in the conductors. The memory cell of the present invention can be used as a rewriteable memory cell or a one-time-programmable memory cell, and can store two or more data states.

Protein-Resistant Polymer Coatings on Silicon Oxide by Surface-Initiated Atom Transfer Radical Polymerization

Abstract: The modification of silicon oxide with poly(ethylene glycol) to effectively eliminate protein adsorption has proven to be technically challenging. In this paper, we demonstrate that surface-initiated atom transfer radical polymerization (SI-ATRP) of oligo(ethylene glycol) methyl methacrylate (OEGMA) successfully produces polymer coatings on silicon oxide that have excellent protein resistance in a biological milieu. The level of serum adsorption on these coatings is below the detection limit of ellipsometry. We also demonstrate a new soft lithography method via which SI-ATRP is integrated with microcontact printing to create micropatterns of poly(OEGMA) on glass that can spatially direct the adsorption of proteins on the bare regions of the substrate. This ensemble of methods will be useful in screening biological interactions where nonspecific binding must be suppressed to discern low probability binding events from a complex mixture and to pattern anchorage-dependent cells on glass and silicon oxide.

ZnO nanosheet networks and hexagonal nanodiscs grown on silicon substrate: growth mechanism and structural and optical properties

Abstract: Two-dimensional ZnO nanosheet networks composed of many thin and uniform hexagonal-shaped ZnO nanosheets and ZnO nanodiscs were prepared in a large scale on silicon substrate through thermal evaporation using ZnCl2 and O2 as source materials for Zn and oxygen, respectively, without the use of metal catalysts or additives Detailed structural studies indicated that the synthesized products are single crystalline with wurtzite hexagonal structure Raman scattering of the synthesized products confirmed that the as-grown structures have good crystal quality with a hexagonal wurtzite phase Room temperature photoluminescence spectra showed a strong green band with a suppressed UV emission from the ZnO nanosheet networks, but on the other hand a dominant and strong near band edge emission with a much suppressed deep level emission was observed in the nanodiscs The growth mechanism of these structures is also discussed in detail

Integrated circuit and method for its manufacture

Abstract: An integrated circuit and methods for its manufacture are provided. The integrated circuit (20) comprises a bulk silicon substrate (24) having a first region (64, 66) of (100) crystalline orientation and a second region (66, 64) of (110) crystalline orientation. A layer (62) of silicon on insulator overlies a portion of the bulk silicon substrate. At least one field effect transistor (96, 98) is formed in the layer (62) of silicon on insulator, at least one P-channel field effect transistor (90, 92) is formed in the second region (66, 64) of (110) crystalline orientation, and at least one N-channel field effect transistor (90, 92) is formed in the first region (64, 66) of (100) crystalline orientation.

Real-time observation of structural and orientational transitions during growth of organic thin films.

Abstract: We study kinetically controlled orientational and structural transitions of molecular thin films during growth in situ and in real time, using diindenoperylene (DIP) as an example. By time-resolved surface-sensitive x-ray scattering (out of plane and in plane), we follow the organic molecular beam deposition of DIP on silicon oxide, on stepped sapphire, and on rubrene as an organic model surface. We identify transitions for the few-monolayer (ML) regime, as well as for thick (several 10's of ML) films. We show that the differences in the interaction of DIP with the substrate change the thickness as well as temperature range of the transitions, which include (transient) strain, subtle changes of the orientation, as well as complete reorientation. These effects should be considered rather general features of the growth of organics, which, with its orientational degrees of freedom, is qualitatively different from growth of inorganics.

Fabrication of Cu2ZnSnS4 thin films by co-evaporation

Abstract: Cu2ZnSnS4 (CZTS) thin films were fabricated by co-evaporation of elemental sources on quartz glass substrates. The deposition was performed at the substrate temperature between 400 oC and 600 oC. From the results of electron probe microanalysis, it was confirmed that the nearly stoichiometric CZTS thin films were obtained in all substrate temperature. The X-ray diffraction patterns revealed that CZTS thin films have a kesterite structure with a strong preferred orientation. From the scanning electron microscope observation, the grain size becomes larger with increasing the substrate temperature. The CZTS thin films showed p -type conductivity. (© 2006 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Uniform batch film deposition process and films so produced

Abstract: A batch of wafer substrates is provided with each wafer substrate having a surface. Each surface is coated with a layer of material applied simultaneously to the surface of each of the batch of wafer substrates. The layer of material is applied to a thickness that varies less than four thickness percent across the surface and exclusive of an edge boundary and having a wafer-to-wafer thickness variation of less than three percent. The layer of material so applied is a silicon oxide, silicon nitride or silicon oxynitride with the layer of material being devoid of carbon and chlorine. Formation of silicon oxide or a silicon oxynitride requires the inclusion of a co-reactant. Silicon nitride is also formed with the inclusion of a nitrification co-reactant. A process for forming such a batch of wafer substrates involves feeding the precursor into a reactor containing a batch of wafer substrates and reacting the precursor at a wafer substrate temperature, total pressure, and precursor flow rate sufficient to create such a layer of material. The delivery of a precursor and co-reactant as needed through vertical tube injectors having multiple orifices with at least one orifice in registry with each of the batch of wafer substrates and exit slits within the reactor to create flow across the surface of each of the wafer substrates in the batch provides the within- wafer and wafer-to-wafer uniformity.

Electronic transport in nanometre-scale silicon-on-insulator membranes

Abstract: The widely used ‘silicon-on-insulator’ (SOI) system consists of a layer of single-crystalline silicon supported on a silicon dioxide substrate. When this silicon layer (the template layer) is very thin, the assumption that an effectively infinite number of atoms contributes to its physical properties no longer applies, and new electronic, mechanical and thermodynamic phenomena arise1,2,3,4, distinct from those of bulk silicon. The development of unusual electronic properties with decreasing layer thickness is particularly important for silicon microelectronic devices, in which (001)-oriented SOI is often used5,6,7. Here we show—using scanning tunnelling microscopy, electronic transport measurements, and theory—that electronic conduction in thin SOI(001) is determined not by bulk dopants but by the interaction of surface or interface electronic energy levels with the ‘bulk’ band structure of the thin silicon template layer. This interaction enables high-mobility carrier conduction in nanometre-scale SOI; conduction in even the thinnest membranes or layers of Si(001) is therefore possible, independent of any considerations of bulk doping, provided that the proper surface or interface states are available to enable the thermal excitation of ‘bulk’ carriers in the silicon layer.

2,7-diphenyl[1]benzoselenopheno[3,2-b][1]benzoselenophene as a stable organic semiconductor for a high-performance field-effect transistor.

Abstract: [1]Benzoselenopheno[3,2-b][1]benzoselenophene (BSBS) and its 2,7-diphenyl derivative (DPh-BSBS) were readily synthesized from diphenylacetylene and bis(biphenyl-4-yl)acetylene, respectively, with a newly developed straightforward selenocyclization protocol. In contrast to the parent BSBS that has poor film-forming properties, the diphenyl derivative DPh-BSBS formed a good thin film on the Si/SiO2 substrate by vapor deposition. X-ray diffraction examination revealed that this film consists of highly ordered molecules that are nearly perpendicular to the substrate, making it suitable for use in the fabrication of organic field-effect transistors (OFETs). When fabricated at different substrate temperatures (room temperature, 60 °C, and 100 °C) in a “top-contact” configuration, all the DPh-BSBS-based OFET devices exhibited excellent p-channel field-effect properties with hole mobilities >0.1 cm2 V-1 s-1 and current on/off ratios of ∼106. This high performance was essentially maintained over 3000 continuous sc...

III-nitride light emitting devices fabricated by substrate removal

Abstract: Devices and techniques for fabricating InAlGaN light-emitting devices are described that result from the removal of light-emitting layers from the sapphire growth substrate. In several embodiments, techniques for fabricating a vertical InAlGaN light-emitting diode structure that result in improved performance and or cost-effectiveness are described. Furthermore, metal bonding, substrate liftoff, and a novel RIE device separation technique are employed to efficiently produce vertical GaN LEDs on a substrate chosen for its thermal conductivity and ease of fabrication.

Effect of deposition conditions on mechanical properties of low-temperature PECVD silicon nitride films

Abstract: The effect of deposition conditions on characteristic mechanical properties – elastic modulus and hardness – of low-temperature PECVD silicon nitrides is investigated using nanoindentation. It is found that increase in substrate temperature, increase in plasma power and decrease in chamber gas pressure all result in increases in elastic modulus and hardness. Strong correlations between the mechanical properties and film density are demonstrated. The silicon nitride density in turn is shown to be related to the chemical composition of the films, particularly the silicon/nitrogen ratio.

Method of fabricating silicon-doped metal oxide layer using atomic layer deposition technique

Abstract: There are provided methods of fabricating a silicon-doped metal oxide layer on a semiconductor substrate using an atomic layer deposition technique. The methods include an operation of repeatedly performing a metal oxide layer formation cycle K times and an operation of repeatedly performing a silicon-doped metal oxide layer formation cycle Q times. At least one of the values K and Q is an integer of 2 or more. K and Q are integers ranging from 1 to about 10 respectively. The metal oxide layer formation cycle includes the steps of supplying a metal source gas to a reactor containing the substrate, and then injecting an oxide gas into the reactor. The silicon-doped metal oxide layer formation cycle includes supplying a metal source gas including silicon into a reactor containing the substrate, and then injecting an oxide gas into the reactor. The sequence of operations of repeatedly performing the metal oxide layer formation cycle K times, followed by repeatedly performing the silicon-doped metal oxide layer formation cycle Q times, is performed one or more times until a silicon-doped metal oxide layer with a desired thickness is formed on the substrate. In addition, a method of fabricating a silicon-doped hafnium oxide (Si-doped HfO 2 ) layer according to a similar invention method is also provided.

Method of forming silicon oxide containing films

Abstract: A method of forming a silicon oxide film, comprising the steps of: - providing a treatment substrate within a reaction chamber; - purging the gas within the reaction chamber by feeding an inert gas into the chamber under reduced pressure at a substrate temperature of 50 to 4000C, - adsorbing, at the same temperatures and under reduced pressure, a silicon compound on the treatment substrate by pulsewise introduction of a gaseous silicon compound into the reaction chamber, - purging, at the same temperatures and under reduced pressure, the unadsorbed silicon compound in the reaction chamber with an inert gas, - at the same temperatures and under reduced pressure, introducing a pulse of ozone-containing mixed gas into the reaction chamber and producing silicon oxide by an oxidation reaction with the silicon compound adsorbed on the treatment substrate; and - repeating steps 1) to 4) if necessary to obtain the desired thickness on the substrate.

Nitrogen profile engineering in nitrided high dielectric constant films

Abstract: A method of forming a nitrided high-k film by disposing a substrate in a process chamber and forming the nitrided high-k film on the substrate by a) depositing a nitrogen-containing film, and b) depositing an oxygen-containing film, wherein steps a) and b) are performed in any order, any number of times, so as to oxidize at least a portion of the thickness of the nitrogen-containing film. The oxygen-containing film and the nitrogen-containing film contain the same one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table, and optionally aluminum, silicon, or aluminum and silicon. According to one embodiment, the method includes forming a nitrided hafnium based high-k film. The nitrided high-k film can be formed by atomic layer deposition (ALD) or plasma-enhanced ALD (PEALD).

Technique for the growth of planar semi-polar gallium nitride

Abstract: A method for growing planar, semi-polar nitride film on a miscut spinel substrate, in which a large area of the planar, semi-polar nitride film is parallel to the substrate's surface. The planar films and substrates are: (1) {101 1 } gallium nitride (GaN) grown on a {100} spinel substrate miscut in specific directions, (2) { 1013 } gallium nitride (GaN) grown on a {110} spinel substrate, (3) { 1122 } gallium nitride (GaN) grown on a { 1 100 } sapphire substrate, and (4) { 1013 } gallium nitride (GaN) grown on a { 1 1 00 } sapphire substrate.