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Subthreshold conduction

About: Subthreshold conduction is a research topic. Over the lifetime, 6343 publications have been published within this topic receiving 131957 citations. The topic is also known as: Subthreshold leakage.


Papers
More filters
Proceedings ArticleDOI
01 Jun 2017
TL;DR: A strong silicon physically unclonable function (PUF) immune to machine learning (ML) attacks and shows resilience that is 100X higher than known alternatives, with negligible loss in PUF unpredictability is presented.
Abstract: This paper presents a strong silicon physically unclonable function (PUF) immune to machine learning (ML) attacks. The PUF, termed the subthreshold current array (SCA) PUF, is composed of a pair of two-dimensional transistor arrays and a low-offset comparator. The fabricated PUF chip allows 265 challenge-response pairs (CRPs) and achieves high reliability with average bit error rate (BER) of 5.8% for temperatures −20 to 80°C and Vdd + 10%. The calibration-based CRPs filtering method effectively improves BER to 2.6% with a 10% loss of CRPs. When subjected to ML attacks, the PUF shows resilience that is 100X higher than known alternatives, with negligible loss in PUF unpredictability.

55 citations

Journal ArticleDOI
Goichi Ono1, M. Miyazaki1
TL;DR: In this article, a new concept of body bias management that uses forward biasing, fluctuation compensating, and V/sub t/ matching technologies to resolve the issue is proposed.
Abstract: The difference between the threshold voltages V/sub t/ of pMOS and nMOS transistors is a critical issue in the low-voltage operation of CMOS circuits. The pMOS/nMOS V/sub t/ balancing profit is analyzed in terms of subthreshold leakage current and the performance of CMOS LSIs and the minimum supply voltage of logic circuits. Matching the pMOS/nMOS V/sub t/ improves LSI performance and reduces the lowest supply voltage by 0.15 V. We propose a new concept of body bias management that uses forward biasing, fluctuation compensating, and V/sub t/ matching technologies to resolve the issue.

55 citations

Journal ArticleDOI
TL;DR: Novel configurations of fractional-order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper and offer the capability for operation in an ultra-low-voltage environment.
Abstract: Novel configurations of fractional-order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh-domain and log-domain integrators are presented. Because of the employment of metal-oxide-semiconductor MOS transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra-low-voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional-order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company TSMC 180-nm complementary MOS CMOS process. Copyright © 2014 John Wiley & Sons, Ltd.

55 citations

Journal ArticleDOI
TL;DR: In this article, the influence of the gate corner on the threshold voltage roll-off was investigated using both drift-diffusion and Monte Carlo simulations, and a steeper subthreshold slope was obtained for a channel length shorter than 50 nm when the recessed channel MOSFET is compared to its planar counterpart.
Abstract: Sub-0.1-/spl mu/m planar and gate recessed MOSFET's are investigated using both drift-diffusion and Monte Carlo simulations. In nonplanar devices, the influence of the gate corner explains that the threshold voltage roll-off can be almost suppressed. A steeper subthreshold slope (low swing) is also obtained for a channel length shorter than 50 nm when the recessed channel MOSFET is compared to its planar counterpart. The influence of the corner effect on high-current performances is also considered in relation with the electric field profile along the Si/SiO/sub 2/ interface.

55 citations

Journal ArticleDOI
TL;DR: In this article, the authors proposed a new empirical large-signal model of silicon laterally diffused MOSFETs for the design of various modes of high-power amplifiers.
Abstract: We propose a new empirical large-signal model of silicon laterally diffused MOSFETs for the design of various modes of high-power amplifiers. The new channel current model has only nine parameters that represent the unique operation principles of a MOSFET. In the channel current model, we include the thermal phenomena of high-power devices. To accurately characterize high-power devices, we incorporate the channel heating and heat-sink heating effects by providing two thermal capacitances and two thermal resistances. Nonlinear capacitances, including deep subthreshold and triode regions, as well as normal saturation regions, are extracted and modeled. For validation of our model, a 1.4-GHz 5-W amplifier is implemented, and the measured and simulated results match very well.

55 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023153
2022349
2021172
2020196
2019242
2018272