Subthreshold conduction

About: Subthreshold conduction is a research topic. Over the lifetime, 6343 publications have been published within this topic receiving 131957 citations. The topic is also known as: Subthreshold leakage.

Temperature sensitivity of SOI-CMOS transistors for use in uncooled thermal sensing

Abstract: The temperature coefficient of current (TCC) of CMOS transistors implemented on silicon-on-insulator substrates is theoretically and empirically studied for its potential use in uncooled thermal sensing. Modeling and measurements show TCC values in subthreshold of more than 6%/K, better than state of the art microbolometer temperature coefficient of resistance, and less than -0.4%/K in saturation-comparable with metals. Models and measurements are shown for the TCC dependence upon operating point, temperature and channel length. A simple semi-empirical model for the TCC at subthreshold based on long channel approximation is suggested and shown to agree with measurements for channel length down to 0.35 /spl mu/m. The model and measurements show a logarithmic tradeoff between subthreshold current and the TCC, which is important in the design of sensors.

A new approach to the theory and modeling of insulated-gate field-effect transistors

Abstract: Consideration of basic charge relationships in the IGFET has led to a new formulation of the theory of the device which allows model characterization in a more general manner, and with greater accuracy, than previously achieved. The contribution of the mobile channel charge to the silicon surface potential, which is believed to have a significant influence on the device characteristics, is taken into account in this approach. Accurate device modeling is achieved over a very wide range of operation, extending from weak channel (subthreshold) to high level channel conditions. An important feature of the model is that it is expressed in terms of a constant effective channel mobility. Further, the current and charge relationships involved take the form of a single set of analytic closed-form expressions in terms of the terminal voltages for all conditions of device operation, and are thus appropriate for CAD implementation. The scope and accuracy of this approach to IGFET modeling are demonstrated by comparisons between measured and theoretical dc and small-signal characteristics for sample metal and silicon gate devices.

A very high precision 500-nA CMOS floating-gate analog voltage reference

Abstract: A floating gate with stored charge technique has been used to implement a precision voltage reference achieving a temperature coefficient (TC) <1 ppm//spl deg/C in CMOS technology. A Fowler-Nordheim tunnel device used as a switch and a poly-poly capacitor form the basis in this reference. Differential dual floating gate architecture helps in achieving extremely low temperature coefficients, and improving power supply rejection. The reference is factory programmed to any value without any trim circuits to within 200 /spl mu/V of its specified value. The floating-gate analog voltage reference (FGAREF) shows a long-term drift of less than 10 ppm//spl radic/1000 h. This circuit is ideal for portable and handheld applications with a total current of only 500 nA. This is done by biasing the buffer amplifier in the subthreshold region of operation. It is fabricated using a 25-V 1.5-/spl mu/m E/sup 2/PROM CMOS technology.

Analysis of the subthreshold slope and the linear transconductance techniques for the extraction of the capacitance coupling coefficients of floating-gate devices

Abstract: A critical investigation of the relationship between the floating gate and the accessible terminal voltages reveals that the gate coupling coefficient is overestimated by the traditional expressions obtained from the approximate analysis of the subthreshold slope and the linear transconductance techniques. The investigation further indicates that the subthreshold slope technique is preferred, because the corrections can be easily estimated using the results of auxiliary measurements involving the source and drain coupling coefficients. >

Design and Analysis of Monolithic Step-Down SC Power Converter With Subthreshold DPWM Control for Self-Powered Wireless Sensors

Abstract: This paper presents a fully integrated switched-capacitor power converter for self-powered wireless sensor nodes. The design features an efficient step-down charge-pump power stage and a frequency-programmable digital feedback controller. The subthreshold-region design significantly reduces the power dissipation in the controller. Meanwhile, the programmable switching-frequency digital-pulsewidth-modulation control keeps the converter stay at high efficiency, without causing a random noise spectrum. Monolithic implementation effectively suppresses noise and glitches caused by parasitic components due to bonding, packaging, and PCB wiring. Design strategy, system modeling, optimization, and circuit implementation are addressed. An IC prototype was fabricated with a standard 0.35-?m digital CMOS n-well process. It precisely provides a dynamic-voltage-scaling-compatible adjustable power output from 0.8 to 1.5 V and from 400 ?W to 7.5 mW. The switching frequency is programmable from 200 kHz to 1 MHz. It achieves 66.7% efficiency with a controller power dissipation of only 147.5 ?W.