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Subthreshold conduction

About: Subthreshold conduction is a research topic. Over the lifetime, 6343 publications have been published within this topic receiving 131957 citations. The topic is also known as: Subthreshold leakage.


Papers
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Journal ArticleDOI
TL;DR: A low temperature coefficient (TC) and high power supply ripple rejection (PSRR) CMOS sub-bandgap voltage reference (sub-BGR) circuit using subthreshold MOS transistors and a single BJT is presented in this brief.
Abstract: A low temperature coefficient (TC) and high power supply ripple rejection (PSRR) CMOS sub-bandgap voltage reference (sub-BGR) circuit using subthreshold MOS transistors and a single BJT is presented in this brief. The proposed sub-BGR consists of a novel complementary-to-absolute-temperature (CTAT) voltage generator based on a scaled emitter-base voltage of a BJT, and an improved proportional-to-absolute-temperature (PTAT) voltage generator based on stacking of $\Delta V_{\mathbf {GS}}$ of sub- $V_{\mathbf {TH}}$ MOSFETs. As the CTAT circuit achieves a reduced absolute value of the negative TC, the PTAT circuit achieves reduced power consumption without consuming a large chip area. The proposed sub-BGR circuit is implemented in a standard 0.18- $\mu \text{m}$ CMOS process. Measured results show that the sub-BGR circuit can run with a supply voltage down to 0.9 V while the power consumption is only 85 nW. An average TC of 33.7 ppm/°C and a PSRR of better than −40 dB over the full frequency range are achieved.

36 citations

Journal ArticleDOI
TL;DR: Aperiodic stochastic resonance in an electrochemical system with excitable dynamics is characterized in experiments and simulations and a maximum is exhibited in the input-output correlation as a function of the noise amplitude.
Abstract: Aperiodic stochastic resonance in an electrochemical system with excitable dynamics is characterized in experiments and simulations. Two different spike trains, one with stochastic and the other with chaotic interspike intervals, are imposed on the system as subthreshold aperiodic signals. Information transmission is quantified by the cross correlation between the subthreshold input signal and the noise induced system response. A maximum is exhibited in the input-output correlation as a function of the noise amplitude. Numerical simulations with an electrochemical model are in excellent agreement with the experimental observations.

36 citations

Proceedings ArticleDOI
14 Jun 2009
TL;DR: In this article, a 20-amp normally off enhancement mode 4H-SiC VJFET with 1.9kV avalanche breakdown voltage and a specific on-resistance of 2.8mΩ-cm2 is demonstrated.
Abstract: Twenty amp normally-off enhancement mode 4H-SiC VJFETs are demonstrated with 1.9kV avalanche breakdown voltage and a specific on-resistance of 2.8mΩ-cm2. The VJFETs shown near ideal subthreshold characteristics and maintain enhancement mode functionality to temperatures exceeding 175°C due to the optimized channel design with low DIBL characteristics. The low specific on-resistance enables the VJFET to have low intrinsic capacitances that result in low total switching times of less than 150ns at 15A at a Tj=175°C, and low total switching energies of 97µJ when switching 12A at Tj=25°C. Short circuit performance was also investigated with the VJFET exhibiting a rugged short circuit withstand capability in excess of 700µs at a V DS =600V.

36 citations

Journal ArticleDOI
TL;DR: In this paper, a linear tunable transconductor with the use of linear COMposite n-channel MOSFETs and CMOS COMPOSite FETs as basic cells was designed.
Abstract: A linear tunable transconductor is designed with the use of linear COMposite n-channel MOSFETs (COMFETs) and CMOS COMposite FETs as basic cells. With crosscoupling, a differential linear relation is achieved with a THD at 1 kHz of 0.776% for a differential voltage of +or-4 V. The design of the transconductor demonstrates that COMFET devices can be successfully used as standard cells in modulator analogue VLSI circuits. The transconductor performance at subthreshold is also discussed.< >

36 citations

Journal ArticleDOI
TL;DR: In this paper, different 1D analytical models for the potential distribution across the silicon film of a double-gate nMOS/SOI device are proposed and compared, based on a double integration of Poisson's equation, which contains both the dopant impurity charges and an approximation of the minority carrier concentration.
Abstract: Different 1D analytical models for the potential distribution across the silicon film of a double-gate nMOS/SOI device are proposed and compared. Models are based on a double integration of Poisson's equation, which contains both the dopant impurity charges and an approximation of the minority carrier concentration. With the best approximation, a model valid from the subthreshold to the strong inversion region is obtained. It is especially useful in the moderate inversion region where classical models fail. Analytical expressions of the drain current and transconductance are provided at low V-D. The threshold voltage is extracted by the maximum transconductance change method. Good agreement with numerical simulations is achieved.

36 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023153
2022349
2021172
2020196
2019242
2018272