Topic
Subthreshold conduction
About: Subthreshold conduction is a research topic. Over the lifetime, 6343 publications have been published within this topic receiving 131957 citations. The topic is also known as: Subthreshold leakage.
Papers published on a yearly basis
Papers
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TL;DR: Strength-duration data have been presented illustrating the relative case with which subthreshold release of the autonomic mediators may be demonstrated in rabbit SA node, AV node, and left atrium and it is proposed that both subth threshold and threshold electrical stimulation act upon intramyocardial autonomic nervous elements to cause the release of acetylcholine and norepinephrine.
Abstract: Electrical stimuli which are subthreshold for myocardial excitation have been shown to be effective in causing the release of autonomic mediators in several types of cardiac tissue derived from rabbit, guinea pig, dog, and cat. Strength-duration data have been presented illustrating the relative case with which subthreshold release of the autonomic mediators may be demonstrated in rabbit SA node, AV node, and left atrium. It is proposed that both subthreshold and threshold electrical stimulation act upon intramyocardial autonomic nervous elements to cause the release of acetylcholine and norepinephrine. The significance of the release of acetylchohine and/or norepinephrine in procedures involving electrical stimulation is discussed.
139 citations
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TL;DR: In this paper, a comparative study of device degradation for conventional n-and p-channel MOSFET's is presented, where the experimentally determined features of degradation are investigated with a 2-D simulation including fast and slow interface states as well as channel mobility degradation due to Coulomb scattering off these charges.
Abstract: We present a comparative study of device degradation for conventional n- and p-channel MOSFET's. The experimentally determined features of degradation are investigated with a 2-D simulation including fast and slow interface states as well as channel mobility degradation due to Coulomb scattering off these charges. Three different models concerning kind and spatial distribution are studied. We present a model that self-consistently describes the observed experimental features in the pentode and subthreshold regimes of the device. Furthermore, the substrate current is included in this analysis.
139 citations
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TL;DR: In this paper, a physically based model for the threshold voltage, subthreshold swing, and drain-induced barrier lowering (DIBL) of undoped cylindrical gate-all-around MOSFETs has been derived based on an analytical solution of 2-D Poisson's equation (in cylinrical coordinates) in which the mobile charge term has been included.
Abstract: Analytical physically based models for the threshold voltage, subthreshold swing, and drain-induced barrier lowering (DIBL) of undoped cylindrical gate-all-around MOSFETs have been derived based on an analytical solution of 2-D Poisson's equation (in cylindrical coordinates) in which the mobile charge term has been included. Using the new model, threshold voltage, DIBL and subthreshold swing sensitivities to channel length, and channel thickness have been investigated. The models for DIBL, subthreshold swing, and threshold voltage rolloff parameters have been verified by comparison with 3-D numerical simulations; close agreement with the numerical simulations has been observed
139 citations
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TL;DR: In this paper, a 150-nm gate enhancement-mode InAlN/Aln/GaN high-electron-mobility transistors are demonstrated on SiC substrates using plasma-based gate-recess etch.
Abstract: Having a drain current density of 1.9 A/mm, a peak extrinsic transconductance of 800 mS/mm (the highest reported in III-nitride transistors), ft/fmax of 70/105 GHz, and Vbr of 29 V, 150-nm-gate enhancement-mode InAlN/AlN/GaN high-electron-mobility transistors are demonstrated on SiC substrates using plasma-based gate-recess etch. The possible plasma-induced damage in the gate region was investigated using interface-trap states extracted from temperature-dependent subthreshold slopes.
138 citations
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TL;DR: Dynamic comparators and multiplexers are designed using the diode-footed domino and conventional techniques to demonstrate the effectiveness of the proposed scheme in improving leakage-tolerance and performance of high fan-in circuits.
Abstract: A leakage-tolerant design technique for high fan-in dynamic logic circuits is presented. An NMOS transistor with gate and drain terminals tied together (diode) is added in series with the evaluation network of standard domino circuits. Due to the stacking effect, the leakage of the evaluation path significantly decreases, thereby improving the robustness of the circuit against deep-submicron subthreshold leakage and input noise. To improve the speed of the circuit, a current mirror is also employed in the evaluation network to increase the evaluation current. The proposed technique (diode-footed domino) exhibits considerable improvement in leakage and noise immunity as compared to the standard domino circuits. Simulation results of wide fan-in gates designed using Berkeley Predictive Technology Models of 70-nm technology demonstrate at least 1.9/spl times/ noise-immunity improvement at the same delay compared to the standard domino circuits. Dynamic comparators and multiplexers are designed using the diode-footed domino and conventional techniques to demonstrate the effectiveness of the proposed scheme in improving leakage-tolerance and performance of high fan-in circuits.
138 citations