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Showing papers on "Switched capacitor published in 1990"



Journal ArticleDOI
TL;DR: A systematic approach is presented for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated circuit techniques, based on formulating a dynamic gradient system whose state evolves in time toward the solution point of the corresponding programming problem.
Abstract: A systematic approach is presented for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated circuit techniques. The method is based on formulating a dynamic gradient system whose state evolves in time toward the solution point of the corresponding programming problem. A neuron cell for the linear and the quadratic problem suitable for monolithic implementation is introduced. The design of this neuron and its corresponding synapses using SC techniques is considered in detail. An SC circuit architecture based on a reduced set of basic building blocks with high modularity is presented. Simulation results using a mixed-mode simulator (DIANA) and experimental results from breadboard prototypes are included, illustrating the validity of the proposed techniques. >

268 citations


Journal ArticleDOI
TL;DR: In this paper, the design and performance of a capacitive micromechanical accelerometer, as well as an electronic circuit for the conditioning of the output signal are described, which consists of a differential capacitance which is formed by a seismic silicon mass and two counter electrodes situated on anodically bonded glass plates.
Abstract: The design and performance of a capacitive micromechanical accelerometer, as well as an electronic circuit for the conditioning of the output signal are described. The sensing element consists of a differential capacitance which is formed by a seismic silicon mass and two counter electrodes situated on anodically bonded glass plates. The mass is symmetrically suspended on at least eight cantilever beams located on both sides of the silicon wafer. For a ±5 g device a typical sensitivity of 1 pF/ g with a zero capacitance of 10 pF and a detection limit below 1 m g was achieved. For signal conditioning a switched capacitor CMOS-ASIC was developed, yielding an analogue voltage output signal.

109 citations


Journal ArticleDOI
TL;DR: In this paper, the design and implementation of switched-current (SI) ladder filters is described. But the SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) Integrator/Summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters.
Abstract: The design and implementation of switched-current (SI) ladder filters is described. The basic current-mode circuits, including the SI differential integrator/summer are developed. The SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) integrator/summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters. Signal flowgraph synthesis of SI ladder filters is presented. The nonideal characteristics of SI ladder filters that limit their accuracy are evaluated. Clock-feedthrough and device mismatch induced errors are more severe in the present SI circuit configurations than in SC circuits. A standard digital 2- mu m n-well CMOS process has been used to implement two high-order ladder filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to those obtained with the switched-capacitor technique. >

104 citations


Journal ArticleDOI
01 Apr 1990
TL;DR: Switched Currents as mentioned in this paper is a new analogue sampled-data signal processing technique that can be implemented without the need for linear floating capacitors, which enables signal processors to be integrated in a standard digital VLSI process.
Abstract: ‘Switched Currents’ is a new analogue sampled-data signal processing technique that can be implemented without the need for linear floating capacitors. This feature enables signal processors to be integrated in a standard digital VLSI process (CMOS), making the technique ideally suited for mixed analogue/digital ICs. Switched current cells are described, and a configuration for a universal integrator is developed that is exactly equivalent to a switched capacitor counterpart. With this integrator, complete switched current filters may be constructed from switched capacitor prototypes. This demonstrated by the ‘exact’ design and simulation of a sixth order lowpass filter with a cutoff frequency of 5MHz.

87 citations


Journal ArticleDOI
TL;DR: The method can be used to compute the small signal frequency responses of nonideal switched capacitor filters, mixers, and other nonlinear circuits, if the circuit has a stable periodic response.
Abstract: One of the excitations, 'carrier', is a large signal and an arbitrary T-periodic function of time. The other excitation, 'signal', is considered as a small perturbation to the periodic steady-state response driven by the carrier. To find a small signal frequency response for the 'signal', the method uses variational equations around the periodic steady-state response. These linearized time-varying differential equations are solved in the frequency domain using a time discretization method. The method can be used to compute the small signal frequency responses of nonideal switched capacitor filters, mixers, and other nonlinear circuits, if the circuit has a stable periodic response. The formulation of the problem, computational complexity of the method, error analysis, sensitivity analysis, implementation of the method, and some applications are covered. >

75 citations


Journal ArticleDOI
TL;DR: In this article, a full-custom switched-capacitor transient analog waveform storage and reconstruction integrated circuit containing 4096 sample and hold cells has been designed, fabricated, and tested.
Abstract: A full-custom switched-capacitor transient analog waveform storage and reconstruction integrated circuit containing 4096 sample and hold cells has been designed, fabricated, and tested. The switched capacitor array (SCA) is organized as 16 parallel channels of 256 serially addressed samples per channel with multiplexed and buffered analog output. Signal sampling frequencies of up to 100 MHz have been accomplished, with a dynamic range, measured at 10 MHz, of at least 8000 to 1. The circuit operation and performance are described, limits on performance are examined, and future implementations are discussed. >

71 citations


Proceedings ArticleDOI
01 May 1990
TL;DR: It is concluded that the random gain implementation is preferred over the alternating gain scheme, because the former spectrally spreads the effect of the capacitor mismatch.
Abstract: The achievable signal-to-noise ratio is switched-capacitor delta-sigma modulation analog-to-digital converters is set by the oversampling clock frequency divided by twice the signal bandwidth. The use of double sampling in the switched-capacitor integrators to achieve a factor of two increase in the oversampling factor without reducing the settling time of the operational amplifier is proposed. Detailed simulations have shown that for sufficiently small capacitor mismatch, the double-sampling schemes provide a significant increase in SNR. The larger the desired SNR, the more sensitive the circuit is to capacitor mismatch. It is concluded that the random gain implementation is preferred over the alternating gain scheme, because the former spectrally spreads the effect of the capacitor mismatch. >

63 citations


Proceedings ArticleDOI
12 Aug 1990
TL;DR: A switched-capacitor (SC) DC-DC converter is developed to reduce the input current ripple and to achieve miniaturization by a copper thick-film hybrid technique.
Abstract: A switched-capacitor (SC) DC-DC converter is developed to reduce the input current ripple and to achieve miniaturization A fixed-capacitor added to an original SC reduces the input current ripple This converter is miniaturized by a copper thick-film hybrid technique The features of this converter are as follows: (1) low input current ripple (one third compared with that of original SC DC-DC converters), (2) very high efficiency (90%), and (3) very high power density (23 W/in/sup 3/ in the 10 W class) >

59 citations


Journal ArticleDOI
TL;DR: Simulation results for a pulse-code modulation (PCM) voice encoder, a sigma-delta modulator, a neural network, and a phase-locked loop are presented to demonstrate the flexibility of the signal-dependent modification of network topology.
Abstract: The simulation of mixed switched-capacitor/digital (SC/D) networks containing capacitors, independent and linear-dependent voltage sources, switches controlled either by periodic or nonperiodic Boolean signals, latched comparators, and logic gates is considered. A unified linear switched-capacitor network (SCN) and mixed SC/D network simulator, SWITCAP2, and its applications to several widely used and novel nonlinear SCNs are discussed. The switches may be controlled by periodic waveforms and by nonperiodic waveforms from the outputs of comparators and logic gates. The signal-dependent modification of network topology through the comparators, logic gates, and signal-driven switches makes the modeling of various nonlinear switched-capacitor circuits possible. Simulation results for a pulse-code modulation (PCM) voice encoder, a sigma-delta modulator, a neural network, and a phase-locked loop (PLL) are presented to demonstrate the flexibility of the approach. >

52 citations



Patent
23 Mar 1990
TL;DR: In this article, a DC-to-DC power converter topology utilizing parallel connected transformers in a buck switching configuration with each stage operated 180° out-of-phase, with the primary windings of the transformers sequentially feeding into a common filter capacitor.
Abstract: A DC-to-DC power converter topology utilizing parallel connected transformers in a buck switching configuration with each stage operated 180° out-of-phase, with the primary windings of the transformers sequentially feeding into a common filter capacitor. On each transformer, a secondary winding is switched to a load at the time the primary winding is shunted across the filter capacitor. The circuit provides dual inductor buck power stage operation while maintaining input-output isolation. Interleaved power processing provides continuous capacitance support for the output voltage produced by the power supply.

Journal ArticleDOI
TL;DR: In this article, the design of SC (switched-capacitor) decimators whose transfer functions have infinite impulse response (IIR) was discussed, and an optimum architecture was developed for which the speed requirements of the amplifiers were determined by the lower sampling rate, thus rendering the circuits particularly attractive for high frequency applications.
Abstract: The authors discuss the design of SC (switched-capacitor) decimators whose transfer functions have infinite impulse response (IIR). Novel optimum architectures are developed for which the speed requirements of the amplifiers are determined by the lower sampling rate, thus rendering the circuits particularly attractive for high-frequency applications. Appropriate Z-transfer functions are derived for first- and second-order IIR SC decimator building blocks. Design examples of optimum IIR SC decimators with different types of frequency response, as well as different factors of sampling rate reduction, are presented to demonstrate their practical feasibility. >

Patent
24 Jul 1990
TL;DR: In this article, a circuit for controlling the amplitude of video signals includes a control circuit which contains a first capacitor and a second capacitor, and the second capacitor's voltage serves as a control voltage for the video signal.
Abstract: A circuit for controlling the amplitude of video signals includes a control circuit which contains a first capacitor. For each image pulse, a charge which corresponds to the amplitude of the generated video signal during a prior frame cycle is stored in the first capacitor. During the frame flyback pulse, this charge is transferred to a second capacitor by means of a switch. The second capacitor's voltage serves as a control voltage for the video signal. After the charge is transferred to the second capacitor, the first capacitor is discharged.

Proceedings Article
01 Sep 1990
TL;DR: In this paper, the authors describe two low voltage (1.5 V minimum) Switched Capacitor (S.C.) filters that achieve a dynamic range comparable with that of filters operated from 5V or more.
Abstract: Line fed telecommunication circuits like battery operated circuits must work from very low supplies. Contrary to most battery operated systems in telecommunication applications, high performance is also required. This paper describes two low voltage (1.5 V minimum) Switched Capacitor (S.C.) filters that achieve a dynamic range comparable with that of filters operated from 5V or more. Both filters use a fully differential architecture and are fabricated on a standard BiCMOS technology. Measured performance from a 2 V supply are a SNR of 92 dB and a THD of -70 dB for a 2.4 Vpp differential signal. Power consumption and area per pole are 60 ?W and 300 mil2 respectively with a clock frequency of 480 kHz.

Journal ArticleDOI
TL;DR: A switched-capacitor interface for capacitive sensors based on a modified Martin's relaxation oscillator is proposed, which requires a relatively small device count integrable onto a small chip area and its suited particularly for the on-chip interface circuitry for microprocessors.
Abstract: A switched-capacitor (SC) interface for capacitive sensors based on a modified Martin's relaxation oscillator is proposed. The output signal is the duty-cycle of a pulse-width modulated square-wave voltage or a binary-coded digital signal which is directly related to the capacitance ratio of an unknown capacitance and reference capacitance. The circuit can be implemented in a monolithic IC form using CMOS technology. It requires a relatively small device count integrable onto a small chip area and its suited particularly for the on-chip interface circuitry for microprocessors. >

Proceedings ArticleDOI
13 May 1990
TL;DR: An approach to creating switched-capacitor circuits with supply voltages as low as 1.4 V is presented and a second threshold adjustment implant mask for p-channel devices additional voltage reduction and performance improvement may be achievable.
Abstract: An approach to creating switched-capacitor circuits with supply voltages as low as 1.4 V is presented. The addition of one mask step creates an addition device type of low threshold. This device may be used both as a switch and in the amplifiers of switched capacitor circuits. A seventh order Chebyshev test circuit demonstrated performance approximating that of the more 5-10 V switched-capacitors filter circuits. By adding a second threshold adjustment implant mask for p-channel devices additional voltage reduction and performance improvement may be achievable. >

Patent
Helmut Brazdrum1, Rudolf Koch1
07 May 1990
TL;DR: In this article, a switched-capacitor sigma-delta modulator includes at least one memory element, at least three comparators, and at least two integrators.
Abstract: A switched-capacitor sigma-delta modulator includes at least one memory element, at least one comparator, and at least one integrator. The at least one integrator has an input stage including a series circuit of a first switch, a first capacitor and a second switch, a third switch for connecting one of the two terminals of the first capacitor to ground potential, and a fourth switch for connecting the other of the two terminals of the first capacitor to ground potential. A nodal point is connected between the second and fourth switches and the other of the two terminals of the first capacitor. A negative feedback stage includes second and third capacitors each having one terminal connected to the nodal point. A fifth switch connects the other terminal of the second capacitor to a first potential. A sixth switch connects the other terminal of the third capacitor to a second potential. Seventh and eighth series-connected switches connect the other terminal of the second capacitor to the second potential. Ninth and tenth series-connected switches connect the other terminal of the third capacitor to the first potential. The eighth and tenth switches may be omitted. Eleventh and twelfth switches or thirteenth and fourteenth switches may respectively connect the second and third capacitors to one nodal point or to a nodal point symmetrical thereto or visa versa, as a function of the output signal of the memory element.

Journal ArticleDOI
TL;DR: In this paper, the operating characteristics of the switched capacitor transformer are formulated and analyzed by means of the state-space averaging method for the three types: 1/2-stepdown type, 2-step-up type, and polarity inverting type.
Abstract: The operating characteristics of the switched capacitor transformer are formulated and analyzed by means of the state-space averaging method for the three types: 1/2-step-down type, 2-step-up type, and polarity inverting type. The following conclusions are obtained: (1) The static characteristic is equivalent to that of a battery with the induced voltage of the input times the transformer ratio and the output resistance represented by the duty ratio and the on-resistances of the switches. (2) Using switches having small on-resistances and selecting a high duty ratio and the frequency five to ten times the natural frequency of the circuit, the output resistance can be made small and a high transforming efficiency of 80 to 90 percent can be realized. (3) The dynamic characteristic is a first order for the step-down type and a second order for the step-up and polarization inverting type in which no oscillation results with a feedback. In comparison with a switching converter using a reactor, the present structure is superior in stability. These conclusions were confirmed experimentally. Next, as an application of the switched-capacitor transformer, a dc-dc converter with a 12-V input and a 5-V output was constructed. As a method for regulating the output, an on-resistance control was used instead of a conventional PWM control and a frequency control. The test results are excellent as: (1) the ripple of the output voltage is reduced to one-tenth that for the PWM control, (2) the maximum output power is 50 W (10 A) and the efficiency is 80 percent for the specified input and output, and (3) the load response is excellent.

Patent
Alan L. Westwick1
19 Sep 1990
TL;DR: In this paper, two or more current sources were used to source current to a single bipolar transistor to achieve a more stable Vbe input for a switched capacitor bandgap reference circuit.
Abstract: Time multiplexing two or more current sources to source current to a single bipolar transistor achieves a more stable Vbe input for a switched capacitor bandgap reference circuit. With the proper selection of switched capacitor sizes and current sources values to establish a Vbe voltage at the input of a differential amplifier, an output reference voltage can be achieved that is substantially independent of processing and temperature variations as well as circuit aging characteristics. The invention reduces, and in some cases, eliminates the need for trimming values of capacitance or resistance to achieve the desired output reference voltage.

Journal ArticleDOI
TL;DR: In this article, the implementation of general-purpose FIR (far infrared) filters by stray-insensitive SC (switched capacitor) techniques is addressed and a simple building block for an analog tapped delay line is introduced.
Abstract: The implementation of general-purpose FIR (far infrared) filters by stray-insensitive SC (switched capacitor) techniques is addressed. First, a simple building block for an analog tapped delay line is introduced. The proposed cell comprises a single amplifier and is controlled by a multiphase clocking scheme. Then, it is shown how this circuit can be developed into a generic FIR filter cell without the need for additional amplifiers. The feasibility of the new building blocks is demonstrated by the example of a linear-phase low-pass filter design. >

Journal ArticleDOI
Brent Maundy1, Ezz El-Masry
TL;DR: A bidirectional associative memory using switched-capacitor (SC) filter techniques (SCBAM) is introduced and verified experimentally, making it a good candidate for analog VLSI neural network implementations.
Abstract: A bidirectional associative memory using switched-capacitor (SC) filter techniques (SCBAM) is introduced and verified experimentally. The discrete-time equation that characterizes SC filter design is shown to be applicable in recalling m stored vector pairs that can be encoded in a correlation matrix M. The elements of M (and M/sup T/) are represented by the values of the capacitor ratios used in the SCBAM. The SCBAM exhibits similar error correcting properties as the normal BAM, making it a good candidate for analog VLSI neural network implementations. >

Patent
09 Apr 1990
TL;DR: In this paper, a high-resolution high-energy x-ray digital imager was proposed for patient xray diagnosis and the location of bony landmarks in high energy radiation therapy.
Abstract: A high resolution high-energy x-ray digital imager suitable for patient x-ray diagnosis and the location of bony landmarks in high energy radiation therapy. The imager employs an array of sensor chips which need not lie in a plane in order to provide overlap of non-active components and direct readout (non - CCD) signal processing electronics incorporating a switched capacitor per detector readout to sense a short x-ray pulse. The switching prevents dark current from discharging sensing capacitors and corrupting the data signal.

Proceedings Article
01 Sep 1990
TL;DR: In this article, a fully integrated CMOS version of an instrumentation amplifier using switched capacitor techniques is presented, which provides differential input capability, programmable amplification, clock generation, and low pass filtering on the chip.
Abstract: In the recent years enormous progress has been made in integration of sensors and electronics on the same silicon substrate. So a strong demand for incorporated instrumentation amplifiers has arisen. In this paper we present a fully integrated CMOS version of such an amplifier using switched capacitor techniques. The amplifier system provides differential input capability, programmable amplification, clock generation, and low-pass filtering on the chip. The output signal is continuous in time and the system can be used without any special precautions necessary for sampled-data circuits. Emphasis was laid on high PSRR, low noise and offset, low harmonic distortion, and small amplification error. For covering a large field of applications only slightly different realizations can be used for capacitive sensors as well as for resitive sensor bridges.

Patent
Takahiro Fuse1
21 Dec 1990
TL;DR: In this paper, a voltage generating circuit generates voltages of various voltage levels for driving a liquid crystal display device, and a second voltage source generates third voltage for driving the display device while there is provided a second switched capacitor circuit which inverts the third voltage in polarity to generate fourth voltage.
Abstract: A voltage generating circuit generates voltages of various voltage levels for driving a liquid crystal display device. A first voltage source generates first voltage for driving a liquid crystal device while there is provided a first switched capacitor circuit which inverts the first voltage in polarity to generate second voltage for driving a liquid crystal display device, and a second voltage source generates third voltage for driving the display device while there is provided a second switched capacitor circuit which inverts the third voltage in polarity to generate fourth voltage for driving the display device. Further, the first switched capacitor circuit is integrated together with a liquid-crystal driving circuit which selectively outputs the first and second liquid crystal driving voltage while the second switched capacitor circuit is integrated together with a liquid crystal driving circuit which selectively outputs the third and fourth liquid-crystal driving voltage.

Proceedings ArticleDOI
01 May 1990
TL;DR: In this paper, two styles of filter module, one based on the switched-current integrator and the other on the switch-current differentiator, are presented, and design methods for implementing filters with cascaded biquadratic sections using these modules are given.
Abstract: Two styles of filter module, one based on the switched-current integrator and the other on the switched-current differentiator, are presented. Design methods for implementing filters with cascaded biquadratic sections using these modules are given. Two topologies for an elementary current memory cell having circuit properties advantageous to this design environment are described. >

Journal ArticleDOI
TL;DR: In this paper, a new procedure for characterizing amplifiers in terms of settling time is presented, revealing the ultimate speed limitation for a given amplifier design and allowing the MESFET gatewidths to be scaled in order to obtain optimum settling behavior for any given capacitive load.
Abstract: High-grain operational amplifiers for implementation in GaAs technology are an essential component for analog GaAs signal processing systems using switched-capacitor circuit techniques. The requirement for high voltage gains and fast settling times in the context of the inherent technological disadvantages of GaAs (MESFET) devices leads to the development of a whole range of novel circuit techniques. For optimum performance, single-stage designs with single-ended input are considered initially. A description is given of a differential-to-single-ended converter stage that can be combined with these high gain stages to yield differential input amplifiers. A new procedure for characterizing amplifiers in terms of settling time is presented. It reveals the ultimate speed limitation for a given amplifier design and allows the MESFET gatewidths to be scaled in order to obtain optimum settling behavior for any given capacitive load. Ideas are pursued for a new generation of amplifiers with very fast settling times approaching 200 ps, intended for future switched-capacitor systems with 1-GHz switching frequencies. Considerable emphasis is placed throughout on the minimization of chip area and power consumption. The application of one of the amplifier designs in an integrated switched capacitor filter chip is presented, along with encouraging preliminary measurement. >

Proceedings ArticleDOI
C.T. Chuang1, K. Chin1
17 Sep 1990
TL;DR: In this paper, the authors proposed a charge-buffered coupling between the commonemitter node of the switching transistors and the base of an active-pull-down npn transistor, which provides a much larger dynamic current than that which can be reasonably achieved through the capacitor coupling and a DC path.
Abstract: The circuit features a charge-buffered coupling between the common-emitter node of the switching transistors and the base of an active-pull-down npn transistor. This coupling scheme provides a much larger dynamic current than that which can be reasonably achieved through the capacitor coupling and a DC path to alleviate the AC-testing requirement. Furthermore, the dynamic current is utilized effectively by the logic stage, thus allowing a reduction in the power consumption of the logic stage without sacrificing the switching speed. Based on an 0.8- mu m double-poly self-aligned bipolar technology at a power consumption of 1.0 mW/gate, the circuit offers 37% improvement in both the speed and load driving capability for a loaded gate compared with the conventional ECL circuit. The design and scaling considerations of the circuit are discussed. >

Proceedings ArticleDOI
12 Aug 1990
TL;DR: In this article, a switched-capacitor driving circuit for a solid-state relative humidity sensor has been demonstrated using a discrete implementation and the circuit has been layed out and simulated for integration on a single chip.
Abstract: A switched-capacitor driving circuit for a solid-state relative humidity sensor has been demonstrated. This CMOS circuit has been characterized using a discrete implementation. The circuit has been layed out and simulated for integration on a single chip. In addition, the long-term reliability of the solid-state sensing device has been investigated. The capacitance-RH characteristics exhibits a drift of +5% after eight weeks of aging at 85 degrees C/85% RH. The linearity of the device decreases after 15 weeks of aging. The device drift is the greatest at low frequencies (12 Hz). The stability is best at higher frequencies. An operating frequency of 100 kHz for best device reliability is recommended. >

Journal ArticleDOI
TL;DR: In this article, a switch-capacitor (SC) equalizer with three operational amplifiers and six capacitor banks is presented, which can independently control the center frequency, bandwidth and peak voltage gain steps for the bump (and dip) frequency response.
Abstract: A versatile and economical switched-capacitor (SC) equalizing structure to compensate attenuation characteristics is presented. The monolithic SC bump equalizer has three operational amplifiers and six capacitor banks to independently control the center frequency, bandwidth, and peak voltage gain steps for the bump (and dip) frequency response. The bump equalizer has been integrated using 3- mu m CMOS (p-well) technology and occupies an area of 3.36 mm/sup 2/, including an additional test amplifier and test buffer. The circuit operating from +or-5-V power supplies typically dissipates 60 mW when sampled at 75 kHz. >