Showing papers on "Switched capacitor published in 2002"

Multi-stage switched capacitor DC-DC converter

Abstract: A three-stage switched capacitor DC-DC converter capable of generating an output boosted voltage in increments of less than power supply voltage. A first stage of the DC-DC converter comprises two capacitors and three switches, which alternate a connection of the two capacitors. The two capacitors are connected in series when charging by turning one of the switches ON, and are connected in parallel when discharging by turning the other two of the switches ON.

Capacity limits and matching properties of integrated capacitors

Abstract: Theoretical limits for the capacitance density of integrated capacitors with combined lateral and vertical field components are derived. These limits are used to investigate the efficiency of various capacitive structures such as lateral flux and quasifractal capacitors. This study leads to two new capacitor structures with high lateral-field efficiencies. These new capacitors demonstrate larger capacities, superior matching properties, tighter tolerances, and higher self-resonance frequencies than the standard horizontal parallel plate and previously reported lateral-field capacitors, while maintaining comparable quality factors. These superior qualities are verified by simulation and experimental results.

Low power Schmitt trigger circuit

Abstract: Conclusion: A novel approach based on a PWLL for the generation of a.50% duty cycle clock from an input clock with arbitrary duty cycle has been described. It can also be used to generate an output clock with duty cycles from 25 to 75%. The design has been shown to achieve this performance without affecting the jitter on one (sampling) edge of the input clock, which is very important for high-performance switched capacitor-based designs. 100

Adaptive sigma-delta data converter for mobile terminals

Abstract: A multimode communications device includes an RF section and an analog-to-digital converter (ADC) located in a receive path between the RF section and a baseband section. The ADC includes a programmable signal converter core operable to perform ADC functions on a received RF signal in accordance with different types of mobile communication device operational modes, and further includes a multimode control function for programming the signal converter core as a function of a currently selected operational mode. The programmable signal converter core preferably includes a sigma-delta modulator, and a signal analysis function is provided for analyzing the received RF signal for dynamically programming the converter core to adapt to temporary signal and interference conditions by increasing or decreasing the performance of the signal converter. The signal analysis function may be embodied as a decimation filter having an input coupled to an output of the modulator, or by a digital signal processor forming a portion of a baseband section. The programmable signal converter core may be programmed to change the number of bits used by the sigma-delta modulator and/or a loop filter transfer function and loop filter coefficients, or a number of quantizer levels, or decimator coefficients and word width. The sigma-delta modulator bias currents may also be changed, as may a selected type of dynamic element matching function, each as a function of the selected mode. Other operational criteria that can be changed include the sigma-delta modulator oversampling ratio and/or a change from a switched capacitor to a resistor-capacitor circuit technique, or vice versa.

Trade-offs in analog circuit design : the designer's companion

Abstract: Foreword. Design Methodology. Qualitative Reasoning C. Toumazou. Design for Manufacture B. Gilbert. IC Layout for Manufacture B. Gilbert. Technology. Trade-offs in CMOS VLSI Circuits A.V. Mezhiba, E.G. Friedman. Floating Gate Circuits And Systems T.S. lande. Trade-offs in bandgap reference design A. van Staveren et al. General Performance. Generalised feedback circuit analysis and tradeoffs S.K. Burgess, J. Choma. Analog Amplifiers Architectures: Gain Bandwidth Trade-Offs A. Burdett, C. Toumazou. Noise, Gain and Bandwith in Analog Design R.G. Meyer. Trade-offs in frequency compensation A. van Staveren, et al. Frequency-Dynamic Range-Power E. Vittoz, Y. Tsividis. Filters. Trade-offs in Sensitivity, Component Tolerances and Component Spread in Active Filter Design G. Moschytz. Trade-Offs in Continuous Time Filters R. Fox. Insights in Log-domain filtering E. Drakakis, A. Burdett. Switched Circuits. Trade-offs in the Design of CMOS Comparators A. Rodriguez-Vazquez, et al. Tradeoffs in Switched Capacitor Circuits A. Baschirotto. Compatibility of Switched Capacitor with Digital Technology K. Leelavattananon. Switched Capacitors or Switched Current - Which Will Succeed? J. Hughes, A. Worapishet. Oscillators. Trade-Offs in Design of Integrated LC VCOs D. Ham. Trade-Offs in Oscillator Phase Noise A. Hajimiri. Data Convertors. Systematic design of high-performance data converters G. Gielen, et al. Analog power modeling for data converters and filters G. Gielen, E. Lauwers. Speed vs. Dynamic Trade-Off in Oversampling Data Converters R. Schreier, et al.Transceivers. Power Conscious Design of Wireless Circuits and Systems A.A. Abidi. Trade-Offs in Photoreceiver design M. Forbes. Analog Front End Design Considerations for DSL N.N. Tan. Trade-offs in low noise design M.H.L. Kouwenhoven, et al. Trade-offs in CMOS Mixer Design G. Kathiresan, C. Toumazou. A High-Performance Dynamic Logic Phase Frequency Detector S. Li, M. Ismail. Trade-Offs in Power Amplifiers T. Chan, et al. Neural Processing. Trade-offs in Standard and Universal CNN Cells M. Hanggi, et al. Analogue CAD. Top-Down Design Methodology for Analog Circuits using MATLAB and Simulink N. Chandra, G. Roberts. Techniques and applications of symbolic analysis for analog integrated circuits G. Gielen.

Integrated programmable continuous time filter with programmable capacitor arrays

Abstract: A programmable capacitor array including a plurality of user-selectable, numerically weighted capacitors, each of which includes at least one fixed capacitor and one manufacturer-controlled trim capacitor, advantageously provides a variety of selectable capacitance values for a programmable analog integrated circuit. When coupled to a memory, for example a static memory, switches can be controlled that determine whether a particular fixed capacitor (user-selectable) or trim capacitor (manufacturer-selectable) is electrically coupled into the circuit. User access to those portions of memory controlling switches associated with the trim capacitors can be restricted via an I/O interface and security command. Such programmable capacitor arrays allow efficient implementation of user-programmable filter circuits where the user can conveniently program or reprogram a variety of filter parameters.

Digitally controlled crystal oscillator with integrated coarse and fine control

Abstract: A method of tuning a DCXO includes the step of providing a coarse tuning array and a fine tuning array of capacitors fabricated on the same integrated circuit die. The coarse array is adjusted until the difference between a desired frequency and the output frequency corresponds to a change in capacitance no greater than half the range of the fine tuning array. In one embodiment, the fine tuning array is adjusted to mid-range before adjusting the coarse tuning array. A DCXO apparatus includes at least one integrated circuit segmented switched capacitor network providing a capacitance that is a nonmonotonic function of a composite input code. The segmented switched capacitor network includes parallel coupled binary weighted and thermometer coded switched capacitor networks for coarse and fine tuning, respectively.

Practical oscillation-based test of integrated filters

Abstract: Oscillation-based test (OBT) techniques show promise in detecting faults in mixed-signal circuits and require little modification. to the circuit under test. Comparing both the oscillation's amplitude and frequency yields acceptable test quality. OBT seems especially appealing for filters but requires adaptation to handle monolithic circuits or the analog-core-based design of complex mixed-signal ICs.

Zero-current switching switched-capacitor quasiresonant step-down converter

Abstract: Current stress is usually high for conventional switched-capacitor converter circuits, because of short-circuiting when charging up the capacitors. In this paper, two zero-current switching switched-capacitor resonant step-down converter families are presented which can improve the current stress problem. They are able to provide 1/2 to 1/n, and -1 to -1/n conversion ratios respectively by using only two switches. Principles of operation, computer simulation and experimental results of the proposed converters are presented. The measured efficiency is high and all parts of the circuits are under zero-current switching conditions.

A continuous–time sigma–delta modulator with reduced jitter sensitivity

Abstract: This paper introduces the implementation of a continuous time ΣΔ modulator with reduced jitter sensitivity for the first time to our knowledge. A previously published low power, 1.5V modulator with 12 bit resolution has been redesigned concerning the feedback D/A converter to implement a feedback pulse similar to switched capacitor modulators. A reduction of the jitter sensitivity by more than a decade could be obtained with this approach. The technique presented here has the potential to overcome one of the most severe concerns when building continuous time ΣΔ modulators compared to discrete time implementations.

Method for detecting failure of a relay

Abstract: A method for detecting failure of a relay operating in a vehicle having an ignition switch, a power supply, a capacitor, and a pre-charge circuit to pre-charge the capacitor with the relay switching power from the power supply to the pre-charged capacitor, the method comprising the steps of: performing a capacitor pre-charge test; and performing a capacitor discharge test. Preferably, the capacitor pre-charge test is performed when the ignition is switched ON and the capacitor discharge test is performed when the ignition is switched OFF.

Switched-Capacitor Circuits

Abstract: In this chapter, some trade-offs to be faced by an SC circuit designer are proposed. SC technique gained a large popularity in the past and it seems to be mature to be able to give excellent response for the future requirements of mixed-signal systems. However, the actual trends towards scaled-down technology, low-voltage and/or high-frequency systems impose an increased effort in finding new solutions for the SC circuits in order to achieve the required performance in the new conditions.

CMOS Single Chip Gas Detection Systems — Part I

Abstract: Sensor arrays based on industrial CMOS-technology combined with post-CMOS micromachining (CMOS MEMS) are a promising approach to low-cost sensors. In the first part of this article [1], the state of research on CMOS-based gas sensor systems was reviewed, and a platform technology for monolithic integration of three different transducers on a single chip was described. In this second part, the transduction principles of three polymer-based gas sensors are detailed and the read-out circuitry is portrayed. The first transducer is a micromachined resonant cantilever. The absorption of analyte in the chemically sensitive polymer causes shifts in resonance frequency as a consequence of changes in the oscillating mass. The cantilever acts as the frequency-determining element in an oscillator circuit, and the resulting frequency change is read out by an on-chip counter. The second transducer is a planar capacitor with polymer-coated interdigitated electrodes. This transducer monitors changes in the dielectric constant upon absorption of the analyte into the polymer matrix. The sensor response is read out as a differential signal between the coated sensing capacitor and a passivated reference capacitor, both of which are incorporated into the input stage of a switched capacitor second-order ΣΔ-modulator. The third transducer is a thermoelectric calorimeter, which detects enthalpy changes upon ab-/desorption of analyte molecules into a polymer film located on a thermally insulated membrane. The enthalpy changes in the polymer film cause transient temperature variations, which are detected via polysilicon/aluminum thermocouples (Seebeck effect). The small signals in the μV-range are first amplified with a low-noise chopper amplifier, then converted to a digital signal using a ΣΔ-A/D-converter and finally decimated and filtered with a digital decimation filter.

Integrated frequency selectable resonant coupling network and method thereof

Abstract: An integrated center frequency selectable resonant coupling network suited for use in an integrated circuit is disclosed. The network includes an integrated coupling transformer having a secondary winding for coupling to a load and a primary winding for coupling to a source; a first integrated capacitive circuit controllably coupled across one of the primary and secondary windings and when so coupled operable to resonate with the integrated coupling transformer at a frequency in a first frequency band; and a second integrated capacitive circuit coupled across a second one of the primary and the secondary windings that is operable to resonate with the integrated coupling transformer at a frequency in a second frequency band. The method is in an IC and includes providing and coupling an input signal within alternatively a first frequency band and a second frequency band to a primary winding of an integrated coupling transformer; controlling an integrated switched capacitor network, coupled to the transformer, to provide a coupling network that is alternatively and respectively resonant at a first and second frequency within the first and second frequency band thus selectively providing an output signal at a secondary winding of the transformer; and down converting the output signal.

Efficient charge transfer using a switched capacitor resistor

Abstract: The application of a non-zero voltage offset to rotating capacitors 1111 and 1112 permit the use of a single positive voltage supply. However, the precharging of the rotating capacitors 1111 and 1112 is power inefficient. A power efficient and low-noise precharging operation is realized through the sharing of the charge on a feedback capacitor 1075 and 1080 that is significantly larger than the rotating capacitors 1111. Once a precharging operation is complete, the charge on the feedback capacitor 1075 and 1080 is refreshed from its residual charge level (rather than zero charge level) to a desired charge level.

A time-domain procedure for locating switched capacitors in power distribution systems

Abstract: This paper develops a method using transient voltage and current measurements at the substation to determine which capacitor in a multicapacitor feeder switched on to cause a measured transient. The procedure is based upon time-domain analysis where a backward Kalman filter estimates the initial voltage of all feeder capacitors, and those estimates indicate which capacitor switched. The result is an automated procedure that can help electric utilities determine if their capacitors are switching properly, and also help pinpoint the source of capacitor switching-related power-quality problems.

On-Chip Evaluation of Oscillation-Based-Test Output Signals for Switched-Capacitor Circuits

Abstract: This work presents a simple and low-cost method for on-chip evaluation of test signals coming from the application of the Oscillation-Based-Test (OBT) technique. This method extracts the main test signal features (amplitude, frequency and DC level) in the digital domain requiring just a very simple and robust circuitry. Experimental results obtained from an integrated chip demonstrate the feasibility of the approach.

Switched-capacitor circuits with reduced distortion

Abstract: A switched capacitor circuit 300 , including a sampling capacitor 303 , switches 301, 304 for charging the sampling capacitor 303 during a charging phase, and switches 302, 305 for transferring charge from the sampling capacitor 303 to a load 313 in the feedback loop of an operational amplifier 312 during a dump phase. Circuitry 701 controls the discharge of sampling capacitor 303 during the dump phase to minimize transients at the input of the operational amplifier 312 and thereby minimize input threshold voltage variation.

High resolution, high speed, low power switched capacitor digital to analog converter

Abstract: A switched capacitor digital to analog converter includes first and second converter segments having respective first and second arrays of binary weighted capacitors. Each capacitor of the first segment has a first electrode connected to a first common node and a second electrode connected through respective switches to one of first and second reference voltage terminals. Each capacitor of the second segment has a first electrode connected to a second common node and a second electrode connected through respective switches to one of the first and second reference voltage terminals. The converter includes a coupling capacitor connected between the first and second common nodes and capacitance means connected between the first common node and a reference voltage terminal. The coupling capacitor and capacitance means have capacitances, C s and C ATT respectively, that substantially satisfy the relationship: (2 p −1)·C s −C ATT =2 p ·C, where p is the number of bits coded in the first converter segment and C is the unit capacitance.

Sample and hold circuit including a multiplexer

Abstract: A sample and hold circuit is provided which includes first and second input circuits adapted to sample, respectively, first and second voltage measurements. The second voltage measurements correspond to current measurements. A multiplexer coupled to the first and second input circuits selected either the first or second measurements. A voltage sealer is provided between the output of the first input circuit and the multiplexer. A multiplier circuit, which may be a switched capacitor network, is utilized to multiply the second voltage measurements. The multiplexer provides its output to an analog-to-digital converter.

Capacitor mismatch independent gain stage for differential pipeline analog to digital converters

Abstract: A method and apparatus are arranged for minimizing the effects of capacitor mismatch errors in pipelined analog-to-digital converters (ADC) The virtual elimination of capacitor mismatch effects is achieved without trading comparator-offset margin by an appropriate selection of comparator circuits' reference signals and the inclusion of a plurality of capacitors that are switched into an appropriate feedback position The appropriate feedback position in the switched capacitor amplifier circuit is determined based on the operating region For each of k pipeline stage, a method includes: determining an operating region of a sampled analog input signal for a predetermined transfer curve, and computing digital code bits and an improved residue signal for this stage based on the determined operating region, and then computing a final conversion code from the digital code bits of the k pipeline stages

Optimal placement and sizing of fixed and switched capacitor banks under nonsinusoidal operating conditions

Abstract: An iterative nonlinear algorithm is generated for optimal sizing and placement of fixed and switched capacitor banks on radial distribution lines in the presence of linear and nonlinear loads. The HARMFLOW algorithm and the Maximum Sensitivities Selection (MSS) method are used to solve the constrained optimization problem with discrete variables. To limit the burden of calculations and improve convergence, problem is decomposed into two subproblems. Objective functions include minimum system losses and capacitor cost while IEEE-519 power quality limits are used as constrains. Results are presented and analyzed for the 18 bus IEEE distorted system. The advantage of proposed algorithm as compared to previous works is consideration of harmonic couplings and reactions of actual nonlinear loads in the distribution system.

Analog PLL with switched capacitor resampling filter

Abstract: A resampler filter for use in an analog phase-locked loop has a charge pump and one or more switched capacitors switched by signals derived from a voltage controlled oscillator in the phase locked loop.

Clock duty cycle adjuster circuit for switched capacitor circuits

Abstract: A pulse width locked loop, which can be used to generate an output clock with a wide range of duty cycle (25 to 75%) precisely, from a single-ended input clock with any duty cycle (25 to 75%) is explained. Measurement results of an application of this loop, in pipelined data converters, are reported.

Switched-capacitor based charge redistribution successive approximation analog to digital converter (ADC)

Abstract: An improved binary-weighted, switched-capacitor, charge-redistribution successive approximation analog-to-digital converter (ADC) may include an adjusting mechanism for adding a charge corresponding to one-half of the least significant bit (LSB) of the ADC to the charge stored in a switched capacitor array thereof after the sampling phase of the ADC. This is done to provide a quantization error that is evenly distributed between ±0.5 times the LSB, without the need for any additional processing clock cycles.

Digital-type RF MEMS switched capacitors

Abstract: This paper presents digital-type RF MEMS switched capacitors built in a coplanar waveguide (CPW) configuration. In this design, a MEMS shunt bridge is fabricated over an MIM capacitor. When the bridge is in the upstate position, the CPW line is loaded mainly by the up-state MEMS bridge capacitance. When the MEMS bridge is pulled down, the line is loaded by the MIM capacitor. As a result we obtain a digital-type switched capacitor suitable for 0.5-6 GHz operation. Switched capacitors of different values (300 fF, 600 fF, 750 fF, 1.5 pF, 2.25 pF) were fabricated and resulted in high-Q (>100) designs at 1 GHz. Also a 2-bit capacitor array was demonstrated. The values of Q are limited by metal-to-metal contact resistance (0.8 /spl Omega/) and the calibration accuracy of the method used.

Generalised analysis of switched-capacitor step-down quasi-resonant converter

Abstract: Conventional switched-capacitor converter circuits have a high current stress because of the short circuit when charging and discharging the capacitors. A novel switched-capacitor quasi-resonant step-down converter family with a generalised analysis that can improve the current stress problem is presented. Measured efficiency is high and all the circuits can operate under zero-current switching.

Switched-capacitor structures with reduced distortion and noise and enhanced isolation

Abstract: Switched-capacitor structures are provided that reduce distortion and noise in their processed signals because they increase isolation between structural elements and ensure that selected elements are securely and quickly turned off and on in different modes.

Loop filter capacitor multiplication in a charge pump circuit

Abstract: A charge pump circuit with a small loop filter capacitor is disclosed in the invention. This is accomplished by providing multiple currents which add to the desired current, I. A switching circuit switches one of the currents through the capacitor, while directing a combination of the multiple currents through the resistors. In this way, a smaller current is provided through the capacitor, allowing the capacitor to be much smaller in size.

A passive soft-switching snubber for PWM inverters

Abstract: This paper presents a regenerative passive snubber circuit for PWM inverters to achieve soft-switching purposes without significant cost and reliability penalties. This passive soft-switching snubber (PSSS) employs a diode/capacitor snubber circuit for each switching device in an inverter to provide low dv/dt and low switching losses to the device. The PSSS further uses a transformer-based energy regenerative circuit to recover the energy captured in the snubber capacitors. All components in the PSSS circuit are passive, thus leading to reliable and low-cost advantages over those soft-switching schemes relying on additional active switches. The snubber has been incorporated into a 150 kVA PWM inverter. Simulation and experimental results are given to demonstrate the validity and features of the snubber circuit.