Showing papers on "Switched capacitor published in 2012"

A Switched-Capacitor Inverter Using Series/Parallel Conversion With Inductive Load

Abstract: A novel switched-capacitor inverter is proposed. The proposed inverter outputs larger voltage than the input voltage by switching the capacitors in series and in parallel. The maximum output voltage is determined by the number of the capacitors. The proposed inverter, which does not need any inductors, can be smaller than a conventional two-stage unit which consists of a boost converter and an inverter bridge. Its output harmonics are reduced compared to a conventional voltage source single phase full bridge inverter. In this paper, the circuit configuration, the theoretical operation, the simulation results with MATLAB/SIMULINK, and the experimental results are shown. The experimental results accorded with the theoretical calculation and the simulation results.

Zero-Current Switching Switched-Capacitor Zero-Voltage-Gap Automatic Equalization System for Series Battery String

Abstract: The series battery string or supercapacitor string automatic equalization system based on quasi-resonant switched-capacitor converter is presented in this paper. It realizes the zero-voltage gap between cells and allows maximum energy recovery in a series battery system or supercapacitor system. It not only inherits the advantage of conventional switched-capacitor battery cell balancing system, but also overcomes the drawback of conduction loss, switching loss, and finite voltage difference among battery cells. All switches are MOSFET and controlled by just a pair of complementary signals in synchronous trigger pattern and the resonant tanks operate alternatively between the two states of charging and discharging. Zero-current switching and zero-voltage gap are achieved in this paper. Different resonant tank designs can meet the needs of different balancing time to meet the needs of different energy storage devices. Experimental results indicate that the efficiency of the system is high exceeding 98%. The system is very suitable for balancing used in battery management system.

Ultra-Large Gain Step-Up Switched-Capacitor DC-DC Converter With Coupled Inductor for Alternative Sources of Energy

Abstract: An ultra-large voltage conversion ratio converter is proposed by integrating a switched-capacitor circuit with a coupled inductor technology. The proposed converter can be seen as an equivalent parallel connection to the load of a basic boost converter and a number of forward converters, each one containing a switched-capacitor circuit. All the stages are activated by the boost switch. A single active switch is required, with no need of extreme duty-ratio values. The leakage energy of the coupled inductor is recycled to the load. The inrush current problem of switched capacitors is restrained by the leakage inductance of the coupled-inductor. The above features are the reason for the high efficiency performance. The operating principles and steady state analyses of continuous, discontinuous and boundary conduction modes are discussed in detail. To verify the performance of the proposed converter, a 200 W/20 V to 400 V prototype was implemented. The maximum measured efficiency is 96.4%. The full load efficiency is 95.1%.

Ring amplifiers for switched-capacitor circuits

Abstract: In this paper the fundamental concept of ring amplification is introduced and explored. Ring amplifiers enable efficient amplification in scaled environments, and possess the benefits of efficient slew-based charging, rapid stabilization, compression-immunity (inherent rail-to-rail output swing), and performance that scales with process technology. A basic operational theory is established, and the core benefits of this technique are identified. Measured results from two separate ring amplifier based pipelined ADCs are presented. The first prototype IC, a simple 10.5-bit, 61.5 dB SNDR pipelined ADC which uses only ring amplifiers, is used to demonstrate the core benefits. The second fabricated IC presented is a high-resolution pipelined ADC which employs the technique of Split-CLS to perform efficient, accurate amplification aided by ring amplifiers. The 15-bit ADC is implemented in a 0.18 μm CMOS technology and achieves 76.8 dB SNDR and 95.4 dB SFDR at 20 Msps while consuming 5.1 mW, achieving a FoM of 45 fJ/conversion-step.

Merged Two-Stage Power Converter With Soft Charging Switched-Capacitor Stage in 180 nm CMOS

Abstract: In this paper, we introduce a merged two-stage dc-dc power converter for low-voltage power delivery. By separating the transformation and regulation function of a dc-dc power converter into two stages, both large voltage transformation and high switching frequency can be achieved. We show how the switched-capacitor stage can operate under soft charging conditions by suitable control and integration (merging) of the two stages. This mode of operation enables improved efficiency and/or power density in the switched-capacitor stage. A 5-to-1 V, 0.8 W integrated dc-dc converter has been developed in 180 nm CMOS. The converter achieves a peak efficiency of 81%, with a regulation stage switching frequency of 10 MHz.

Merged Two-Stage Power Converter With Soft Charging Switched-Capacitor Stage in 180 nm CMOS

Abstract: Interconnect Focus Center (United States. Defense Advanced Research Projects Agency and Semiconductor Research Corporation)

Behavioral Average Modeling and Equivalent Circuit Simulation of Switched Capacitors Converters

Abstract: A generic behavioral average circuit model of a switched capacitor converter (SCC) is proposed and demonstrated by a unity conversion SCC The model is based on the average currents concept and can be used to calculate or simulate the average values of the SCC variables such as output voltage, capacitor voltages, and subcircuit currents The model is valid for all operational ranges of an SCC (complete, partial, and no charge) and is compatible with any circuit simulator that includes dependent sources Excellent agreement was found between full switched-circuit simulation, average simulation by proposed model, and experimental results

On the Influence of Switch Resistances on Switched-Capacitor Converter Losses

Abstract: The contribution of switch resistances to the losses in switched-capacitor converters (SCC) is reevaluated. The results reaffirm the crucial role that the switch resistances play in the design of open-loop and regulated SCC.

Decentralized Reactive Power Control for Advanced Distribution Automation Systems

Abstract: In this paper a decentralized reactive power control scheme is proposed to optimally control the switched capacitor in the system in order to minimize system losses and maintain acceptable voltage profile. The proposed technique is based on placing a remote terminal unit (RTUs) at each DG and each at line capacitor. These RTUs being coordinated together through communication protocols form a multiagent system. Novel decentralized algorithm is proposed to estimate the voltage profile change as a result of injecting reactive power at the capacitor bus. Simulation results are presented to show the validity and the effectiveness of the proposed technique.

A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS

Abstract: This work presents a switched-capacitor power converter (SCPC) with a power density of 38.6mW/mm2 at 81% efficiency and 3.8mV output voltage ripple (ΔV 0 ) in baseline 90nm CMOS. The design implements two different conversion ratios to maximize efficiency for a wide range of input voltages, and the use of 41 phases results in a very low output voltage ripple and low input current spikes.

A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS

Abstract: A low-power receiver circuit in 32 nm SOI CMOS is presented, which is intended to be used in a source-synchronous link configuration. The design of the receiver was optimized for power owing to the assumption that a link protocol enables a periodic calibration during which the circuit does not have to deliver valid data. In addition, it is shown that the transceiver power and the effect of high-frequency transmit jitter can be reduced by implementing a linear equalizer only on the receive side and avoiding a transmit feed-forward equalizer (TX-FFE). On the circuit level, the receiver uses a switched-capacitor (SC) approach for the implementation of an 8-tap decision-feedback equalizer (DFE). The SC-DFE improves the timing margin relative to previous DFE implementations with current feedback, and leads to a digital-style circuit implementation with compact layout. The receiver was measured at data rates up to 13.5 Gb/s, where error free operation was verified with a PRBS-31 sequence and a channel with 32 dB attenuation at Nyquist. With the clock generation circuits amortized over eight lanes, the receiver circuit consumes 2.6 mW/Gbps from a 1.1 V supply while running at 12.5 Gb/s.

Stacked switched capacitor energy buffer architecture

Abstract: Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited and their reliability is a major concern. This paper presents a stacked switched capacitor (SSC) energy buffer architecture and some of its topological embodiments which overcome this limitation while achieving comparable effective energy density without electrolytic capacitors. The architectural approach is introduced along with design and control techniques. A prototype SSC energy buffer using film capacitors, designed for a 320 V dc bus and able to support a 135 W load has been built and tested with a power factor correction circuit. It demonstrates the effectiveness of the approach.

Switched-Capacitor Converter State Model Generator

Abstract: Efficient analysis techniques for complex switched-capacitor (SC) converters are essential design tools for the development of practical SC converters. Techniques that use state-space equations based on conventional circuit analysis methods have proven effective in modeling the practical performance of SC converters. Iterative methods of design based on these analysis techniques require the formulation of many Kirchhoff voltage and current equations, which is time consuming if derived manually. Here, an algorithm is introduced to automate the creating of the matrices required for state-space-based modeling of SC converters. The state equations are generated algorithmically, given a standard node incidence matrix generated from a user-defined netlist. The algorithm enables a designer to quickly iterate SC converter design solutions based on their predicted performance. The resulting models are compared against manually generated models, simulations, and experimental results.

A Dual-Mode CMOS RF Power Amplifier With Integrated Tunable Matching Network

Abstract: A dual-mode CMOS power amplifier (PA) with an integrated tunable matching network is presented. A switched capacitor is fully analyzed to implement a tunable matching network in terms of power-handling capability, tuning ratio, quality factor, and linearity. Based on the presented consideration, a 3.3-V 2.4-GHz fully integrated CMOS dual-mode PA is implemented in a 0.18-μm CMOS process. The PA has two power modes, high-power and low-power (LP), and each mode is optimally matched by the tunable matching network. The LP mode enables more than 50% dc current reduction from 0- to 10-dBm power range. The improved efficiency in this study is approximately twice that of other multimode CMOS PAs reported thus far.

A Switched-Capacitor Voltage Tripler With Automatic Interleaving Capability

Abstract: This paper presents a high-efficiency switched-capacitor voltage tripler topology aimed at high-power applications. A soft-switching scheme without the addition of extra components is adopted to minimize the switching loss and the electromagnetic interference noises. A two-step current charging method is used to enable the input current and output voltage interleaving functionality without adding an excessive number of components. The large loss on the input capacitor that exists in the traditional switched-capacitor topologies is eliminated by employing this interleaving scheme. The soft switching and interleaving results are analyzed in detail. The experimental results for a 2-kW prototype are demonstrated to verify the functionality of the proposed topology.

Switched-Capacitor-Cell-Based Voltage Multipliers and DC–AC Inverters

Abstract: In this paper, several modular converter topologies based on a switched-capacitor-cell concept are introduced for high-power applications. Two types of switched-capacitor cells, including the full cell and the half-cell, are discussed. The full cell can be used for dc-ac inversion, and the half-cell is utilized in both dc-dc and dc-ac applications. A rotational charging scheme is adopted for the half-cell-based dc-dc voltage multiplier to eliminate the large output capacitor that exists in many traditional switched-capacitor topologies. A soft-switching scheme, which does not require extra components, is adopted to reduce the switching loss and electromagnetic interference. A variable switching frequency control scheme is proposed to realize soft switching for dc-ac inverters. The experimental results on a 2-kW prototype are presented to verify the proposed topologies.

Pre-charge of switched capacitor circuits with cascoded drivers

Abstract: An apparatus for voltage conversion includes a switched capacitor circuit, a pre-charge circuit, a voltage divider stage, and a driver stage. The switched capacitor circuit has pump capacitors to transfer energy and a steady-state operating mode and a pre-charge mode. The pre-charge circuit initially charges the pump capacitors when the switched capacitor circuit operates in the pre-charge mode. It includes a voltage divider stage having one or more nodes, each of which provides voltage at one of a corresponding one or more voltage levels, and a driver stage having one or more cascoded drivers, each of which comprises a first terminal for receiving a drive signal that depends at least in part on a voltage level at a corresponding one of the nodes, and a second terminal for coupling to a pump capacitor and to another of the drivers.

A 600-W Switched-Capacitor AC–AC Converter for 220 V/110 V and 110 V/220 V Applications

Abstract: This letter proposes an ac-ac converter based on the switched-capacitor principle. The new topology is described, analyzed, designed, and tested in the laboratory. The converter characteristics at the frequency of the input voltage and at the switching frequency are described herein. The absence of magnetic elements and the stress voltages in all components equal to half the input voltage are the main advantages of the proposed ac-ac converter. In order to demonstrate the performance of this converter a design example and experimental results for a prototype of 600 W, 220 Vrms high-side voltage, 110 Vrms low-side voltage, and switching frequency of 50 kHz are reported herein. The maximum and nominal efficiencies obtained were 95.6% and 90.6%, respectively.

A 92%-efficiency wide-input-voltage-range switched-capacitor DC-DC converter

Abstract: The traditional inductor-based buck converter has been the dominant design for step-down switched-mode voltage regulators for decades. Switched-capacitor (SC) DC-DC converters, on the other hand, have traditionally been used in low-power ( 80% over a load range of 5mA to 1A) than surveyed competitive buck converters, while requiring less board area and less costly passive components. The topology and controller enable a wide input voltage (V IN ) range of 7.5 to 13.5V with an output voltage (V OUT ) of 1.5V. Control techniques based on feedback and feedforward provide tight regulation (30mV pp ) under worst-case load-step (1A) conditions. This work shows that SC converters can outperform buck converters, and thus the scope of SC converter applications can and should be expanded.

On the Input Resistance of a Reconfigurable Switched Capacitor DC–DC Converter-Based Maximum Power Point Tracker of a Photovoltaic Source

Abstract: The use of a switched capacitor (SC) dc-dc converter for tracking the maximum power point (MPP) of a photovoltaic (PV) array with the possibility of partial shading is described. The SC converter topology can be reconfigured to maximize conversion efficiency depending on the solar radiation and load. A new control scheme for MPP tracking based on tuning the input resistance (RIN) of the SC converter MPP tracker with a battery tied load to match the output resistance of the array at MPP is proposed. RIN of the SC converter MPP tracker is studied extensively. The limits of RIN and its sensitivity to Pulse-width modulation (PWM), frequency modulation (FM), and circuit parameters of the SC converter are analyzed. Based on the sensitivity analysis, the proposed control scheme consists of an inner FM loop for fine control, an outer PWM loop for coarse control, and a provision to increase the dynamic range of RIN with adjustments of certain converter circuit parameters. A hardware prototype of a 10-W SC converter-based MPP tracker is built. Experimental measurements on the hardware model confirm the theoretical analysis. An algorithm to implement the MPP tracking control scheme is also tested.

Level-Shifting Multiple-Input Switched-Capacitor Voltage Copier

Abstract: In this paper, a level-shifting voltage-copier circuitry is introduced to convert one or two input voltage levels to eight voltage levels. The voltage copier consists of five kinds of conversion circuits. Each circuit includes only six to seven electronic components, which can ensure the simplicity and reliability of the voltage copier. A resonant inductor is further added to improve the performance of these circuits. A high-efficiency resonant voltage copier is introduced. Simulation and experimental results verify the performance of the voltage copier and the design method. The circuit family provides a useful method for voltage conversion under multiple-input sources to multiple outputs.

Efficient Digital Background Calibration of Time-Interleaved Pipeline Analog-to-Digital Converters

Abstract: A novel technique for the digital background calibration of time-interleaved analog-to-digital converters is proposed. The technique corrects at the same time for both errors due to gain, offset and timing mismatches among the time-interleaved channels and errors due to nonlinearities in the channels, for instance due to capacitor mismatches in switched capacitor implementations. This feature, together with the use of the recursive least mean squares algorithm, makes the technique particularly fast (12 bits of accuracy can be achieved after about 4000 samples for a two-channel converter). The proposed calibration technique employs wideband differentiators, thus enabling digital background calibration of timing skews even with wideband input signals. Besides, undersampled differentiator filters are proposed, and it is shown that the technique is capable of calibrating undersampling converters by estimating the derivative of wideband input signals even outside the first Nyquist band.

Analysis and Design of a High-Voltage-Gain Hybrid Switched-Capacitor Buck Converter

Abstract: This paper presents an analysis on the effect of having different number of capacitors n in the first-stage switched-capacitor circuit of an improved hybrid switched-capacitor buck converter for high-voltage-gain conversion. Various aspects of the topology, operation, and efficiency are investigated. It is shown both analytically and experimentally that a higher n in the step-down capacitor stage does not necessarily lead to an overall improved power efficiency. A design and optimization method is thus proposed for the improved SC-buck converter.

High efficiency switched capacitor buck-boost converter for PV application

Abstract: A switched capacitor buck-boost DC/DC converter is proposed for the parallel connected distributed photovoltaic (PV) power generation application: an uncontrolled switched capacitor resonant converter is in parallel connection with a buck-boost converter where their outputs are summed to support the load. The switched capacitor converter is operated with a fixed conversion gain whereas the buck-boost converter is controlled to do the MPPT regulation and only a small portion of energy flows through it. In order to obtain ZVS for switched capacitor circuit in the full load range, an auxiliary inductor is added. The converter's performance has been evaluated on a 240W experimental prototype. The test results show that 92.5% efficiency is achieved to generate 200V high output voltage from a 60 cells crystalline PV module with V mpp =30V.

A transformerless galvanically isolated switched capacitor LED driver

Abstract: The design and test of a capacitor-isolated LED driver, suitable for screw-in, residential lighting applications, is reported. The design relies on a pair of high voltage isolation capacitors, comprising part of a series resonant tank. The series resonant tank is integrated with a balanced ladder step-down switched capacitor front-end, enabling the series resonant conversion stage to function conveniently with any line voltage, while still preserving the efficient voltage regulation capability of the resonant stage. Dimming and power control are effected with a low frequency PWM control loop. The tested prototype delivers 15.5 W at 425 mA at rated power into a string of 12 LEDs at 92% efficiency. Efficiency exceeding 85% is maintained over more than a 10:1 dimming range, and also over a wide range of line voltages.

A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS

Abstract: A low-power receiver circuit in 32 nm SOI CMOS is presented, which is intended to be used in a source-synchronous link configuration. The design of the receiver was optimized for power owing to the assumption that a link protocol enables a periodic calibration during which the circuit does not have to deliver valid data. In addition, it is shown that the transceiver power and the effect of high-frequency transmit jitter can be reduced by implementing a linear equalizer only on the receive side and avoiding a transmit feed-forward equalizer (TX-FFE). On the circuit level, the receiver uses a switched-capacitor (SC) approach for the implementation of an 8-tap decision-feedback equalizer (DFE). The SC-DFE improves the timing margin relative to previous DFE implementations with current feedback, and leads to a digital-style circuit implementation with compact layout. The receiver was measured at data rates up to 13.5 Gb/s, where error free operation was verified with a PRBS-31 sequence and a channel with 32 dB attenuation at Nyquist. With the clock generation circuits amortized over eight lanes, the receiver circuit consumes 2.6 mW/Gbps from a 1.1 V supply while running at 12.5 Gb/s.

Detection circuit, physical quantity detection apparatus, angular velocity detection apparatus, integrated circuit device, and electronic instrument

Abstract: A detection circuit includes a synchronous detection circuit (synchronous detection section) that synchronously detects a signal that includes a detection signal of a vibrator (an output signal of an amplifier), a switched capacitor filter (SCF) circuit that filters a signal that has been synchronously detected by the synchronous detection circuit (an output signal of a programmable gain amplifier), and an output buffer that buffers and outputs a signal that has been filtered by the SCF circuit, the gain of the SCF circuit being larger than 1.

A LED driver with switched capacitor

Abstract: The paper proposes a switched-capacitor converter fed at 24 V to drive power light emitting diodes (LEDs). In contrast to conventional constant dc current drivers, the current pulse is provided by this switched-capacitor. In the present driver, the capacitor is charged and discharged through the output and the current flow direction is controlled by switches. Based on the charge control analysis, the effects of switching devices on the proposed converter are discriminated and evaluated. A 5 W converter prototype has been implemented. The experimental results demonstrated the technical feasibility of the proposed converter for LEDs.

A note on resistive models of switched-capacitor DC-DC converters: Unified incremental-graph-based formulas given

Abstract: In this note we briefly reviewed literature on DC models focusing on losses associated with parasitic capacitor and switch resistances in switched-capacitor converters. We give topological formulas for equivalent output resistances in limit modes of operation. Next we propose an improved metric on output resistance in intermediate SSL-FSL mode, in the Minkowski distance form. Unified formulas have been derived with the use of the method of Incremental Graph. Illustrative numerical examples and PSPICE measurements are given.