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Switched capacitor

About: Switched capacitor is a research topic. Over the lifetime, 8832 publications have been published within this topic receiving 115142 citations.


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Book
10 Feb 2010
TL;DR: Fractional Order Systems Fractional order PID Controller Chaotic fractional order systems Field Programmable Gate Array, Microcontroller and Field Pmable Analog Array Implementation Switched Capacitor and Integrated Circuit Design Modeling of Ionic Polymeric Metal Composite as discussed by the authors.
Abstract: Fractional Order Systems Fractional Order PID Controller Chaotic Fractional Order Systems Field Programmable Gate Array, Microcontroller and Field Programmable Analog Array Implementation Switched Capacitor and Integrated Circuit Design Modeling of Ionic Polymeric Metal Composite

713 citations

Patent
Takao Myono1
16 Sep 2002
TL;DR: In this paper, a three-stage switched capacitor DC-DC converter capable of generating an output boosted voltage in increments of less than power supply voltage is described, where the two capacitors are connected in series when charging by turning one of the switches ON, and are connected parallel when discharging by turning the other two switches ON.
Abstract: A three-stage switched capacitor DC-DC converter capable of generating an output boosted voltage in increments of less than power supply voltage. A first stage of the DC-DC converter comprises two capacitors and three switches, which alternate a connection of the two capacitors. The two capacitors are connected in series when charging by turning one of the switches ON, and are connected in parallel when discharging by turning the other two of the switches ON.

642 citations

Journal ArticleDOI
TL;DR: This paper describes a 10 b, 20 Msample/s pipeline A/D converter implemented in 1.2 /spl mu/m CMOS technology which achieves a power dissipation of 35 mW at full speed operation.
Abstract: This paper describes a 10 b, 20 Msample/s pipeline A/D converter implemented in 1.2 /spl mu/m CMOS technology which achieves a power dissipation of 35 mW at full speed operation. Circuit techniques used to achieve this level of power dissipation include digital correction to allow the use of dynamic comparators, and optimum scaling of capacitor values through the pipeline. Also, to be compatible with low voltage mixed-signal system environments, a switched capacitor (SC) circuit in each pipeline stage is implemented and operated at 3.3 V with a new high-speed, low-voltage operational amplifier and charge pump circuits. Measured performance includes 0.6 LSB of INL, 59.1 dB of SNDR (Signal-to-Noise-plus-Distortion-Ratio) for 100 kHz input at 20 Msample/s. At Nyquist sampling (10 MHz input) SNDR is 55.0 dB. Differential input range is /spl plusmn/1 V, and measured input referred RMS noise is 220 /spl mu/V. The power dissipation at 1 MS/s is below 3 mW with 58 dB of SNDR. >

623 citations

Proceedings Article
01 Jan 1995
TL;DR: In this article, the authors describe a 10 b, 20 µm pipeline A/D converter implemented in 1.2 μm CMOS technology which achieves a power dissipation of 35 mW at full speed operation.
Abstract: ―This paper describes a 10 b, 20 Msample/s pipeline A/D converter implemented in 1.2 μm CMOS technology which achieves a power dissipation of 35 mW at full speed operation. Circuit techniques used to achieve this level of power dissipation include digital correction to allow the use of dynamic comparators, and optimum scaling of capacitor values through the pipeline. Also, to be compatible with low voltage mixed-signal system environments, a switched capacitor (SC) circuit in each pipeline stage is implemented and operated at 3.3 V with a new high-speed, low-voltage operational amplifier and charge pump circuits. Measured performance includes 0.6 LSB of INL, 59.1 dB of SNDR (Signal-to-Noise-plus-Distortion-Ratio) for 100 kHz input at 20 Msample/s. At Nyquist sampling (10 MHz input), SNDR is 55.0 dB. Differential input range is ± 1 V, and measured input referred RMS noise is 220 μV. The power dissipation at 1 MS/s is below 3 mW with 58 dB of SNDR.

577 citations

Proceedings ArticleDOI
23 Feb 1997
TL;DR: A clocked switched-capacitor circuit can exchange charge between adjacent batteries in a series string, without regard to component values, battery technology, or state of charge as mentioned in this paper.
Abstract: A clocked switched-capacitor circuit can exchange charge between adjacent batteries in a series string. This exchange drives all batteries to identical voltages, without regard to component values, battery technology, or state of charge. This equalization process can proceed while the batteries are in use or under charge, or separately. Transformer-based and transformerless implementations are given, and results of experimental tests are provided. The process is much faster and less stressful than the conventional approach, and is simpler than some active approaches.

480 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023118
2022333
2021342
2020452
2019443
2018439