Showing papers on "Systems architecture published in 1985"

Design and implementation of the Wisconsin storage system

Abstract: We describe the implementation of a flexible data storage system for the UNIX environment that has been designed as an experimental vehicle for building database management systems. The storage component forms a foundation upon which a variety of database systems can be constructed including support for unconventional types of data. We describe the system architecture, the design decisions incorporated within its implementation, our experiences in developing this large piece of software, and the applications that have been built on top of it.

Information management for engineering design

Abstract: 1 Computer-Aided Design Tools and Systems.- 1.1 What is Design?.- 1.2 What is Computer-Aided Design?.- 1.3 Computer-Aided Design Tools.- 1.3.1 Synthesis Tools.- 1.3.2 Analysis Tools.- 1.3.3 Information Management Tools.- 1.4 The Design of Complex Artifacts.- 1.5 Failure of Current CAD Systems.- 1.6 Structure of the Book.- 2 Survey of Engineering Design Applications.- 2.1 Introduction.- 2.2 Basic Terms.- 2.3 Kinds of Engineering Design Applications.- 2.3.1 VLSI Design Environment.- 2.3.1.1 Multidisciplinary Design: Architecture, Logic, Layout.- 2.3.1.2 Design Methodologies: Hierarchical Approach.- 2.3.1.3 The Computing Environment for Design: Dispersed Computation.- 2.3.2 Software Engineering Environment.- 2.3.2.1 Multiple Representations: Source, Object, Runable Code.- 2.3.2.2 Design Methodology: Modular Programming.- 2.3.2.3 Configurations and Engineering Changes.- 2.3.3 Architectural/Building Design Environment.- 2.3.3.1 Pipe Design System: Sequential Execution of Applications Programs.- 2.3.3.2 Multidisciplinary Design: Piping and Structures.- 2.4 Requirements for Engineering Data Management.- 2.5 Why Commercial Databases are NOT like Design Databases.- 2.6 Previous Approaches for Design Data Management.- 3 Design Data Structure.- 3.1 Example: The Representation Types of a VLSI Circuit Design.- 3.2 Design Data Models.- 3.2.1 Relations (The VDD System).- 3.2.2 A Design Data Manager (SQUID).- 3.2.3 Complex Objects (System-R).- 3.2.4 Abstract Data Types (Stonebraker).- 3.2.5 Semantic Data Model (McLeod's Event Model).- 3.3 Summary.- 4 The Object Model.- 4.1 Introduction.- 4.2 What are Design Objects?.- 4.3 Interfaces: How to Use a Cell Without the Details?.- 4.4 Composition and Interface.- 4.5 Complete Example of Object Specification.- 4.6 Objects Implemented as Structured Files.- 5 Design Transaction Management.- 5.1 Introduction.- 5.2 Design Computing Environment: Implications for Data Management.- 5.3 Conventional Transactions in the Design Environment.- 5.4 Concurrency Control Issues.- 5.5 Recovery Issues.- 5.6 Design Transaction Model.- 5.7 Extensions to the Transaction Model.- 5.8 Related Work.- 6 Design Management System Architecture.- 6.1 Introduction.- 6.2 System Architecture.- 6.2.1 Storage Component.- 6.2.2 Object System.- 6.2.3 Design Librarian.- 6.2.4 Recovery Subsystem.- 6.2.5 Validation Subsystem.- 6.2.6 In-Memory Databases.- 6.2.6.1 Introduction.- 6.2.6.2 Building In-Memory Structures: Complex Object Mapping.- 6.2.6.3 In-Memory Recovery.- 6.2.7 Version and Configuration Management.- 6.2.7.1 Introduction.- 6.2.7.2 Design Administration.- 6.2.8 Design Applications.- 6.2.8.1 Design Browser / Chip Assembler.- 7 Conclusions.- 7.1 Research Directions.- 7.2 Summary.- 8 Annotated Bibliography.

Redefining the role of computers in architecture: from drafting/modelling tools to knowledge-based design assistants

Abstract: The use of computers for automating the processes of design and manufacture promised significant improvements in designer's productivity and products' quality, neither of which, so far, have been realized in architectural design. This paper argues that in order to realize such improvements the modelling/drafting role computers have been assigned in architectural design should be changed, so that computers will become intelligent assistants to designers, relieving them from the need to perform the more trivial design tasks and augmenting their decision making capabilities. To support this argument, architectural design is modelled as a search process in a space of alternative solutions, seeking one or more solutions that satisfy certain design criteria. Design is shown to be a special case of general problem-solving processes, and thus comprised of two major components: design states and the generator/test cycle that facilitates transitions between them. It is then shown that the symbolic representation capabilities of computers qualify them to simulate such design states and the generate/test cycle, using techniques that were developed independently in the fields of geometric modelling and artificial intelligence. A conceptual framework of a knowledge-based computer-aided design system, which brings these techniques to bear on architectural problems, is presented, and its potential for increasing the utility of computers in the design of buildings is discussed.

Optical-logic-array processor using shadowgrams. III: Parallel neighborhood operations and an architecture of an optical digital-computing system

Abstract: A novel method of optically implementing parallel neighborhood operations for two-dimensional discrete binary objects is presented. The operations are executed by the optical-array-logic processor (OLAP) based on techniques of imaging coding and optical correlation. The analogy between the mechanism of the OLAP and that of the array logic is efficiently utilized for the method. Any neighborhood operation is easily executed by the OLAP with the help of the concept of array logic. An architecture of an optical parallel digital-computing system is also presented. The system consists of parallel-processing units using the OLAP’s, which execute neighborhood operations for image data in parallel. This proposed system is expected to be a prototype of optical digital-computing systems.

Precise manipulation with endpoint sensing

Abstract: This paper describes recent work on manipulation strategies that rely on “coarse-fine” robot hardware and direct sensing of part-workpiece relationships. The experiments reported use an extremely precise, high-bandwidth planar “wrist” and an industrial vision system to perform accurate alignment of small parts. The system architecture, experimental hardware, and programming methods employed are all discussed.

An architecture for control and communications in distributed artificial intelligence systems

Abstract: An architecture and implementation for a distributed artificial intelligence (DAI) system are presented, with emphasis given to the control and communication aspects. Problem solving by this system occurs as an iterative refinement of several mechanisms, including problem decomposition, kernel-subproblem solving, and result synthesis. In order for all related nodes to make optimum use of the information obtained from these problem-solving mechanisms, the system dynamically reconfigures itself, thereby improving its performance during operation. This approach offers the possibilities of increased real-time response, improved reliability and flexibility, and lower processing costs. A major component in the node architecture is a database of metaknowledge about the expertise of a node's own expert systems and those of the other processing nodes. This information is gradually accumulated during problem solving. Each node also has a dynamic-planning ability, which guides the problem-solving process in the most promising direction and a focus-control mechanism, which restricts the size of the explored solution space at the task level while reducing the communication bandwidths required. It also has a question-and-answer mechanism, which handles internode communications. Examples in the domain of digital-logic design are given to demonstrate the operation of the system.

All-optical computation: a design for tackling a specific physical problem

Abstract: The recent rise in interest in optical computation has been accompanied by a number of sophisticated proposals for optical processing elements and a number of relatively abstract conceptual statements as to what the optical computer architecture of the future might look like. By setting up a particular (elementary) physical problem and keeping within the practical restrictions set by existing optically bistable and nonlinear elements a design for an all-optical computational device is presented. Architectural considerations lead to such problems as optical storage or beam delay, computational loop operation, optical parallel processing, and all-optical clocking. Example solutions to each of these problems are given and a proposed architecture for a demonstration optical computational device is thereby built up.

The Intel 80386 - Architecture And Implementation

Abstract: T he Intel 80386 represents the state of the art in high-performance, 32-bit microprocessors. It features absolute object code compatibility with previous members of the iAPX 86 family of microprocessors, including the 80286, 80186, 80188, 8086, and 8088. This protects major investments in application and operating systems software developed for the iAPX 86 family, while offering a significant enhancement in performance. The 80386's architecture and performance should allow it to be used in a wide range of demanding applications-e.g., in engineering workstations, office systems, robotic and control systems, and expert systems. The 80386 implements a full 32-bit architecture with a 32-bit-wide internal data path including registers, ALU, and internal buses; it provides 32-bit instructions, addressing capability, and data types, and a 32-bit external bus interface. It extends the iAPX 86 family architecture with additional instructions, addressing modes, and data types. It incorporates a complete memory management unit. The 80386 extends the 80286 segmentation model to support four-gigabyte segments and to provide a standard two-level paging mechanism for physical memory management. System designers can use segmentation or paging or both, without performance penalties, to meet their memory management requirements. The 80386 architecture is complemented by a bus interface that uses only two clocks per bus cycle; this allows efficient interfacing to high-speed as well as low-speed memory systems. At 16 MHz, the bus can sustain a 32-megabyte-per-second transfer rate. Other bus features include dynamic bus sizing to support mixed 16/32-bit port interfacing and a dynamically selectable pipelined mode to facilitate high-speed memory interleaving and allow longer access times. The 80386 is implemented in Intel's CHMOS-III 1.5-micrometer process. Typical instruction mixes indicate an average processing rate of 4.4 clocks per instruction and an overall execution rate of three to four MIPS. To facilitate system debugging, the chip incorporates hardware debug features and selftesting.

System architecture for partition-tolerant distributed databases

Abstract: An overview is presented of an approach to distributed database design which emphasizes high availability in the face of network partitions and other communication failures. This approach is appropriate for applications which require continued operation and can tolerate some loss of integrity of the data. Each site presents its users and application programs with the best possible view of the data which it can, based on those updates which it has received so far. Mutual consistency of replicated copies of data is ensured by using time stamps to establish a known total ordering on all updates issued, and by a mechanism which ensures the same final result regardless of the order in which a site actually receives these updates. A mechanism is proposed, based on alerters and triggers, by which applications can deal with exception conditions which may arise as a consequence of the high-availability architecture. A prototype system which demonstrates this approach is near completion.

The 5ESS switching system: Architectural overview

Abstract: This paper presents an overview of the 5ESS™ system architecture. The administrative, communications, and switching modules are described, together with an overall view of the software architecture. Operations and maintenance aspects and a short discussion of evolutionary trends are covered.

XMS: A Rendezvous-Based Distributed System Software Architecture

Abstract: XMS creates a single, powerful system from loosely coupled microcomputers. Programs work together across nodes, making systemwide resource management transparent and distributed-system design simpler.

A Real-Time Tofpet Slice-Backproject Engine Employing Dual Am29116 Microprocessors

Abstract: Tomographic backprojection for both conventional and TOF PET systems is data intensive, and without special hardware can require an unacceptable amount of time. We have designed, constructed, and are using a prototype slice-backproject engine that has improved our throughput by a factor of 30. The design is centered about two microprogramable 16-bit processors and a 16 × 16 combinational multiplier with an instruction rate of 150 to 200 nsec. This paper describes the engine architecture as it relates to the backproject algorithm, as well as design features that enable its use as a general processor. The use of two processing elements permits shared and concurrent operations to be performed at the microcode level. Finally, the engine is reviewed in the context of a system architecture employing multiple engines to backproject several slices in parallel.

The Sage System Architecture: A System for the Rapid Development of Graphics Interfaces for Decision Support

Abstract: Easily defined and modified icons are the building blocks of a flexible system designed to support sensitivity analysis.

An associative hierarchical self-organizing system

Abstract: A system that learns to predict events in various environments is described. The system is associative and distributed; a hierarchical self-organization of low-level units into high-level units takes place based on experience in a particular domain. Its design is inspired by widely held principles of brain organization and by some newly developed techniques in nonparametric statistical inference. The system can be regarded as a realization of a nonparametric statistical algorithm. This is demonstrated by a discussion of system architecture and a presentation of an application in a `number theory' environment.

New Trends in Graphic Display System Architecture

Abstract: This paper discusses a 4th generation graphics computing and display system. It defines the following as components of 4th generation graphics architecture: a combination of pipelined parallel coprocessors, custom VLSIs for vector drawing, bit slice and mathematics chips for geometry processing, a 32-bit VMEbus structure, and a new display list data structure. The paper shows how these components and modular architecture add high performance-to-cost effectiveness of raster-scan graphics display systems.

VME nodal architecture: a model for the realisation of a distributed system concept

Abstract: Description de facon informelle de generalisations qui ont ete faites au modele d'architecture VME pour permettre la construction d'environnements, de traitements repartis flexibles

The Harris 20-20 Integrated Network Switch

Abstract: This paper describes the system architecture of the Harris 20-20, an integrated voice/data network switch. Both hardware and software aspects of the system are presented. The hardware buses and all major assemblies are identified and described. The architecture is innovative in that the system accommodates both North American and European standard multiplex equipment. The software design permits the subsystems to all run on a single microprocessor or to be distributed over multiple processors with no change to the application-level software.

A dialog-based architecture for interactive information systems

Abstract: Interactive systems may be defined as having the following behavior: a) the user's request is processed as soon as it is received and b) the result is presented to the user on the same medium, i.e. the screen, as soon as it is available. Interactive Information Systems (IIS), identify those systems often encountered in the business world, which consist of many input-output operations and little, simple processing.In the past few years, interest for IIS has been growing (see JAC 83, MAS83, DRA84): the man-machine interface has received special attention, due to the profile of the user who is not a computer specialist. Very few attempts however, have been made to design an architecture for this class of systems, although their characteristics have definite general design consequences.In this article, we will start by investigating the characteristics of IIS. A presentation of ISA (Interactive System Architecture) will follow, showing the main features of the proposed model. The discussion will then concentrate on the use of finite state machines and on the limitations of ISA.

Architectural support for variable addressing in Ada— A design approach

Abstract: In designing a language-directed machine architecture, the choice of the technique used in interpreting machine instructions has considerable influence on machine performance. Yet, there does not appear to exist any well established design method for choosing an interpretive mechanism; or for determining the hardware/firmware support for an efficient implementation of such a mechanism. The purpose of this paper is to propose such a design method, based on the use of an architecture description language. The specific architectural focus of the paper is the variable-addressing mechanism in Ada and the implications that such mechanisms have on the implementation of procedure CALL/RETURN and block ENTRY/EXIT functions. The analysis presented in this paper clearly establishes that either Dijkstra's mechanism or “local display method” is not suitable for adoption in designing architectural support for variable-addressing in Ada.

Simulation of signal flow graphs for signal processing systems

Abstract: There are many interacting issues which must be investigated fully before a multiprocessor system for signal processing applications is integrated. Among the most important of these issues are the system architecture, system configuration, and the implementation technology. A methodology for the simulation of systems under which these issues can be examined independantly is presented and shown to be applicable to a variety of architectures. The methodology used is simple and can be a valuable system design tool. The usefulness of the approach is illustrated with an example.

An Approach to Determining Computer Security Requirements for Navy Systems

Abstract: : The DoD Trusted Computer System Evaluation Criteria (The Orange Book) define requirements corresponding to specified levels of security functions and assurance These do not (The Orange Book), however, help determine what level system is required for a specific environment It is at present left to the system is expected to be used This report proposes a straightforward technique a developer can use to map a specific system architecture and application environment to a particular requirement level as defined in the Criteria This technique is applicable throughout the system life cycle, so that security requirements can be updated as changes to system structure and function occur

Architecture, Design, and Development of the System 75 Office Communications System

Abstract: AT&T-IS System 75 is a new customer-premises digital communications system. It is designed to complement the larger AT&TIS System 85 in the intermediate size range of 20-400 stations and makes use of the same terminals and adjuncts. System 75 utilizes a distributed switching and control architecture and employs VLSI for a compact cost-effective realization. Integrated voice and data communications are supported with full voice conferencing capabilities and high-speed data switching. A process and message-based software architecture supports a large number of features and services, including a flexible user-oriented maintenance and administration capability, accessible from a local or remote system management terminal. This paper describes the system, the switch, common control, software architecture, system management capabilities, and product testing methods.

Cronus: A Testbed for Developing Distributed Systems

Abstract: Planners have recognized for some time the potential of distributed architectures for supporting the requirements of Command and Control (C2) systems. One area where distributed system technology is maturing is that of a distributed operating system (DOS). Cronus is a DOS that integrates interconnected heterogeneous computers. The DOS establishes a distributed architecture and facilitates the development and operation of application programs requiring the resources of multiple machines for reasons of functionality, interoperability, survivability, scalability, and performance. We are now in the early stages of an evaluation phase where we are applying the Cronus system concepts and support base to prototype C2 applications. The intent is to use specific application scenarios to demonstrate the utility of distributed system technology for a variety of C2 problems. In this paper we provide an overview of the Cronus system architecture, discuss the emerging C2 experiment, and describe our current testbed configuration.

A testbed for information retrieval research: the Utah retrieval system architecture

Abstract: The Utah Retrieval System Architecture provides an excellent testbed for the development and testing of new algorithms or techniques for information retrieval. URSA™ is a message-based structure capable of running on a variety of system configurations, ranging from a single mainframe processor to a system distributed across a number of dissimilar processors. It can readily support a variety of specialized backend processors, such as high-speed search engines.The architecture divides the components of a text retrieval system into two classes: servers and clients. A triple of servers (index, search, and document access) for each database provide the capabilities normally associated with a retrieval system. Possible clients for these servers include a window-based user interface, whose query language can be easily modified, a connection to a mainframe host processor, or Al-based query modification programs that wish to use the database.Any module in the system can be replaced by a new module using a different algorithm as long as the new module complies with the message formats for that function. In fact, with some care this module switch can occur while the system is running, without affecting the users. A monitor program collects statistics on all system messages, giving information regarding query complexity, processing time for each module, queueing times, and bandwidths between every module.This paper discusses the background of URSA and its structure, with particular emphasis on the features that make it a good testbed for information retrieval techniques.