Systems architecture

About: Systems architecture is a research topic. Over the lifetime, 17612 publications have been published within this topic receiving 283719 citations. The topic is also known as: system architecture.

Towards transparent and efficient software distributed shared memory

Abstract: Despite a large research effort, software distributed shared memory systems have not been widely used to run parallel applications across clusters of computers. The higher performance of hardware multiprocessors makes them the preferred platform for developing and executing applications. In addition, most applications are distributed only in binary format for a handful of popular hardware systems. Due to their limited functionality, software systems cannot directly execute the applications developed for hardware platforms. We have developed a system called Shasta that attempts to address the issues of efficiency and transparency that have hindered wider acceptance of software systems. Shasta is a distributed shared memory system that supports coherence at a fine granularity in software and can efficiently exploit small-scale SMP nodes by allowing processes on the same node to share data at hardware speeds. Thispaper focuses onourgoal oftappingintolarge classes of commercially available applications by transparently executing the same binaries that run on hardware platforms. We discuss the issues involved in achieving transparent execution of binaries, which include supportingthe full instruction set architecture, implementing an appropriate memory consistency model, and extending OS services across separate nodes. We also describe the techniques used in Shasta to solve the above problems. The Shasta system is fully functional on a prototype cluster of Alpha multiprocessors connected through Digital’s Memory Channel network and can transparentlyrunparallelapplicationsontheclusterthatwere compiled to run on a single shared-memory multiprocessor. As an example of Shasta’s flexibility, it can execute Oracle 7.3, a commercial database engine, across the cluster, includingworkloadsmodeled after theTPC-B and TPC-D database benchmarks. To characterize the performance of the system and the cost of providing complete transparency, we present performance results for microbenchmarks and applications runningon the cluster, include preliminary results for Oracle runs.

Intelligent mechatronic components: control system engineering using an open distributed architecture

Abstract: This paper reports the results of case study on application of open distributed software architecture IEC61499 to the organization of intelligence, embedded to smart mechatronic components. The presented approach targets the issues related to integration and reconfiguration of automation systems, where the software integration plays an important role. Based on the testbed studies, a classification of "intelligence classes" is suggested. Several integration and reconfiguration scenarios are illustrated.

A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems

Abstract: Recent research in nanotechnology has led to the practical realization of nanoscale devices that behave as memristors, a device that was postulated in the seventies by Chua based on circuit theoretical reasonings. On the other hand, neuromorphic engineering, a discipline that implements physical artifacts based on neuroscience knowledge, has related neural learning mechanisms to the operation of memristors. As a result, neuro-inspired learning architectures can be proposed that exploit nanoscale memristors for building very large scale systems with very dense synaptic-like memory elements. At present, the deep understanding of the internal mechanisms governing memristor operation is still an open issue, and the practical realization of very large scale and reliable ?memristive fabric? for neural learning applications is not a reality yet. However, in the meantime, researchers are proposing and analyzing potential circuit architectures that would combine a standard CMOS substrate with a memristive nanoscale fabric on top to realize hybrid memristor-CMOS neural learning systems. The focus of this paper is on one such architecture for implementing the very well established Spike-Timing-Dependent-Plasticity (STDP) learning mechanism found in biology. In this paper we quickly review spiking neural systems, STDP learning, and memristors, and propose a hybrid memristor-CMOS system architecture with the potential of implementing a large scale STDP learning spiking neural system. Such architecture would eventually allow to implement real-time brain-like processing learning systems with about neurons and synapses on one single Printed Circuit Board (PCB).

Cellular access control and charging for mobile operator wireless local area networks

Abstract: This article presents a system architecture, design considerations, and rationale for a mobile operator wireless LAN. The article also discusses the system implementation and performance issues. The system presented reuses GSM and GPRS mechanisms for user authentication, access control, subscriber management, operator roaming, and billing, while still being compatible with wireless Internet service provider networks and IETF and IEEE protocols such as RADIUS, EAP, and IEEE 802.1x. The architecture is a result of research carried out by Nokia between 1999 and 2002. The designed architecture has also been verified in a complete system implementation.