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Systems architecture

About: Systems architecture is a research topic. Over the lifetime, 17612 publications have been published within this topic receiving 283719 citations. The topic is also known as: system architecture.


Papers
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Journal ArticleDOI
TL;DR: A novel architecture for a fault-tolerant multiprocessor environment that achieves performance of a triple modular redundant system using duplex system redundancy and requires no rollbacks for recovering from single faults is proposed.
Abstract: We propose a novel architecture for a fault-tolerant multiprocessor environment. It is assumed that the multiprocessor organization consists of a pool of active processing modules and either a small number of spare modules or active modules with some spare processing capacity. A fault-tolerance scheme is developed for duplex systems using checkpoints. Our scheme, unlike traditional checkpointing schemes, requires no rollbacks for recovering from single faults. The objective is to achieve performance of a triple modular redundant system using duplex system redundancy. >

113 citations

Proceedings ArticleDOI
16 Apr 1998
TL;DR: This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploit instruction-level parallelism and shows that the analytical model can be used to gain insights into application performance and to evaluate architectural design trade-offs.
Abstract: This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploit instruction-level parallelism. Compared to simulation, the analytical model is many orders of magnitude faster to solve, yielding highly accurate system performance estimates in seconds.The model input parameters characterize the ability of an application to exploit instruction-level parallelism as well as the interaction between the application and the memory system architecture. A trace-driven simulation methodology is developed that allows these parameters to be generated over 100 times faster than with a detailed execution-driven simulator.Finally, this paper shows that the analytical model can be used to gain insights into application performance and to evaluate architectural design trade-offs.

113 citations

Journal ArticleDOI
TL;DR: The authors describe the design of a secure database system, LDV (Lock Data Views), that builds upon the classical security policies for operating systems and solutions to the inference and aggregation problems are described.
Abstract: The authors describe the design of a secure database system,LDV (Lock Data Views), that builds upon the classical security policies for operating systems. LDV is hosted on the LOgical Coprocessing Kernel (LOCK) Trusted Computing Base (TCB). LDVs security policy builds on the security policy of LOCK. Its design is based on three assured pipelines for the query, update, and metadata management operations. The authors describe the security policy of LDV, its system architecture, the designs of the query processor, the update processor, the metadata manager, and the operating system issues. LDVs solutions to the inference and aggregation problems are also described. >

112 citations

Patent
23 Mar 2001
TL;DR: In this paper, the authors propose a fault tolerant system by which individual components of a server are monitored and controlled through independent, programmable microcontrollers interconnected through a microcontroller network.
Abstract: A fault tolerant system by which individual components of a server are monitored and controlled through independent, programmable microcontrollers interconnected through a microcontroller network. An external agent can control and monitor the microcontrollers by extending the interconnection network beyond the physical server. The extension to the interconnection network converts protocols between media, and directs the microcontrollers and the state managed by the microcontrollers. Intervention of the server operating system software is not required and is not utilized for the access and control operations. A remote interface board provides the interface between the microcontroller network and an external modem that communicates with a remote client computer. The remote interface board also provides for connection to a local client computer.

112 citations

Journal ArticleDOI
TL;DR: The architecture relies on innovative data striping and real-time scheduling to allow a large number of guaranteed concurrent accesses, and uses separation of metadata from real data to achieve a direct flow of the media streams between the storage devices and the network.
Abstract: Large scale multimedia storage servers will be an integral part of the emerging distributed multimedia computing infrastructure. However, given the modest rate of improvements in storage transfer rates, designing servers that meet the demands of multimedia applications is a challenging task that needs significant architectural innovation. Our research project, called Massively-parallel And Real-time Storage ( mars ) architecture, is aimed at the design and prototype implementation of a large scale multimedia storage server. It uses some of the well-known techniques in parallel I/O, such as data striping and Redundant Arrays of Inexpensive Disks ( raid ) and an innovative atm based interconnect inside the server to achieve a scalable architecture that transparently connects storage devices to an atm -based broadband network. The atm interconnect within the server uses a custom asic called ATM Port Interconnect Controller ( apic ) currently being developed as a part of an arpa sponsored gigabit local atm testbed. Our architecture relies on innovative data striping and real-time scheduling to allow a large number of guaranteed concurrent accesses, and uses separation of metadata from real data to achieve a direct flow of the media streams between the storage devices and the network. This paper presents our system architecture; one that is scalable in terms of the number of supported users and the throughput.

112 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202311
202227
2021405
2020555
2019638
2018572