About: Tantalum capacitor is a(n) research topic. Over the lifetime, 2432 publication(s) have been published within this topic receiving 26709 citation(s).
Papers published on a yearly basis
TL;DR: In this article, conformal mapping-based models for interdigital capacitors on substrates with a thin superstrate and/or covering dielectric film are given for ICs with finger numbers n/spl ges/2.
Abstract: Conformal mapping-based models are given for interdigital capacitors on substrates with a thin superstrate and/or covering dielectric film. The models are useful for a wide range of dielectric constants and layer thicknesses. Capacitors with finger numbers n/spl ges/2 are discussed. The finger widths and spacing between them may be different. The results are compared with the available data and some examples are given to demonstrate the potential of the models.
TL;DR: In this paper, a hybrid capacitor in neutral KCl aqueous electrolyte, which consists of amorphous manganese oxide (a-MnO 2.nH 2 O) as a cathode and activated carbon as an anode, was reported.
Abstract: This study reports a hybrid capacitor in neutral KCI aqueous electrolyte, which consists of amorphous manganese oxide (a-MnO 2 .nH 2 O) as a cathode and activated carbon as an anode. The electrochemical performance of the hybrid capacitor is characterized by cyclic voltammetry and a dc charge/discharge test. The hybrid capacitor shows ideal capacitor behavior with an extended operating voltage of 2 V. The extended operating voltage is preferentially attributed to having asymmetric electrodes with different stable voltage windows and good electrochemical stability in neutral KCl aqueous electrolyte. According to the extended operating voltage, the energy density of the hybrid capacitor at a current density of 0.25 A/g, was found to be 28.8 Wh/kg which is comparable to that of an amorphous ruthenium oxide capacitor (26.7 Wh/kg). The hybrid capacitor also shows no degradation of capacitance during 100 cycles except an initial loss of 7% within a few cycles.
•12 Feb 1993
TL;DR: In this paper, conducting or insulating spacers are formed on the sidewalls of the barrier layer and lower electrode to completely fill a space between adjacent capacitors and to provide a completely planar surface.
Abstract: A high storage capacity capacitor for a semiconductor structure includes a barrier layer formed on a polysilicon electrode, a lower electrode, a dielectric layer, and an upper electrode. The dielectric material is formed of a high dielectric constant material such as BaSrTiO 3 . In order to protect the barrier layer from oxidation during deposition of the dielectric layer and to provide a smooth surface geometry for depositing the dielectric layer, conducting or insulating spacers are formed on the sidewalls of the barrier layer and lower electrode. A smooth dielectric layer can thus be formed that is less susceptible to current leakage. In addition, the insulating spacers can be formed to completely fill a space between adjacent capacitors and to provide a completely planar surface.
•10 Oct 1996
TL;DR: In this article, a method for fabricating a flexible interconnect film includes applying a resistor layer over one or both surfaces of a dielectric film, applying a metallization layer over the resistor layer with the resistor layers including a material facilitating adhesion of the dielectrics film and the metallisation layer, and applying a capacitance layer over a capacitor electrode layer.
Abstract: A method for fabricating a flexible interconnect film includes applying a resistor layer over one or both surfaces of a dielectric film; applying a metallization layer over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallization layer; applying a capacitor dielectric layer over the metallization layer; and applying a capacitor electrode layer over the capacitor dielectric layer. The capacitor electrode layer is patterned to form a first capacitor electrode; the capacitor dielectric layer is patterned; the metallization layer is patterned to form a resistor; and the metallization layer and the resistor layer are patterned to form an inductor and a second capacitor electrode. In one embodiment, the dielectric film includes a polyimide, the resistor layer includes tantalum nitride, and the capacitor dielectric layer includes amorphous hydrogenated carbon or tantalum oxide. If the resistor and metallization layers are applied over both surfaces of the dielectric film, passive components can be fabricated on both surfaces of the dielectric film. The dielectric film can have vias therein with the resistor and metallization layers extending through the vias. A circuit chip can be attached and coupled to the passive components by metallization patterned through vias in an additional dielectric layer.
05 Oct 2004
TL;DR: In this paper, a method of preparing electrolytic capacitors that involves forming the conductive polymer of the solid electrolyte layer in situ by means of chemical oxidative polymerization or electrochemical polymerization is described.
Abstract: Electrolytic capacitors having low equivalent series resistance and low leakage current are described. The electrolytic capacitors include a solid electrolyte layer of a conductive material in particular a conductive polymer, and an outer layer that includes binders, polymeric anions and conductive polymers (e.g., polythiophenes). Also described is a method of preparing electrolytic capacitors that involves forming the conductive polymer of the solid electrolyte layer in situ by means of chemical oxidative polymerization or electrochemical polymerization. Electronic circuits that include the electrolytic capacitors are also described.
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