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Showing papers on "Tantalum capacitor published in 2014"


Journal ArticleDOI
TL;DR: In this article, the status of polymer dielectric film development and its feasibility for capacitor applications was highlighted. And the PEI film was found to be the preferred choice for high-temperature film capacitor development due to its thermal stability, dielectrics properties, and scalability.
Abstract: Film capacitor technology has been under development for over half a century to meet various applications such as direct-current link capacitors for transportation, converters/inverters for power electronics, controls for deep well drilling of oil and gas, direct energy weapons for military use, and high-frequency coupling circuitry. The biaxially oriented polypropylene film capacitor remains the state-of-the-art technology; however, it is not able to meet increasing demand for high-temperature (>125°C) applications. A number of dielectric materials capable of operating at high temperatures (>140°C) have attracted investigation, and their modifications are being pursued to achieve higher volumetric efficiency as well. This paper highlights the status of polymer dielectric film development and its feasibility for capacitor applications. High-temperature polymers such as polyetherimide (PEI), polyimide, and polyetheretherketone were the focus of our studies. PEI film was found to be the preferred choice for high-temperature film capacitor development due to its thermal stability, dielectric properties, and scalability.

167 citations


Journal ArticleDOI
TL;DR: The process for recovering tantalum used more heat for the treatment and therefore the energy consumption increased by 50%, when comparing with conventional process, however, the market price for tantalum is very large; the profit for tantalUM recovery is added.

63 citations


Journal ArticleDOI
TL;DR: In this paper, a detailed review of PP dielectric properties improvements is presented, focusing on permittivity, breakdown strength, thermal withstandability, and thermal conductivity of PP capacitors.
Abstract: Polypropylene (PP) film has been used in capacitors since 1970s. The high breakdown strength, low dielectric losses, and high availability make PP well suitable for use as capacitor dielectric. At the moment, the typical energy density achieved with PP film at room temperature is about 1.2 J/cm3. Recent research on PP films focus on improving the permittivity, breakdown strength, thermal withstandability, and thermal conductivity, by producing copolymers, blending with other polymers, or adding inorganic particles. Some results claim energy density higher than double that of commercial bi-axially oriented PP capacitor film. Detailed research approaches and dielectric properties improvements are reviewed in this paper. The major focus is often placed on permittivity and breakdown strength. Unfortunately, little research shows positive results for maintaining the low dielectric losses.

59 citations


Journal ArticleDOI
TL;DR: In this article, an ionic liquid was applied to recover tantalum capacitors from scrap printed circuit boards and the tantalum anode was mechanically separated and suitable for further metallurgical processing.
Abstract: Ionic liquids can be applied to recover tantalum capacitors from scrap printed circuit boards. Dissolution experiments with epoxy covered through-hole tantalum capacitors in Lewis acidic mixtures of dialkylimidazolium halides and aluminum trichloride show that all parts, except the tantalum anode, are dissolved in the ionic liquid. This comprises MnO2 from the capacitor's electrolyte as well as tin and silver from the metallic contacts. The latter ones can be directly recovered from the solution by electrodeposition. The tantalum anode is mechanically separated and suitable for further metallurgical processing.

33 citations


Patent
Shih-Guo Shen1, Wei-Min Tseng1, Chien-Chung Wang1, Huey-Chi Chu1, Wen-Chuan Chiang1 
10 Apr 2014
TL;DR: In this paper, an integrated chip having a MIM (metal-insulator-metal) capacitor and an associated method of formation is described, where a plurality of vias vertically extend through the capacitor ILD layer and the MIM capacitor.
Abstract: The present disclosure relates to an integrated chip having a MIM (metal-insulator-metal) capacitor and an associated method of formation. In some embodiments, the integrated chip has a MIM capacitor disposed within a capacitor inter-level dielectric (ILD) layer. An under-metal layer is disposed below the capacitor ILD layer and includes one or more metal structures located under the MIM capacitor. A plurality of vias vertically extend through the capacitor ILD layer and the MIM capacitor. The plurality of vias provide for an electrical connection to the MIM capacitor and to the under-metal layer. By using the plurality of vias to provide for vertical connections to the MIM capacitor and to the under-metal layer, the integrated chip does not use vias that are specifically designated for the MIM capacitor, thereby decreasing the complexity of the integrated chip fabrication.

29 citations


Proceedings ArticleDOI
19 May 2014
TL;DR: In this article, the authors explored factors influencing the lifetime of electrolytic capacitors and calculated the capacitance's life time in dedicated application, and compared the performance of different types of capacitors in dedicated applications.
Abstract: This article explores factors influencing the lifetime of electrolytic capacitors. Calculation of capacitor's life time in dedicated application is also described in the article. Finally comparisons of the computed results between several types of electrolytic capacitors in dedicated application are provided.

29 citations


Journal ArticleDOI
TL;DR: In this article, steam gasification with sodium hydroxide was applied for recovery of tantalum sintered compact by destroying mold resin and stabilization of halogenated compounds in sodium hyroxide to prevent exhausting the gas.

28 citations


Patent
John H. Zhang1
30 Apr 2014
TL;DR: In this paper, an interconnect structure for coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors.
Abstract: An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells.

25 citations


Proceedings ArticleDOI
17 Apr 2014
TL;DR: In this article, the degradation process due to heat can be modeled by a modified Arrhenius Equation, and therefore it is an exponential curve, and the acceleration factor is calculated with a modified approximation formula and multiplied with base life to calculate the predicted life.
Abstract: Aluminum electrolytic capacitors are widely used as a filter or bulky capacitor after rectification stages of switching power supplies (SMPS). Fly-back, forward, and resonant converter topologies, which are widely used in consumer electronics products, computer power supplies, and various kind of adapters, require electrolytic capacitors (EL. CAP.) in primary stage and secondary stages for rectification to smooth non-DC current. Electrolytic capacitors must be used because of size and capacitance, unit price, and to withstand voltage. Overall reliability of an SMPS mainly depends on electrolytic capacitors used, because they have extremely short lifetime compared to other active and passive components. Failure modes of electrolytic capacitors are either catastrophic failures or degradation failures. Catastrophic failures generally occur because of fabrication processes. Degradation failures are seen during gradual aging of electrolytic capacitors. During degradation, electrochemical aging occurs between Al2O3 foils and electrolytic solvent, and this creates hydrogen gas inside cap. Degradation process also increases equivalent series resistance (ESR) and decreases capacitance. This degradation is mainly dependent on heat and is somewhat predictable, because main degradation agent is a heat-triggered accelerated electrochemical reaction. Previous works in the literature disclose the obvious fact that this degradation process due to heat can be modeled by a modified Arrhenius Equation, and therefore, it is an exponential curve [1][2]. All commercially available capacitors have their base rated life duration specified in their datasheets, given in hours, such as 1000 hrs, 2000 hrs, 5000 hrs, etc. Those values are measured according to the international standard IEC60384 (or Japanese equivalent JIS-C-5101) and are called “base life”. In an SMPS design, the real usage life of a capacitor is calculated based on the temperature that it is used at. The acceleration factor is calculated with a modified approximation formula and multiplied with base life to calculate the predicted life. Low grade capacitors cause many capacitor plague issues and products of different manufacturers show completely different lifetime performance even their specifications and base lifetime are the same. In this paper, low and medium-grade capacitors from three different manufacturers and high-grade capacitors from two different Japanese manufacturers are selected and tested at their maximum allowable temperature limits, allowable max voltage and ripple current. Total of 100 samples are used during tests from each different manufacturer. Degradation of each capacitor brand, required life and unit cost are evaluated, and a cost/life optimization has been formulized between low-grade capacitors and high-grade capacitors. In the literature, there are a number of notable works carried out on degradation analysis of electrolytic capacitors; however, there is no comparative analysis of low cost capacitors used in consumer devices. The derived novel method is a useful tool to choose electrolytic capacitors for consumer products that use high voltage (≤450 V) on the primary side and low voltage (≤65 V) on the secondary side of SMPS. This cost-benefit approximation for capacitor selection process gives good opportunity to design engineers to do the selection based on reliability and overall cost. Results show that the optimized capacitor is not the cheapest, most expensive, or most reliable one; optimal capacitor is a modest Chinese “CAP. B”. It is the most desirable solution that minimizes overall cost inside the warranty duration.

22 citations


Proceedings ArticleDOI
13 Nov 2014
TL;DR: The mathematical analysis and component selection of the active capacitor are presented and simulation and experimental results of a 200W prototype PFC converter are presented to verify the performance of the proposed active capacitor.
Abstract: In this paper, the active capacitor is proposed to replace the electrolytic capacitor of the power factor correction (PFC) converter. Conventionally, a bulky electrolytic capacitor is connected in parallel with the output stage of the PFC converter to reduce the output ripple voltage. However, the electrolytic capacitor would shorten the lifetime and reduce the reliability of the PFC converter. Thus, the active capacitor is proposed to reduce the required capacitance of the PFC converter so that the electrolytic capacitor can be replaced by the film capacitor. The mathematical analysis and component selection of the active capacitor are presented in this paper. Simulation and experimental results of a 200W prototype PFC converter are presented to verify the performance of the proposed active capacitor.

21 citations


Patent
Jian-Shiou Huang1, Yao-Wen Chang1, Hsing-Lien Lin1, Cheng-Yuan Tsai1, Chia-Shiung Tsai1 
27 Jun 2014
TL;DR: In this paper, an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure was described, which includes a lower metal capacitor, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal electrode from the upper metal electrode.
Abstract: Some embodiments of the present disclosure provide an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes a lower metal capacitor electrode, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal capacitor electrode from the upper metal capacitor electrode. The capacitor dielectric is made up of an amorphous oxide/nitride matrix and a plurality of metal or metal oxide/nitride nano-particles that are randomly distributed over the volume of amorphous oxide/nitride matrix.

Patent
Dev V. Gupta, Zhiguo Lai1
26 Feb 2014
TL;DR: In this paper, a highly linear, variable capacitor array (400) constructed from multiple cells (100-0, 100-1,... 100-N) is presented. Each cell includes a pair of passive, two-terminal capacitor components connected in antiparallel.
Abstract: A highly linear, variable capacitor array (400) constructed from multiple cells (100-0, 100_ 1,... 100_ N). Each cell includes a pair of passive, two-terminal capacitor components connected in antiparallel. The capacitor components may be Metal Oxide Semicondutor, MOS, capacitors. A control circuit (410) applies bias voltages (411_0, 411 1,... 411_ N) to bias voltage terminals associated with each capacitor component, to thereby control the overall capacitance of the array. The two capacitors in each cell are connected in anti-parallel to reduce the cell's and the array's voltage coefficient of capacitance. MOS capacitors are preferably operated in inversion or accumulation mode.

Patent
05 Jun 2014
TL;DR: In this article, a semiconductor device includes a first capacitor structure, a second capacitor structure and an insulation pattern, and an air gap is formed between the first and second capacitor structures on the insulation pattern.
Abstract: A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a first lower electrode, a first dielectric layer and a first upper electrode sequentially stacked on a substrate. The second capacitor structure includes a second lower electrode, a second dielectric layer and a second upper electrode sequentially stacked on the substrate, and is adjacent to the first capacitor structure. The insulation pattern partially fills a space between the first and second capacitor structures, and an air gap is formed between the first and second capacitor structures on the insulation pattern.

Patent
14 Mar 2014
TL;DR: In this paper, a wet electrolytic capacitor with an anode formed from an anodically oxidized sintered porous body and a fluidic working electrolyte is provided.
Abstract: A wet electrolytic capacitor that contains an anode formed from an anodically oxidized sintered porous body and a fluidic working electrolyte is provided. The casing contains a metal substrate coated an electrochemically-active material. Through a unique and controlled combination of features relating to the capacitor configuration and sealing assembly, the present inventor has discovered that good electrical properties (e.g., ESR stability) can be achieved at relatively high temperatures. One unique feature of the wet electrolytic capacitor that can help achieve such good ESR stability is the presence of a dielectric layer on the metal substrate of the cathode within a controlled thickness range. In other embodiments, a sealing assembly may be employed that contains a hermetic seal (e.g., glass-to-metal seal) and an elastomeric barrier seal formed from a high-temperature elastomeric material.

Patent
02 Oct 2014
TL;DR: In this paper, an integrated circuit includes isolation capacitors which include a silicon dioxide dielectric layer and a polymer layer over the layer of silicon dioxide, and these layers extend across the integrated circuit.
Abstract: An integrated circuit includes isolation capacitors which include a silicon dioxide dielectric layer and a polymer dielectric layer over the layer of silicon dioxide. The silicon dioxide dielectric layer and the polymer dielectric layer extend across the integrated circuit. Top plates of the isolation capacitors have bond pads for wire bonds or bump bonds. Bottom plates of the isolation capacitors are connected to components of the integrated circuit. Other bond pads are connected to components in the integrated circuit through vias through the silicon dioxide dielectric layer and the polymer dielectric layer.

Patent
12 Mar 2014
TL;DR: In this paper, the dielectric of the capacitor is located between the via and a plate of the capacitance, and the plate is external to the substrate and within the device.
Abstract: In a particular embodiment, a device includes a substrate, a via that extends at least partially through the substrate, and a capacitor. A dielectric of the capacitor is located between the via and a plate of the capacitor, and the plate of the capacitor is external to the substrate and within the device.

Patent
10 Oct 2014
TL;DR: In this paper, the first and second metal lines in a substrate are formed, and a first electrode over, but insulated from, the first metal line, a first high-k dielectric layer on the first electrode, a second electrode on the second high k-layer and over the entire first electrode.
Abstract: Methods for fabricating MIM capacitors with low VCC or decoupling and analog/RF capacitors on a single chip and the resulting devices are provided. Embodiments include forming: first and second metal lines in a substrate; a first electrode over, but insulated from, the first metal line; a first high-k dielectric layer on the first electrode, the first high-k dielectric layer having a coefficient α; a second electrode on the first high-k dielectric layer and over a portion of the first electrode; a second high-k dielectric layer on the second electrode, the second high-k dielectric layer having a coefficient α′ opposite in polarity but substantially equal in magnitude to α; a third electrode on the second high-k dielectric layer over the entire first electrode; and a metal-filled via through a dielectric layer down to the first metal line, and a metal-filled via through the dielectric layer down to the second metal line.

Proceedings ArticleDOI
22 Jun 2014
TL;DR: In this paper, a Hartley resonant topology formed by two inductors and a variable capacitor is used to measure the equivalent series resistance (ESR) and capacitance (C) of capacitors.
Abstract: This paper shows a system to measure the Equivalent Series Resistance (ESR) and Capacitance (C) of capacitors. This system provides a cost effective solution for Prognostic Health Monitoring (PHM) of capacitors used in fully electric vehicles (FEV) and medium-power switching supplies. The system is based on a Hartley resonant topology formed by two inductors and a variable capacitor. This circuit is able to measure Metalized Thin Film Capacitors (MTFC) as well as electrolytic capacitors. The paper analyzes the circuit and compares the results of simulations and experiments.

Patent
30 Jan 2014
TL;DR: A tantalum capacitor may include: a capacitor body containing a tantalum powder and having the tantalum wire exposed to one end surface thereof; a positive electrode lead frame including a positive node terminal part, a vertical support part vertically extended from one leading edge of the positive node, and a positive connection part extended from the vertical support component toward the positive electrode terminal part and connected to the wire.
Abstract: A tantalum capacitor may include: a capacitor body containing a tantalum powder and having a tantalum wire exposed to one end surface thereof; a positive electrode lead frame including a positive electrode terminal part, a vertical support part vertically extended from one leading edge of the positive electrode terminal part, and a positive electrode connection part extended from the vertical support part toward the positive electrode terminal part and connected to the tantalum wire; a negative electrode lead frame having the capacitor body mounted on an upper surface thereof; and a molding part formed to allow a lower surface of the positive electrode terminal part of the positive electrode lead frame and a lower surface of the negative electrode lead frame to be exposed, while enclosing the capacitor body.

Proceedings ArticleDOI
01 Jun 2014
TL;DR: In this article, the dielectric strength testing is performed to determine breakdown field levels during short pulse conditions, and the energy densities are projected for high energy density capacitor designs.
Abstract: The development of novel composites is ongoing in an effort to develop materials with an energy density greater than 5 J/cm3 for use in high voltage capacitors. The materials are composites initially developed to reduce the size of high power antennas. Due to their combination of a high dielectric constant and high dielectric strength, some of the original composites were directly transitioned for evaluation in high voltage, high energy density capacitors while others required modifications to reduce DC leakage current or to make other optimizations for the capacitor application. Recent testing has focused on dielectric strength testing to determine breakdown field levels during short pulse conditions. This initial work has included experiments with the methods of surface preparation and electrode application as well as modifications to the structure and chemistry of some candidate composites. Results are presented on the dielectric strength and dielectric constant of one of the candidate composite materials with various electrode structures designed to reduce field enhancements. Practical operating electric field levels are determined from an analysis of the breakdown data, and energy densities are projected for high energy density capacitor designs.

Patent
25 Apr 2014
TL;DR: In this paper, a MIM (metal-insulator-metal) capacitor with a multi-layer dielectric layer including an amorphous layer configured to mitigate the formation of leakage paths, and a method of formation is discussed.
Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a multi-layer capacitor dielectric layer including an amorphous dielectric layer configured to mitigate the formation of leakage paths, and a method of formation. In some embodiments, the MIM (metal-insulator-metal) capacitor has a capacitor bottom metal layer. A multi-layer capacitor dielectric layer is disposed over the capacitor bottom metal layer. The multi-layer capacitor dielectric layer has an amorphous dielectric layer abutting a high-k dielectric layer. A capacitor top metal layer is disposed over the multi-layer capacitor dielectric layer. The high-k dielectric layer within the capacitor dielectric layer provides the MIM capacitor with a high capacitance density, while the amorphous dielectric layer prevents leakage by blocking the propagation of grain boundaries between the capacitor top metal layer and the capacitor bottom metal layer.


Journal ArticleDOI
TL;DR: In this article, the possibility of enhancing the frequency performance of electrochemical capacitors by tailoring the nanostructure of the carbon electrode to increase electrolyte permeability is demonstrated.
Abstract: The possibility of enhancing the frequency performance of electrochemical capacitors by tailoring the nanostructure of the carbon electrode to increase electrolyte permeability is demonstrated. Highly porous, vertically oriented carbon electrodes which are in direct electrical contact with themetallic current collector are produced via MPECVD growth on metal foils. The resulting structure has a capacitance and frequency performance between that of an electrolytic capacitor and an electrochemical capacitor. Fully packaged devices are produced on Ni and Cu current collectors and performance compared to state-of-the-art electrochemical capacitors and electrolytic capacitors. The extension of capacitive behavior to the AC regime (∼100 Hz) opens up an avenue for a number of new applications where physical volume of the capacitor may be significantly reduced.

Patent
15 Jan 2014
TL;DR: In this article, a method for the production of an electrode material for aluminum electrolytic capacitors is presented, which enables the easy production of a high capacitance electrode material regardless of the average particle diameter (D50) of aluminum powder to be used.
Abstract: The present invention provides a production method that enables easy production of an electrode material for aluminum electrolytic capacitor having a high capacitance, and that enables, in particular, easy production of an electrode material for aluminum electrolytic capacitor having a high capacitance regardless of the average particle diameter (D50) of aluminum powder to be used. Specifically, the present invention provides a method for producing an electrode material for aluminum electrolytic capacitor, comprising the steps of: (1) a first step of forming a film of a paste composition containing powder of at least one of aluminum and an aluminum alloy, a binder resin, and a solvent on at least one surface of a substrate, (2) a second step of sintering the film, and (3) a third step of applying an etching treatment on the sintered film.

Patent
Young Kyu Song1, Kyu-Pyung Hwang1, Dong Wook Kim1, Xiaonan Zhang1, Ryan David Lane1 
07 May 2014
TL;DR: In this paper, a package substrate with an embedded package substrate (EPS) capacitor with equivalent series resistance (ESR) control is presented. And the EPS capacitor having the ESR control structure form an ESR configurable EPS capacitor which can be embedded in package substrates.
Abstract: Some novel features pertain to package substrates that include a substrate having an embedded package substrate (EPS) capacitor with equivalent series resistance (ESR) control. The EPS capacitor includes two conductive electrodes separated by a dielectric or insulative thin film material and an equivalent series resistance (ESR) control structure located on top of each electrode connecting the electrodes to vias. The ESR control structure may include a metal layer, a dielectric layer, and a set of metal pillars which are embedded in the set of metal pillars are embedded in the dielectric layer and extend between the electrode and the metal layer. The EPS capacitor having the ESR control structure form an ESR configurable EPS capacitor which can be embedded in package substrates.

Patent
05 Jun 2014
TL;DR: In this article, a method for manufacturing a solid electrolytic capacitor with a large connection strength between a positive part and a positive electrode lead terminal was proposed, by which a reliable solid-electrolytic capacitor large in the connection strength can be surely manufactured.
Abstract: PROBLEM TO BE SOLVED: To provide: a method for manufacturing a solid electrolytic capacitor, by which a reliable solid electrolytic capacitor large in the connection strength between a positive electrode part and a positive electrode lead terminal can be surely manufactured; and a reliable solid electrolytic capacitor manufactured by such a method.SOLUTION: A method for manufacturing a solid electrolytic capacitor A including a capacitor element 10 having a positive electrode part 1, a dielectric layer 3 provided on the positive electrode part and a negative electrode part 2 provided on the dielectric layer, a positive electrode lead terminal 11 electrically connected with the positive electrode part of the capacitor element, and a negative electrode lead terminal 12 electrically connected with the negative electrode part of the capacitor element comprises the steps of: performing, on at least one of a connecting portion 11b of the positive electrode lead terminal 11 with the positive electrode part 1, and a connecting portion 1b of the positive electrode part 1 with the positive electrode lead terminal, a resistance-increase treatment for increasing the contact resistance with the positive electrode part or the positive electrode lead terminal, which the positive electrode lead terminal or the positive electrode part is to be connected to; and then, performing the resistance welding of the positive electrode part and the positive electrode lead terminal.

Patent
02 Apr 2014
TL;DR: In this paper, a leading-out process for an anode and a cathode of an end cap-type tantalum capacitor is described, which is shown to enlarge the design space of the tantalum capacitance.
Abstract: The invention discloses a leading-out process for an anode and a cathode of an end cap-type tantalum capacitor. The leading-out process comprises the following steps: (1) getting a tantalum core preform with the anode and the cathode; (2) enabling a high-temperature adhesive tape of which the width is equal to that of the tantalum core preform to cling to the bottom part of a tantalum core, and then, preheating the tantalum core; (3) burying the preheated tantalum core in epoxy resin powder for 2s-5s, and then, tearing off the high-temperature adhesive tape at the bottom part of the tantalum core; (4) solidifying epoxy resin; (5) solidifying cathode silver paste; (6) solidifying anode silver paste; (7) separating the tantalum core to become a whole individual with specified dimensions; (8) electroplating the tantalum core obtained in the step (7). The leading-out process disclosed by the invention has the beneficial effects that an anode and cathode leading-out process for a traditional tantalum capacitor is improved; without an anode and cathode soldering lug or a leading-out wire, the middle part of the tantalum capacitor is insulated by utilizing the epoxy resin; the anode and the cathode of the capacitor are directly led out by the silver paste at both ends, so that the design space of the tantalum capacitor is enlarged.

Patent
19 Dec 2014
TL;DR: In this paper, a high precision capacitor dielectric is formed by depositing a first layer of the capacitor Dielectric on the high-precision capacitor bottom plate wherein the first layer is silicon nitride, and then a second layer of dielectrics on the second layer was replaced by silicon dioxide, and a third layer was added to the last layer by silicon nitric oxide.
Abstract: A process of forming an integrated circuit forms a high precision capacitor bottom plate with a metallic surface and performs a plasma treatment of the metallic surface. A high precision capacitor dielectric is formed by depositing a first layer of the capacitor dielectric on the high precision capacitor bottom plate wherein the first layer is silicon nitride, depositing a second layer of the capacitor dielectric on the first layer wherein the second portion is silicon dioxide, and depositing a third layer of the capacitor dielectric on the second portion wherein the third layer is silicon nitride. Plasma treatments may also be performed on the layers of capacitor dielectric pre- and/or post-deposition. A metallic high precision capacitor top plate is formed on the high precision capacitor dielectric.

Patent
15 Jan 2014
TL;DR: In this paper, an ultra-low ESR chip macromolecular solid electrolytic capacitor comprising a core body and lead wires is presented. But the core body is led out by two lead wires rather than one conventional lead wire.
Abstract: The utility model discloses an ultra-low ESR chip macromolecular solid electrolytic capacitor comprising a core body and lead wires. A tantalum pentoxide layer is disposed on the core body. A macromolecular conducting layer is arranged on the tantalum pentoxide layer. A carbon layer is disposed on the macromolecular conducting layer. A silver layer is arranged on the carbon layer. An epoxy resin layer is disposed on the silver layer. Two lead wires are provided and are connected with the core body in order to lead out capacitance. The core body is led out by two lead wires rather than one conventional lead wire. Therefore, the ESR of a capacitor is greatly decreased and the size of the capacitor is greatly decreased. The probability of product failure caused by self heating of the capacitor in a using process is decreased and reliability is enhanced. The operative performance and reliability of the chip macromolecular solid electrolytic tantalum capacitor under nominal voltage of 63V is greatly enhanced. A novel product under a platform with the nominal voltage of 63V can be developed and the application of the chip macromolecular solid electrolytic tantalum capacitor in electron industry is expanded.

Journal ArticleDOI
TL;DR: In this paper, the authors analyzed and compared various glasses with a thickness of less than 50 μm by dielectric spectroscopy and elemental analysis, and concluded that glass is attractive as dielectrics for a wide frequency range up to 200°C.
Abstract: Modern polypropylene film power capacitors are state of the art for power factor correction and many DC link applications, but their long-term commercial use is limited to temperatures of less than 85°C. The temperature limit is given by the dielectric polypropylene which has a melting point in the range of 140 to 170°C, while glass is much higher. Thus, the temperature limit could potentially be overcome by use of thin, alkali-free glass as dielectric. “Glass capacitors” employing ultra-thin and high purity glass layers are promising devices for high temperature applications in oil, gas, aerospace, hybrid electric vehicles, DC transmission, and pulsed power systems. This includes emerging power electronic systems using silicon carbide switches and diodes. p] This work analyzes and compares various glasses with a thickness of less than 50 μm by dielectric spectroscopy and elemental analysis. It is demonstrated that glass is attractive as dielectric for a wide frequency range up to 200°C. It argues that the dielectric losses are currently too great for thin glass to be used within a commercial power capacitor. p] While high temperature prototypes already exist, we demonstrate through our analysis that further developments are required to integrate this promising device into commercial systems. It is seen that even trace amounts of alkali materials can have an impact on losses. These losses must be further reduced through fundamental research into polarization/conduction mechanisms of various glass components.