Topic
Tantalum capacitor
About: Tantalum capacitor is a research topic. Over the lifetime, 2432 publications have been published within this topic receiving 26709 citations.
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22 Apr 1994TL;DR: In this paper, a method for fabricating a capacitors having a fin-shaped electrode on a dynamic random access memory (DRAM) cell having increased capacitance was achieved.
Abstract: A method for fabricating a capacitors having a fin-shaped electrode on a dynamic random access memory (DRAM) cell having increased capacitance was achieved. The capacitor is fabricated on a silicon substrate having an active device region. The device region contains a metal-oxide-semiconductor field effect transistor (MOSFET), having one capacitor aligned over and contacting the source/drain of the MOSFET in the device region. The capacitor is increased in capacitance by forming a multilayer insulator structure over the storage capacitor area and recessing alternate layers, then using the form as a mold for forming a polysilicon fin-like bottom capacitor electrode. The remaining multilayer mold is removed and a high dielectric constant insulator is deposited on the bottom electrode as the inter-electrode dielectric. The top capacitor electrode is formed by depositing a doped polysilicon layer which also fills the recesses in the bottom electrode forming an interdigitized fin-shaped top and bottom capacitor electrodes and completing a dynamic random access memory (DRAM) cell.
55 citations
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IBM1
TL;DR: In this paper, a multilayer ceramic substrate having a thin film structure containing capacitor connected thereto is provided as an interposer capacitor, the capacitor employing platinum as the bottom electrode of the capacitor.
Abstract: A multilayer ceramic substrate having a thin film structure containing capacitor connected thereto is provided as an interposer capacitor, the capacitor employing platinum as the bottom electrode of the capacitor. In a preferred capacitor, a dielectric material such as barium titanate is used as the dielectric material between the capacitor electrodes. The fabrication of the interposer capacitor requires an in-situ or post deposition high temperature anneal and the use of such dielectrics requires heating of the capacitor structure in a non-reducing atmosphere. A layer of a high temperature, thin film diffusion barrier such as TaSiN on the lower platinum electrode between the electrode and underlying multilayer ceramic substrate prevents or minimizes oxidization of the metallization of the multilayer ceramic substrate to which the thin film structure is connected during the fabrication process. A method is also provided for fabricating an interposer capacitor with a multilayer ceramic substrate base and a thin film multilayer structure having at least one capacitor comprising at least one bottom platinum electrode.
55 citations
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NEC1
TL;DR: In this article, a stacked capacitor element for a DRAM cell is formed as follows: after a naturally oxidized film on a surface of a polycrystalline silicon film is removed, the polycrystaline silicon is subjected to a rapid thermal nitriding treatment using lamp annealing so that a capacitor lower electrode of the capacitor element is formed.
Abstract: A stacked capacitor element for a DRAM cell is formed as follows. After a naturally oxidized film on a surface of a polycrystalline silicon film is removed, the polycrystalline silicon film is subjected to a rapid thermal nitriding treatment using lamp annealing so that a capacitor lower electrode of the capacitor element is formed. A tantalum oxide film is deposited on the polycrystalline silicon film and then densified so that a dielectric film of the stacked capacitor element is formed. A conductive film is formed on the tantalum oxide film and patterned. The conductive film is nittided so that a capacitor upper electrode is formed. The capacitor element thus formed enables the suppression of reduction in the capacitance value of the capacitor element of a DRAM and deterioration of the leakage current characteristics.
54 citations
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IBM1
TL;DR: In this article, a capacitor having a high dielectric constant and method of making the same is described, which comprises a bottom electrode comprising a conductive oxide deposited upon a substrate by chemical vapor deposition.
Abstract: A capacitor having a high dielectric constant and method of making the same is disclosed. The capacitor comprises a bottom electrode comprising a conductive oxide deposited upon a substrate by chemical vapor deposition. A dielectric layer having a high dielectric constant is deposited upon the conductive oxide. Lastly, a counter electrode is formed upon the dielectric layer.
54 citations
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12 Apr 1996TL;DR: In this article, a multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits is described, where the first electrode surfaces are formed by conversion of a conductive transition-metal nitride to an insulating transition metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.
Abstract: A multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits provides (1) capacitor first or bottom electrodes comprising a transition-metal nitride; (2) a capacitor dielectric comprising a transition-metal oxide; (3) capacitor second or top electrodes comprising a transition-metal nitride, a metal or multiple conductive layers; (4) one or more levels of interconnect lines; (5) electrical insulation between adjacent regions as required by the application; and (6) bonding between two regions when such bonding is required to achieve strong region-to-region adhesion or to achieve a region-to-region interface that has a low density of electrical defects. The process for forming the material structures involves formation of the capacitor dielectric on the first electrode surfaces by conversion of a conductive transition-metal nitride to an insulating transition-metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.
54 citations