Tantalum capacitor

About: Tantalum capacitor is a research topic. Over the lifetime, 2432 publications have been published within this topic receiving 26709 citations.

Capacitor, circuit board with built-in capacitor and method of manufacturing the same

Abstract: In a capacitor 10, a first electrode 21, a dielectric layer 23, a solid electrolytic layer 50 and a second electrode 31 are provided. In a manufacturing process, the dielectric layer 23 and a first solid electrolytic layer 24 formed by a chemical polymerization film are provided on the first electrode 21 side, while a second solid electrolytic layer 32 formed by an electrolytic polymerization film is provided on the second electrode 31 side. Then, the solid electrolytic layers are bonded to each other.

Screen-printed filter capacitors for filtered feedthroughs

Abstract: A filter capacitor comprising a pre-sintered substrate supporting alternating active and ground electrode layers segregated by a dielectric layer is described. The substrate is of a ceramic material that maintains its shape and structure dimensions even after undergoing numerous sintering steps. Consequently, relatively thin active and ground electrode layers along with the intermediate dielectric layer can be laid down or deposited by a screen-printing technique. Using a relatively thin over-glaze in comparison to a thick upper dielectric layer finishes the capacitor. Consequently, a significant amount of space is saved in comparison to a comparably rated capacitor or, a capacitor of a higher rating can be provided in the same size as a conventional prior art capacitor. The pre-sintered ceramic substrate is used instead of conventional tape cast technology for the base dielectric.

Characterization of a tantalum capacitor fabricated with a conducting polypyrrole as a counter electrode

Abstract: Summary form only given. A tantalum solid electrolytic capacitor using a conducting polypyrrole com posite as a counter electrode has been investigated on the current-voltage characteristics at various temperatures. The capacitor demonstrates the features of an ideal capacitor, meaning a constant capacitance and proportion al decrease of impedance with frequency up to the resonance point. The leak age current at the working voltage is nearly two orders of magnitude smaller than of a conventional tantalum capacitor using a MnO/sub 2/ electrode. The resistance changes along the curve expected from the variable range hopping model similarly to the case of polypyrrole alone. The current-voltage curve follows the Schottky or Pool-Frenkel emission process and shows that the area and depth of the defects on dielectric (Ta/sub 2/O/sub 5/) layers are smaller than those of the conventional tantalum capacitor. Furthermore, the healing effect is observed for broken samples. In this case, the current decreases dramatically by applying the working voltage.

Method for making fin-shaped stack capacitors on DRAM chips

Abstract: A method for fabricating a capacitor having a fin-shaped electrode on a dynamic random access memory (DRAM) cell having increased capacitance was achieved The capacitor is fabricated on a silicon substrate having an active device region The device region contains a metal-oxide-semiconductor field effect transistor (MOSFET), having one capacitor aligned over and contacting the source/drain of the MOSFET in the device region The capacitor is increased in capacitance by forming a multi-layer insulator structure over the storage capacitor area and recessing alternate layers, then using the form as a mold for forming a fin-like bottom capacitor electrode A high dielectric constant insulator is deposited on the bottom electrode as the inter-electrode dielectric The top capacitor electrode is formed by depositing a doped polysilicon layer which also fills the recesses having the bottom electrode forming therein fin-shaped top capacitor electrode and completing a dynamic random access memory (DRAM) cell This method also eliminates the need to plasma etch to the source/drain contact during the fabrication of the capacitor, thereby improving reliability and making a more manufacturable process

Structure for thin film capacitors

Abstract: A capacitor is fabricated on a base surface by applying a first pattern of electrical conductors (a first capacitor plate) over the base surface with an outer surface of the first pattern of electrical conductors including molybdenum. A first hard portion of a capacitor dielectric layer including amorphous hydrogenated carbon is deposited over the first capacitor plate and the base surface, a soft portion of the capacitor dielectric layer is deposited over the first hard portion, and a second hard portion of the capacitor dielectric layer is deposited over the soft portion. The deposition of the soft portion occurs at a lower bias voltage than the deposition of the first and second hard portions. A second pattern of electrical conductors (a second capacitor plate) is applied over the capacitor dielectric layer which is then patterned. A polymer layer is applied over the first and second capacitor plates, and two vias are formed, a first via extending to the first capacitor plate and a second via extending to the second capacitor plate. An electrode-coupling pattern of electrical conductors is applied over the polymer layer, a first portion extending into the first via and a second portion extending into the second via. Deposition of the capacitor dielectric layer can include using a methylethylketone precursor. Additional capacitor dielectric layers and plates having staggered via landing pads can be layered to increase the capacitance.