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Showing papers on "Task (computing) published in 1980"


Journal ArticleDOI
TL;DR: In this article, the contract net protocol has been developed to specify problem-solving communication and control for nodes in a distributed problem solver, where task distribution is affected by a negotiation process, a discussion carried on between nodes with tasks to be executed and nodes that may be able to execute those tasks.
Abstract: The contract net protocol has been developed to specify problem-solving communication and control for nodes in a distributed problem solver. Task distribution is affected by a negotiation process, a discussion carried on between nodes with tasks to be executed and nodes that may be able to execute those tasks.

3,612 citations


Proceedings ArticleDOI
01 Jul 1980
TL;DR: The analyses and simulations indicate that substantial gain is possible by applying multiple processors to the task, but, as more and more processors are added, additional gains in performance become smaller and smaller, which suggests optimal system sizes.
Abstract: The results of expected performance analysis and simulation of three multiple processor Z-buffer architectures are presented. These architectures have been proposed as approaches to applying many processors, working in parallel, to the task of rapidly creating shaded raster images. These architectures are attractive since they offer potentially high performance, in terms of image update rate, at modest cost. All three approaches make use of multiple instances of identical processor modules.The analyses and simulations indicate that substantial gain is possible by applying multiple processors to the task. But, as more and more processors are added, additional gains in performance become smaller and smaller. This result suggests optimal system sizes. The performance of these architectures depends on the processors used, the number of processors, and certain characteristics of the image environments. Each architecture has its own performance characteristics and limitations.

87 citations


Patent
05 Feb 1980
TL;DR: In this paper, an operations controller for each computer in a multiple computer system is disclosed, consisting of a fault handler (204), a scheduler (206), a task communicator (208), plus a transmitter (212) and requisite receivers (202) which receive and send messages to all the other computers in the system.
Abstract: An operations controller for each computer in a multiple computer system is disclosed. Each operations controller controls the operations of its associated computer, so that all of the computers cooperate to perform system functions in a fault-tolerant manner. Each operations controller comprises a fault handler (204), a scheduler (206), a task communicator (208), plus a transmitter (212) and requisite receivers (202) which receive and send messages to all the other computers in the system. The fault handler (204) checks each message received and decides which computers are operating correctly and which are faulty. A scheduler (206) selects each task its own computer will execute, from the tasks assigned to its own computer. A task communicator (208) assembles the data values required for the execution of the selected task, and forwards this data to the computer for execution. The operations controller sends messages to all of the other computers in the system, informing them of which computer it deems to be faulty, the tasks it selects to execute, when it starts and completes the execution of each selected task, and the data variable values produced by the execution of each task.

85 citations


Patent
06 May 1980
TL;DR: In this article, a micro-programmed data processing system is described in which each high level instruction is performed by one or more tasks, each task being in turn performed by executing one or multiple task microinstructions in a microprogrammed manner.
Abstract: A microprogrammed data processing system is provided in which each high level instruction is performed by one or more tasks, each task being in turn performed by executing one or more task microinstructions in a microprogrammed manner. Dynamic resource allocation and task synchronization are additionally provided along with a three-stage pipelined architecture so as to provide both multiprogramming and multiprocessing on a microinstruction level.

60 citations


Patent
Toshio Furuhashi1
02 Apr 1980
TL;DR: A plurality of engine controlling programs to be executed by a central processing unit (CPU) is classified into a number of task programs (PROGO - 5) in accordance with processing functions of CPU.
Abstract: Method and apparatus for electronically controlling an internal combustion engine. A plurality of engine controlling programs to be executed by a central processing unit (CPU) (102) is classified into a number of task programs (PROGO - 5) in accordance with processing functions of CPU. The periods at which the task programs are to be activated are determined in consideration of the influential significanceof the tasks in controlling the engine, whereby the task programs are executed in accordance with the activation periods thereof under supervision of a program (104 - OS) for monitoring the plurality of the engine control programs.

26 citations


Patent
12 May 1980
TL;DR: In this article, a general purpose computing machine utilizing a hardware executive system controller for reducing software system overhead is presented, where a novel programming structure tailored to the machine architecture by separating data transformation tasks from control statements and performing the data transformation task at processor level while performing the control task in the hardware executive.
Abstract: A general purpose computing machine utilizing a hardware executive system controller for reducing software system overhead. The computing machine has a uniprocessor embodiment which enhances system throughput and a multiprocessor embodiment which may be tailored to achieve a high level of concurrent processor operation. The computing machine utilizes a novel programming structure tailored to the machine architecture by separating data transformation tasks from control statements and performing the data transformation task at the processor level while performing the control task in the hardware executive.

17 citations


Patent
Amano Matsuo1, Masumi Imai1, Toru Sugawara1, Sakamoto Shinichi1, Masayuki Miki1, Takao Sasayama1 
02 Apr 1980
TL;DR: In this paper, a method for controlling the operation of an internal combustion engine on the basis of results of arithmetic operations of digital control quantities derived from detected operating conditions of the engine through digital processing operations is presented.
Abstract: A method of controlling, electronically, the operation of an internal combustion engine on the basis of results of arithmetic operations of digital control quantities derived from detected operating conditions of the engine through digital processing operations The digital processing operations are divided into a number of tasks in dependence on the control functions to be performed The method comprises a step of setting an activation request indication for a task through the execution of another task, a step of setting an activation request indication for a task through execution of the task itself, a step of searching the activation request indications for the individual tasks, and a step of executing the tasks to which the activation requests are issued on the basis of the effects of the tasks

15 citations


ReportDOI
01 Dec 1980
TL;DR: A concept of using realistic radio communications activities as subsidiary workload measurement tasks in R&D simulations and actual flight tests to devise a generalized method of developing communications tasks with controlled levels of added workload which could be tailored to specific system and mission contexts.
Abstract: : Primary task interference and poor operator acceptance are problems associated with secondary task measures of aircrew workload which limit their usefulness during the later stages of system development. A possible solution to these problems would be to design secondary tasks which are an integral part of normal operator duties and retain the properties of valid measurement tasks. This report describes a concept of using realistic radio communications activities as subsidiary workload measurement tasks in R&D simulations and actual flight tests. In order to devise a generalized method of developing communications tasks with controlled levels of added workload which could be tailored to specific system and mission contexts, three methods of workload scaling were applied to 13 communications tasks typical of those occurring in the A-10 aircraft. The first technique provided workload estimates based on the information transmission demands of communications activities. Information theoretical metrics were applied to the perceptual decisions and manual action decisions required in response to incoming messages. In a second scaling effort, this approach was supplemented by estimates of the additional contribution to workload of memory demands, information gathering activities, and instruction complexity, which were not assessed by the information theoretical measures.

6 citations


Patent
24 Mar 1980
TL;DR: In this article, a CRT is used to display information such as the abnormal position, abnormal contents, the time and the countermeasure given through anomaly display task 18, and when anomaly of the system is detected by anomaly discrimination unit 16, priority automatic switching unit 20 is switched to A-C connection, and CRT 6 is used for display of information, and the operator can call and execute successevely tasks through input device 2 in the conversational mode.
Abstract: PURPOSE:To make it possible to display detailed anomaly and perform a confirmation operating by connection a priority automatic switching unit to a CRT and using the CRT for the interruption display of anomaly, etc. CONSTITUTION:Since priority automatic switching unit 20 is set to A-B connection normally, CRT 6 is used for display of tasks 12-1-12-3 selected by task selection unit 10, and the operator can call and execute successevely tasks 12-1-12-3 through input device 2 in the conversational mode. Meanwhile, when anomaly of the system is detected by anomaly discrimination unit 16, priority automatic switching unit 20 is switched to A-C connection, and CRT 6 is used for display of information such as the abnormal position, abnormal contents, the time and the countermeasure given through anomaly display task 18.

5 citations


Journal ArticleDOI
TL;DR: A queuing analysis of a preemptive, priority-driven, time-sliced dispatcher algorithm, typical of those found in many time-sharing systems, is presented in this article, where a preempted task, when readmitted to the dispatcher, is reallocated a full time slice rather than the residual.
Abstract: A queuing analysis of a preemptive, priority-driven, time-sliced dispatcher algorithm, typical of those found in many time-sharing systems, is presented. A distinctive feature of the system being modeled is that a preempted task, when readmitted to the dispatcher, is reallocated a full time slice rather than the residual. The combination of preemption, time-slice renewal and class-dependent arrival and service rates places the analysis beyond that of the well-known FBN algorithms. The model is used to predict the behavior of the dispatcher algorithm under various workloads. The model reveals that, at high arrival rates, the time-slice renewal policy prevents processor bound tasks from being relegated to the lower priority queues, thereby severely degrading the throughput of tasks with short processor requirements.

3 citations


Patent
10 May 1980
TL;DR: In this article, a general purpose computing machine utilizing a hardware executive system controller for reducing software system overhead is presented, where a novel programming structure tailored to the machine architecture by separating data transformation tasks from control statements and performing the data transformation task at processor level while performing the control task in the hardware executive.
Abstract: A general purpose computing machine utilizing a hardware executive system controller for reducing software system overhead. The computing machine has a uniprocessor embodiment which enhances system throughput and a multiprocessor embodiment which may be tailored to achieve a high level of concurrent processor operation. The computing machine utilizes a novel programming structure tailored to the machine architecture by separating data transformation tasks from control statements and performing the data transformation task at the processor level while performing the control task in the hardware executive.

Patent
29 Dec 1980
TL;DR: In this paper, a task distribution processing part 4 started by the start request for tasks, a region administrating table 11 holding the operation state information of the tasks assigned to the segments 14 by each of the segments of a memory 13, and a segment selection processing part 8 investigating the busy state of the respective segments by indexing this table 11 and selects idle segments are provided.
Abstract: PURPOSE:To make the effective utilization of idle segments and improve the use efficiency of a memory by investigating the idle state of segments and distributing tasks in starting the tasks. CONSTITUTION:A task distribution processing part 4 started by the start request for tasks, a region administrating table 11 holding the operation state information of the tasks assigned to the segments 14 by each of the segments 14 of a memory 13, and a segment selection processing part 8 investigating the busy state of the respective segments 14 by indexing this table 11 and selects idle segments are provided. When a start request for tasks is made, the processing part 4 distributes the start requested tasks to the arbitrary idle segments selected by the processing part 8, thereby processing the same.

01 Jan 1980
TL;DR: Taking measures of the speedup that can be expected from the application of a distributed processor to search problems that involve regular trees, and the effect of coupling between processors on speedup are derived.
Abstract: We discuss the implementation of heuristic search algorithms in a distributed problem solver whose processors interact according to the contract net protocol. Task distribution is viewed as a local mutual selection process based on a two-way transfer of information between processors with tasks to be executed and processors with knowledge-sources capable of executing those tasks. As an example of the approach, we consider the N Queens problem. We then derive measures of the speedup that can be expected from the application of a distributed processor to search problems that involve regular trees, and discuss the effect of coupling between processors on speedup. Bounds are developed for the number of processors that are required to achieve maximum speedup.

Patent
Amano Matsuo1, Masumi Imai1, Toru Sugawara1, Sakamoto Shinichi1, Masayuki Miki1, Takao Sasayama1 
02 Apr 1980
TL;DR: In this article, a method of controlling electronically operation of the internal combustion engine on the basis of results of arithmetic operations of digital control quantities derived from detected operating conditions of the engine through digital processings is presented.
Abstract: A method of controlling electronically operation of the internal combustion engine on the basis of results of arithmetic operations of digital control quantities derived from detected operating conditions of the engine through digital processings. The digital processings are divided into a number of tasks in dependence on the control functions to be performed. The method comprises a step of setting an activation request indication for a task through execution of the other task, a step of setting an activation request indication for a task through execution of the task itself, a step of searching the activation request indications for the individual tasks, and a step of executing the tasks to which the activation requests are issued on the basis of the significances of the tasks.

Patent
24 Apr 1980
TL;DR: In this article, a queue control table on a memory available for common access and a reserved status table is provided to perform excellent queue control when processing requests from several computers by one computer.
Abstract: PURPOSE:To perform excellent queue control when processing requests from several computers by one computer, by providing a queue control table on a memory available for common access and then by adding a reserved status table. CONSTITUTION:Control table 6 controls output waiting table 7 and mapping table 8. Table 7 is stored with numbers of messages, which CPUs 2 and 3 require, in the order of generation and then they are outputted to sound unit 5. Table 8 indicates whether reserved message NO has been registered in tabel 7 or not, by using ''1'' for registration or ''0'' for non-registration. Control flag 9 performs exclusive control between CPUs. The task of the request of CPU3 is considered to end while CPU2 pre- empt control flag 9 and a processing task is in process. In this case, since the area of table 8 is ''0'' and the next area is ''1'', the request is not accepted even if CPU4 operates. Next, when the request task of CPU3 is put into operation, the area of table 8 becomes ''1'' and through output task actuation of CPU4, message NO is processed in the order of CPUs 2 and 3.

Patent
20 Oct 1980
TL;DR: In this article, the authors propose to attain a high controllability of an electronic engine controlling apparatus comprising a central processing unit for processing digital operation, independently of changes in the operational condition of engine, by dividing the engine controlling content into several tasks, and determining the task starting period according to the influence to engine controLLability exerted by the processing function.
Abstract: PURPOSE:To attain a high controllability of an electronic engine controlling apparatus comprising a central processing unit for processing digital operation, independently of changes in the operational condition of engine, by dividing the engine controlling content into several tasks, and determining the task starting period according to the influence to engine controllability exerted by the processing function. CONSTITUTION:When CPU102 is started, initializing program 204, monitoring program 206 and background job 208 are exected. As the background job 208 for example, taks like calculation of the exhaust gas recirculating rate are performed. When an interruption factor IRQ is produced during execution of the task, IRQ- factor analyzing program 224 is executed. This program is composed of program 226 for processing interruption by completion of ADC1, program 228 for processing interruption by completion of ADC2, program 230 for processing interruption by passing of a prescribed time period, program 232 for processing interruption by engine stop, etc., and gives start demands to respective tasks required for starting the tasks.

Journal ArticleDOI
TL;DR: In this article, the equilibrium probability of buffer overflow, and the equilibrium waiting time distribution of a task until it is processed are studied as a function of model parameters, where the buffer capacity and work discipline are chosen such that the maximum rate at which tasks are processed through the buffer while still meeting delay criteria is not above some maximum level.
Abstract: Service requests arrive to an input buffer in a digital system. The buffer capacity and work discipline are to be chosen such that the maximum rate at which tasks are processed through the buffer while still meeting delay criteria is not above some maximum level. This input buffer is intended to be a control valve to prevent internal system overload. A processor visits the buffer at random time epochs, serves up to a given maximum number of tasks, leaves, and repeats this process. The equilibrium probability of buffer overflow, and the equilibrium waiting time distribution of a task until it is processed are studied as a function of model parameters.