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Showing papers on "Task (computing) published in 1994"


Patent
Joel L. Wolf1, Philip S. Yu1, John Turek1
19 Aug 1994
TL;DR: A task scheduler for use in a multiprocessor, multitasking system in which a plurality of processor complexes, each containing one or more processors, concurrently execute tasks into which jobs such as database queries are divided.
Abstract: A task scheduler for use in a multiprocessor, multitasking system in which a plurality of processor complexes, each containing one or more processors, concurrently execute tasks into which jobs such as database queries are divided. A desired level of concurrent task activity, such as the maximum number of tasks that can be executed concurrently without queuing of tasks, is defined for each processor complex. Each job is assigned a weight in accordance with the external priority accorded to the job. For each job there is defined a desired level of concurrent; task activity that is proportional to its share of the total weight assigned to all concurrently executing jobs. The jobs are prioritized for execution of awaiting tasks in accordance with the discrepancy between the desired level of multitasking activity and the actual level of multitasking activity for each job. Awaiting tasks are preferentially scheduled from jobs with the largest discrepancy between the desired and actual levels of concurrent task activity and are preferentially assigned to the processor complexes with the largest discrepancy between the desired and actual levels of concurrent task activity. The scheduler attempts to assign each task to a processor for which the task has an affinity or at least neutrality in terms of relative execution speed.

214 citations


Patent
28 Jun 1994
TL;DR: In this paper, a real-time database is used for storing data elements which can be accessed by a plurality of tasks (i.e., individual tasks must communicate through the database, since no inter-task communication is supported), and each data element in the database has associated changed status flag for each task which indicates whether the value of the element has changed since the last access by the task.
Abstract: A control system (10) controls transfer of electronic signals to and from industrial and scientific equipment The control system includes a real-time database (60) for storing data elements which may be accessed by a plurality of tasks (62, 64, 66, 68, 70, and 72) Each data element in the real-time database (60) has an associated changed status flag for each task which indicates whether the value of the element has changed since the last access by the task Individual tasks must communicate through the real-time database, since no inter-task communication is supported The tasks support bidirectional communication with industrial and scientific equipment, alarm supervision, data logging, real-time clock functions, mathematical and logical functions, and interactive operator communications

135 citations


Journal ArticleDOI
TL;DR: SYNWORK1 is a computer-based performance task that requires subjects to work simultaneously on four distinct subtasks involving memory, arithmetic processing, and visual and auditory monitoring that is used in sleep-deprivation and circadian desynchronization experiments and in a variety of clinical research applications.
Abstract: SYNWORK1 is a computer-based performance task that requires subjects to work simultaneously on four distinct subtasks involving memory, arithmetic processing, and visual and auditory monitoring. Difficulty levels, the payoff matrix, feedback levels, and component subtask mix are user selectable. Detailed data are automatically collected, and a suite of data analysis programs is available. SYNWORK1 is being used in sleep-deprivation and circadian desynchronization experiments and in a variety of clinical research applications. Representative data from a sleep-deprivation experiment are presented to demonstrate the sensitivity of the technique. The strategy used for programming concurrent tasks on a PC is described.

132 citations


Journal ArticleDOI
Hideshi Itoh1
TL;DR: In this article, the authors analyze how tasks are assigned in organizations and show that an incentive consideration causes the principal to group a broad range of tasks into an agent's job rather than hire multiple agents and make each of them specialize in just one task; and the principal may choose to delegate all the tasks in order to mitigate a conflicting incentive problem with agents.

120 citations


Patent
Mark F. Anderson1
13 Jun 1994
TL;DR: In this paper, a multitasking data processing system is provided with a hardware-configured operating system kernel, which includes a processor queue that includes a plurality of word stores, each word store storing a task name, in execution priority order, that is ready for processing.
Abstract: A multitasking data processing system is provided with a hardware-configured operating system kernel. The system includes a processor queue that includes a plurality of word stores, each word store storing a task name, in execution priority order, that is ready for processing. An event queue in the kernel includes a plurality of word stores for storing task names that await the occurrence of an event to be placed in the processor queue. When an associated processor signals the occurrence of an event, matching logic searches all word stores in the event queue, in parallel, to find a task associated with the signalled event and then transfers the task to the processor queue. Shift logic is also provided for simultaneously transferring a plurality of task names, in parallel, in the processor queue to make room for a task name transferred from the event queue.

78 citations


Patent
10 Nov 1994
TL;DR: A self-testing storage system apparatus and method uses pre-recorded test sequences at a designated location within a storage system, so that a user interface task, residing in the controller of the storage system responds to a signal to initiate testing sent through a device coupled to the controller.
Abstract: A self-testing storage system apparatus and method uses pre-recorded test sequences at a designated location within a storage system, so that a user interface task, residing in the controller of the storage system responds to a signal to initiate testing sent through a user interface device coupled to the controller. The user interface task causes the test sequences to be transferred into the controller. The user interface task also disables communications through the host interface, determines from parameters sent over the user interface which tests are to be run, and causes them to be executed as manufacturing self-test tasks from within the controller, using the controller's microprocessor and memory. Depending upon the parameters provided through the user interface device, each manufacturing self-test task executes sequential and random read/write/compare tests, data or command saturation tests, RAID evaluation tests, or other tests within the storage system.

76 citations


Proceedings ArticleDOI
08 May 1994
TL;DR: A number of examples are presented, including a complex manipulation removing the top of a child-proof medicine bottle-that incorporates different hybrid position/force specifications of the primitive functions of which it is composed.
Abstract: This paper discusses the implementation of complex manipulation tasks with a dextrous hand. The approach used is to build a set of primitive manipulation functions and combine them to form complex tasks. Only fingertip, or precision, manipulations are considered. Each function performs a simple two-dimensional translation or rotation that can be generalized to work with objects of different sizes and using different grasping forces. Complex tasks are sequential combinations of the primitive functions. They are formed by analyzing the workspaces of the individual tasks and controlled by finite state machines. We present a number of examples, including a complex manipulation removing the top of a child-proof medicine bottle-that incorporates different hybrid position/force specifications of the primitive functions of which it is composed. The work has been implemented with a robot hand system using a Utah-MIT hand. >

58 citations


Journal ArticleDOI
TL;DR: For a p processor system and a series-parallel precedence graph with n constituent tasks, an algorithm is given that finds the optimal assignment for the response time optimization problem; the assignment optimizing the constrained throughput in O(np/sup 2/ log p) time is found.
Abstract: The availability of large-scale multitasked parallel architectures introduces the following processor assignment problem. We are given a long sequence of data sets, each of which is to undergo processing by a collection of tasks whose intertask data dependencies form a series-parallel partial order. Each individual task is potentially parallelizable, with a known experimentally determined execution signature. Recognizing that data sets can be pipelined through the task structure, the problem is to find a "good" assignment of processors to tasks. Two objectives interest us: minimal response time per data set, given a throughput requirement, and maximal throughput, given a response time requirement. Our approach is to decompose a series-parallel task system into its essential "serial" and "parallel" components; our problem admits the independent solution and recomposition of each such component. We provide algorithms for the series analysis, and use an algorithm due to Krishnamurti and Ma for the parallel analysis. For a p processor system and a series-parallel precedence graph with n constituent tasks, we give a O(np/sup 2/) algorithm that finds the optimal assignment (over a broad class of assignments) for the response time optimization problem; we find the assignment optimizing the constrained throughput in O(np/sup 2/ log p) time. These techniques are applied to a task system in computer vision. >

57 citations


Patent
09 Sep 1994
TL;DR: In this article, a local area computer network provides distributed parallel processing, where a large compute-intensive task may be partitioned into a plurality of parallel subtasks executed simultaneously with each subtask executed in the background by a respective workstations without substantial interference with the local task being executed concurrently in the foreground.
Abstract: A local area computer network provides distributed parallel processing. The network comprises a plurality of workstations or personal computers, each having preemptive multitasking for the interactive execution of a local task in the foreground concurrently with a remote network subtask in the background. A large compute-intensive task may be partitioned into a plurality of parallel subtasks executed simultaneously with each subtask executed in the background by a respective workstations without substantial interference with the local task being executed concurrently in the foreground. The computer time and processing power which would otherwise be wasted while waiting for slow input/output operations is instead utilized to provide a powerful parallel multiprocessor system for handling compute-intensive tasks too large for an individual workstations.

55 citations


Journal ArticleDOI
TL;DR: This work proposes to decompose the overall task to fit in the behavior-based control architecture, and then to evolve the separate behavior modules and arbitrators using an evolutionary approach, so the job of defining fitness functions becomes more straightforward and the tasks easier to achieve.

54 citations


Patent
18 Jan 1994
TL;DR: In this article, a task assignment system within a dual actuator disk drive system was proposed, in which each task has a cylinder address comprising a plurality of registers, each register having a unique address and fields for storing a task including the cylinder address associated with the tasks.
Abstract: A task assigning system within a dual actuator disk drive system wherein each task has a cylinder address comprising a plurality of registers, each register having a unique address and a plurality of fields for storing a task including the cylinder address associated with the tasks, a queue RAM (14) comprising a header register, the header register having a plurality of fields, an insertion means for inserting and ordering the registers into the queue RAM (14) when a task is first stored into the register, a first means (28) for assigning tasks stored in the queue RAM (14) to a first actuator (63) of the dual actuators in the sequence of increasing value of the cylinder addresses of tasks stored in the registers in the queue RAM (14) and a second means (30) for assigning tasks stored in the queue RAM (14) to a second actuator (61) of the dual actuators (63, 61) in the sequence of decreasing values of the cylinder addresses of the tasks stored in the registers in the queue RAM (14).

Book ChapterDOI
10 Jul 1994
TL;DR: This work uses the CQ-L architecture to acquire skills for performing composite tasks with a simulated two-linked manipulator having large state and action spaces and the manipulator is a non-linear dynamical system that requires its end-effector to be at specific positions in the workspace.
Abstract: Compositional Q-Learning (CQ-L) (Singh 1992) is a modular approach to learning to perform composite tasks made up of several elemental tasks by reinforcement learning. Skills acquired while performing elemental tasks are also applied to solve composite tasks. Individual skills compete for the right to act and only winning skills are included in the decomposition of the composite task. We extend the original CQ-L concept in two ways: (1) a more general reward function, and (2) the agent can have more than one actuator. We use the CQ-L architecture to acquire skills for performing composite tasks with a simulated two-linked manipulator having large state and action spaces. The manipulator is a non-linear dynamical system and we require its end-effector to be at specific positions in the workspace. Fast function approximation in each of the Q-modules is achieved through the use of an array of Cerebellar Model Articulation Controller (CMAC) (Albus 1975) structures.

Patent
18 Nov 1994
TL;DR: In this paper, a processing unit with an improved ability to coordinate the execution of multiple tasks with varying priorities is proposed, where tasks to be executed are assigned both a request condition and a terminating condition, with the processing unit initiating execution of the task with the highest priority whose request condition is satisfied.
Abstract: The present invention provides a processing unit with an improved ability to coordinate the execution of multiple tasks with varying priorities. Tasks to be executed are assigned both a request condition and a terminating condition, with the processing unit initiating execution of the task with the highest priority whose request condition is satisfied. In general, the processing unit terminates an executing task once the terminating condition of that task is satisfied, and then initiates execution of the next highest-priority task with a satisfied request condition. However, the processing unit may abort execution of a task (other than the highest-priority task) if the request condition of a higher-priority task becomes satisfied. Moreover, the processing unit ensures the highest-priority task does not monopolize system resources by tracking the elapsed execution time and terminating the highest-priority task if this elapsed time exceeds a predetermined maximum, in which case the processing unit initiates execution of the next highest priority task with a satisfied request condition.

Patent
13 May 1994
TL;DR: In this article, the authors propose a process for producing a parallel processor system having the minimum number of microprocessors necessary execute in real time a set of tasks of a multi-tasking application such that execution of an activity of a first task is followed by execution of a second task.
Abstract: A process for producing a parallel processor system having the minimum number of microprocessors necessary execute in real time a set of tasks of a multi-tasking application such that execution of an activity of a first task is followed by execution of an activity of a second task. The process includes the step of selecting an initial number of microprocessors for executing the application in real-time. The selecting step includes placing in a first column of a matrix all real-time constrained tasks specific to the application and associating a row of dependent tasks with each task placed in the first column of the matrix to define a plurality of task subsets, each subset incorporating a maximum number of intradependent tasks and a minimum number of interdependent tasks and the number of subsets corresponding to the initial number of microprocessors. The inventive process further includes the steps of listing dependencies between rows in a second column of the matrix, assigning a priority p i to each task where p i is between 0 and 1, subdividing at least one of the tasks into discrete activities, each of the activities having a corresponding execution time t ij , estimating the execution time for each activity, reducing the number of rows in the matrix by grouping together tasks having activities that can be executed within a predetermined time window T, and providing a number of microprocessors corresponding to the number of rows obtained from the rows reducing step.

Patent
22 Sep 1994
TL;DR: In this article, a blackboard processing system for carrying out a general processing task using a plurality of parallel processors is described, which includes a trigger module (46) including trigger patterns that are compared to the data developed from messages transmitted by the KSPs to initiate specific tasks according to a predefined sequence.
Abstract: A blackboard parallel processing system for carrying out a general processing task using a plurality of parallel processors. In one application of the blackboard processing system, a workstation (102), which is part of an an automated workstation manufacturing system (AWMS), includes a blackboard control unit (BCU) (106) on which four separate functions are implemented in separate identical modules. The BCU includes a database module (34) having access to a global database, which is available to each of the plurality of parallel processors, referred to as knowledge source processors (KSPs) (40). A trigger module (46) includes trigger patterns that are compared to the data developed from messages transmitted by the KSPs to initiate specific tasks according to a predefined sequence. A scheduler module (42) responds to the trigger signals, by transmitting a signal to initiate each task, either by a specified KSP or by the KSP that is the least loaded with previously assigned processing task. A communication module (38) serves as an interface between knowledge source operating systems in each of the KSPs. Applications running in each KSP are initiated in response to the signals provided by the BCU, producing data and using data available to each of the KSPs on the global database.

Proceedings ArticleDOI
25 Oct 1994
TL;DR: This paper suggests a novel technique, based on a Markov reward model (MRM), for analyzing the performance of checkpointing schemes with task duplication, and shows how this technique can be used to derive the average execution time of a task and other important parameters related to the performance.
Abstract: Parallel computing systems provide hardware redundancy that helps to achieve low cost fault-tolerance, by duplicating the task into more than a single processor, and comparing the states of the processors at checkpoints. This paper suggests a novel technique, based on a Markov reward model (MRM), for analyzing the performance of checkpointing schemes with task duplication. We show how this technique can be used to derive the average execution time of a task and other important parameters related to the performance of checkpointing schemes. Our analytical results match well the values we obtained using a simulation program. We compare the average task execution time and total work of four checkpointing schemes, and show that generally increasing the number of processors reduces the average execution time, but increases the total work done by the processors. However, in cases where there is a big difference between the time it takes to perform different operations, those results can change. >

Patent
19 Apr 1994
TL;DR: In this paper, a physical design automation system for producing a highest fitness cell placement for an integrated circuit chip includes a decomposition/recomposition processor for decomposing a cell placement optimization process into a plurality of tasks and recomposing the highest cell placement from results of performing the tasks.
Abstract: A physical design automation system for producing a highest fitness cell placement for an integrated circuit chip includes a decomposition/recomposition processor for decomposing a cell placement optimization process into a plurality of tasks and recomposing the highest fitness cell placement from results of performing the tasks. A plurality of worker processors independently perform the tasks and produce results. A host processor distributively assigns the tasks to the worker processors in response to work requests received therefrom. Each worker processor sends a work request to the host processor after completing a task. The host processor maintains a list of unassigned tasks, assigned tasks and completed tasks, and revises the list to redesignate assigned tasks as unassigned tasks upon determining that the list includes no unassigned tasks and at least one assigned task, thus making the system immune to the failure of one or more processors.

Patent
14 Jul 1994
TL;DR: In this paper, the authors propose a suspend circuit for data compression in a computer system with a central processing unit ("CPU"), a main memory divisible into allocable units, a secondary storage unit and an operating system for allocating the allocated units to tasks for use thereby.
Abstract: A computer system having a central processing unit ("CPU"), a main memory divisible into allocable units, a secondary storage unit and an operating system for allocating the allocable units to tasks for use thereby is provided with a suspend circuit for creating an optimized compressed image of data in the main memory. In a first embodiment, the suspend circuit comprises: (1) a circuit for initiating execution of a reducing task on the CPU, the reducing task requesting the operating system to allocate unallocated ones of the allocable units to the reducing task, (2) a circuit for storing a bit pattern in the allocable units allocated to the reducing task, the bit pattern chosen to optimize performance of a data compression process and (3) a circuit for executing the data compression process to store a compressed image of the main memory in the secondary storage unit, the bit pattern allowing a size of the compressed image to be reduced and a time required to compress and store the compressed image to be minimized. In a second embodiment, the unallocated allocable units are neither compression-optimized, compressed nor stored. Rather, the reducing task creates a record of all allocated units and the data compression process acts on only those allocated units identified in the record.

Patent
08 Feb 1994
TL;DR: In this paper, a memory control unit for the microprocessor includes segment registers that identify segments of memory assigned to various tasks and determine whether the requested memory segment can be assigned to the requesting task.
Abstract: A protection mechanism for a microprocessor has multiple privilege levels for tasks running on the microprocessor. A memory control unit for the microprocessor includes segment registers that identify segments of memory assigned to various tasks. When a segment register is loaded with the address of a new segment for a task, the protection mechanism within the memory control unit compares the privilege level of the task requesting the segment with the privilege level of the requested memory segment and determines whether the requested memory segment can be assigned to the requesting task. The relationship between the privilege levels is programmable to provide flexibility in generating privilege faults.

Journal ArticleDOI
Shunichi Asaka1, Shigeki Ishikawa1
TL;DR: A developed autonomous mobile robot (AMR) based upon a state-transition scheme, which suits for realizing the AMR behavior control according to sensory information, and it is constructed and demonstrated in a showroom as a greeter robot.
Abstract: We report a developed autonomous mobile robot (AMR) in dynamically changing environment. The AMR's behavior controller is based upon a state-transition scheme, which suits for realizing the AMR behavior control according to sensory information. The network of state-transition, however, becomes very large as behaviors become complicated. We divide the network among multiple tasks in order to suppress increase of complexity in single network. The tasks consists of a supervisor task and functional tasks. A supervisor task watches overall statuses and events, and controls functional tasks. Each functional task controls a specified part of the AMR's behavior. We constructed a real AMR system, on which the behavior control method is applied and it demonstrated in a showroom as a greeter robot.

Journal ArticleDOI
TL;DR: The unified control method provides a wide range of capabilities within the projected constraints for near-term space telerobotics systems such as limited computational power and safety.

Journal ArticleDOI
21 Mar 1994
TL;DR: The design of an object-replacement scheme in a client-server environment is described, which addresses the problem of replacing a server and transparently updating the client handle so that no service interruption is experienced by the client.
Abstract: In a distributed environment, a client program bound to a server fails when the server changes (possibly due to the server being relocated, replicated or reconfigured). In this paper, we describe the design of an object-replacement scheme in a client-server environment. Our design addresses the problem of replacing a server and transparently updating the client handle so that no service interruption is experienced by the client. The programming environment, on which this work is based, provides shared objects, threads, and invocations as the building block for distributed applications. Our design takes into account the potential concurrency within clients and servers. Our task was relatively simplified by building the replacement mechanisms on top of an asynchronous event notification facility that handles events on a per-application basis, as opposed to per-task or per-thread basis. >

Journal ArticleDOI
TL;DR: The results confirm that wholly unrelated visual tasks depend on the same input-attention system and suggest that attending to an object for any purpose may entail storing a representation of it in visual short-term memory.
Abstract: Although in many studies divided attention has been examined by having people perform the same task (e.g., report or search) with a large number of objects, in few studies have people had to perform two logically independent tasks involving the same brief display. In two experiments, subjects saw 200-msec arrays of characters. In dual-task blocks, theyclassified the color of some or all of the items (making an immediate response) andstored the shape of some of the items for a later recognition test. There was not much mutual interference between classifying and storing per se. However, the tasks were by no means independent: there was substantial interference whendifferent objects from the array had to be stored for one task and classified for the other. The results confirm that wholly unrelated visual tasks depend on the same input-attention system and suggest that attending to an object for any purpose may entail storing a representation of it in visual short-term memory.

Journal ArticleDOI
TL;DR: A simple locking scheme for working memory is presented, which, when coupled with the appropriate language idioms, allows serializable programs to be developed without incurring the expense of run-time interference detection.

Patent
07 Jan 1994
TL;DR: In this article, a data processing system adapted for running two or more identical-data-receiving replicated tasks in parallel is presented, in which message messages are transferred to the replicated tasks, each message including such data and a time stamp, the messages transferred to each replicated task being sequenced in chronological order so as to be processed by the replicated task in that order, and a stability time is determined for each message.
Abstract: A method of operating a data processing system adapted for running two or more identical-data-receiving replicated tasks in parallel, in which method messages are transferred to the replicated tasks, each message including such data and a time stamp, the messages transferred to each replicated task being sequenced in chronological order so as to be processed by the replicated task in that order, and a stability time is determined for each message, which stability time defines the instant from which the replicated task may process the message, wherein the sequencing of the messages transferred to a replicated task is based on the message time stamps plus respective first time constants, and the stability times of the messages are determined on the basis of the message stamps plus respective second time constants.

Proceedings ArticleDOI
Sang-Young Cho1, Kyu Ho Park1
26 Apr 1994
TL;DR: The dynamic assignment problem for a linear array network is first transformed into the network flow problem, and then solved by applying the Goldberg-Tarjan's (1988) network flow algorithm in time not worse than O(n/sup 2/m/Sup 2spl phisup 2/ log nm/spl phi/).
Abstract: In a heterogeneous computing system, the tasks of a program must be assigned to the heterogeneous machines so as to utilize the computational capabilities and resources of the system efficiently. This paper deals with a dynamic task assignment problem in heterogeneous computing systems, which permits each task to be relocated from machine to machine during the execution of a program. This problem is known to be NP-complete in the general case. In this paper, we extend the network-flow approach of C.-H. Lee, D. Lee and M. Kim (1992) to dynamic assignment for metacomputing. The dynamic assignment problem for a linear array network is first transformed into the network flow problem, and then solved by applying the Goldberg-Tarjan's (1988) network flow algorithm in time not worse than O(n/sup 2/m/sup 2spl phisup 2/ log nm/spl phi/), where n, m, and /spl phi/ are the numbers of machines, tasks, and phases of program execution, respectively. >

Patent
09 Sep 1994
TL;DR: In this paper, a microcode image is loaded into a processor which is already executing one or more tasks and a request to load microcode into the processor is received. The processor is signalled to suspend task execution.
Abstract: Microcode is loaded into, for example, a processor or I/O module within a computer system without manually halting and restarting the computer system. In other words, microcode can be loaded into the computer system dynamically while data processing continues from the processor or I/O module states just prior to the microcode load with no major interruption to the user. A microcode image is loaded into a processor which is already executing one or more tasks. A request to load microcode into the processor is received. The processor is signalled to suspend task execution. After the microcode image is transferred into the processor, the processor is signalled to resume task execution.

Patent
Richard E. Swagerman1
29 Apr 1994
TL;DR: In this article, the authors describe a system implementation of a computer system which implements multiple virtual machines, and forms one station in a network including at least one other station running a program for which the one station can, on request, perform host processes using virtual machines which it implements, and which has the resources to provide a pool of preconfigured virtual machines to service such requests, including a routine to manage conversations associated with such requests by responding to events relating to such conversations.
Abstract: The system implementation of a computer system which implements multiple virtual machines, and forms one station in a network including at least one other station running a program for which the one station can, on request, perform host processes using virtual machines which it implements, and which has the resources to provide a pool of preconfigured virtual machines to service such requests, includes a routine to manage conversations associated with such requests by responding to events relating to such conversations. The conversation management routine includes a main task and a sub-task spawned by the main task to preestablish an exit from the routine in the event of error. The sub-task also includes routines called selectively to handle different events relating to conversations, and is associated with an array, which contains data as to the identity and status of virtual machines in said pool of preconfigured machines, and is established and maintained by the sub-task in accordance with said events. The main task is a routine which controls spawning or waking-up of the sub-task in direct response to an event, and kills or leaves dormant the sub-task in response to messages from the sub-task following processing of an event.

Patent
Yasuhiro Abe1
23 Aug 1994
TL;DR: In this article, a control program stores the data in a vacant area within an asynchronous input and output buffer group 31, and generates, when it is determined by examining an asynchronous task management table 5 that there does not exist an asynchronous execution task having a priority identical to the priority assigned to the user program 1n, an asynchronous output and output execution task with a priority in question.
Abstract: Upon receipt of a write request to an external storage device 6 from a user program 1n, a control program 2 stores the data in a vacant area within an asynchronous input and output buffer group 31, and generates, when it is determined by examining an asynchronous input and output task management table 5 that there does not exist an asynchronous input and output execution task having a priority identical to the priority assigned to the user program 1n, an asynchronous input and output execution task having a priority in question. The asynchronous input and output execution task 4n having a priority identical to the priority of the user program 1n takes out the data from an asynchronous input and output buffer group 3 based on the storage location and the data size within the asynchronous input and output buffer group 31 delivered from the control program 2, and writes the data to the external storage device.

Proceedings ArticleDOI
12 Sep 1994
TL;DR: This paper reformulates a redundancy resolution problem with multiple criteria into a local constrained optimization problem, and proposes a new method for solving it that is especially efficient when the number of additional tasks is larger than the degree of redundancy.
Abstract: A redundant manipulator can achieve additional tasks by utilizing the degree of redundancy, in addition to a basic motion task. While some additional tasks can be represented as an objective function to be optimized, other additional tasks can be represented as kinematic inequality constraints. In this paper, we reformulate a redundancy resolution problem with multiple criteria into a local constrained optimization problem, and propose a new method for solving it. The proposed method is especially efficient when the number of additional tasks is larger than the degree of redundancy. It also systematically assigns the priorities between the additional tasks. Besides of computational efficiency, the method has a cyclic property. >