scispace - formally typeset
Search or ask a question

Showing papers on "Thin-film transistor published in 1970"



Patent
Yuichi Haneta1
02 Jun 1970
TL;DR: A field effect transistor is a gate assembly comprising a sandwich of a layer of silicon oxide with excess silicon between two insulating films of appropriate thickness for the entrapment of charge carriers in the silicon-rich silicon oxide layer.
Abstract: A field effect transistor is provided with a gate assembly comprising a sandwich of a layer of silicon oxide with excess silicon between two insulating films of appropriate thickness for the entrapment of charge carriers in the silicon-rich silicon oxide layer. Such entrapment provides the transistor with information storage capabilities in which information can be stored for a long time and readily erased or modified.

50 citations


Journal ArticleDOI
TL;DR: In this paper, a general model for the transient behaviour of m.i.s. memory transistors is presented and applied to a practical memory transistor which has an insulator layer consisting of 500-1000 A silicon nitride on 15-25 A silicon dioxide.
Abstract: A general model for the transient behaviour of m.i.s. memory transistors is presented. The model is applied to a practical memory transistor which has an insulator layer consisting of 500–1000 A silicon nitride on 15–25 A silicon dioxide. The properties of this device are calculated and are shown to agree with experimental data.

36 citations


Patent
22 Sep 1970
TL;DR: In this article, a semiconductor device includes a common substrate, on the one side of which there are provided an insulated gate field effect transistor and bipolar transistor for protecting the former transistor from the failure.
Abstract: A semiconductor device includes a common substrate, on the one side of which there are provided an insulated gate field effect transistor and bipolar transistor for protecting the former transistor from the failure. The gate of the former is electrically connected to the emitter of the latter to have the same potential.

30 citations


Patent
24 Feb 1970
TL;DR: In this paper, a thin-film transistor utilizing an insulated gate structure is described, where the semiconducting layer is formed of defect-nickel oxide having the general formula Ni(1-x)O, wherein x is within the range of 10 7 to 10 2.
Abstract: A thin film transistor utilizing an insulated gate structure is described wherein the semiconducting layer is formed of defect-nickel oxide having the general formula Ni(1-x)O, wherein x is within the range of 10 7 to 10 2. In a preferred embodiment, the insulating layer overlying the defect-nickel oxide semiconducting layer is formed of stoichiometric nickel oxide thereby reducing the number of steps required in fabrication. The thin film transistor is fabricated within a single system by utilizing reactive sputtering for the formation of the semiconducting and insulating layers. The sputtering takes place in a pure oxygen atmosphere in the absence of inert gases with the result that the characteristics of the deposited nickel oxide films can be varied by controlling the deposition rate during sputtering.

22 citations


Patent
06 Mar 1970
TL;DR: In this article, the authors present a method of presenting a thin film transitor on a stretch by deploying layers of different materials from different sources at different orientations to the normal.
Abstract: THIS DISCLOSURE IS CONCERNED WITH A METHOD OF PRODUCING A THIN FILM TRANSITOR ON A SUBSTRATE BY EVAPORATING LAYERS OF VARIOUS MATERIALS FROM SOURCES POSITIONED AT VARIOUS ANGLES TO THE SUBSTRATE NORMAL.

16 citations


Patent
30 Mar 1970
TL;DR: In this article, a semiconductor device comprising complementary transistors is described, where both transistors are made in a single island and each include a buried layer, and the NPN transistor uses the buried layer to reduce collector resistance.
Abstract: A semiconductor device comprising complementary transistors is described. Both transistors are made in a single island and each include a buried layer. The PNP transistor uses the buried layer as collector, and the NPN transistor uses the buried layer to reduce collector resistance. The result is a fast-switching NPN transistor.

16 citations


Patent
Rudolf Bauerlein1, Dieter Uhl1
29 Jan 1970
TL;DR: In this paper, the authors proposed a method of increasing the current amplification and the radiation resistance of silicon transistors having a silicon oxide cover layer, where the transistor is first exposed to an ionizing X-ray, gamma or electron radiation of such energy that the silicon oxide layer is penetrated by at least a portion of the radiation, and of a dose between 104 and 109 rad.
Abstract: Method of increasing the current amplification and the radiation resistance of silicon transistors having a silicon oxide cover layer. The transistor is first exposed to an ionizing X-ray, gamma or electron radiation of such energy that the silicon oxide layer is penetrated by at least a portion of the radiation, and of a dose between 104 and 109 rad. The transistor is subsequently subjected to an electric charge, without radiation effect whereby a blocking-layer temperature of about 50* to 250* C. occurs, and the sequence of irradiation and electric charges without radiation is repeated at least once.

14 citations


Patent
01 Oct 1970
TL;DR: In this article, an insulated gate field effect transistor is fabricated by a sequence of steps beginning with the growth and patterning of a thick oxide layer on an n-type silicon wafer.
Abstract: An insulated gate field effect transistor is fabricated by a sequence of steps beginning with the growth and patterning of a thick oxide layer on an n-type silicon wafer. A thin gate-dielectric film is then formed on the exposed silicon surface, followed by deposition and patterning of the gate electrode thereon. The excess gate dielectric is removed, using the electrode as an etch resistant mask, and the wafer is then covered with a boron-doped silane oxide diffusion source for the formation of p-type source and drain regions. The resulting self-aligned and passivated-gate structure is then provided with ohmic contacts to complete the device.

12 citations


Patent
27 Apr 1970
TL;DR: In this article, a high-voltage thin film field effect transistor has increased drain-source electrode separation and increased the insulating layer thickness to avoid breakdown at high voltages.
Abstract: A high-voltage thin film field effect transistor has increased drain-source electrode separation and increased insulating layer thickness to avoid breakdown at high voltages. The insulating layer contains an electron-depleting film and an electron-enhancing film so that the offset voltage may be kept sufficiently low. The surface of the semiconductor layer opposite that in contact with the insulating layer is contacted by an electron-depleting layer to avoid shunt current conduction via this surface.

10 citations


Patent
J Adamic1
23 Sep 1970
TL;DR: In this paper, the surface of the doped silicon is more highly doped between the sources and drains of adjacent transistors than it is at the channel area of the substrate for the several transistors.
Abstract: When several metal oxide insulated gate field effect transistors are put on a doped silicon substrate and the interconnection leads to the transistors run along the surface of the silicon substrate, being insulated therefrom, the silicon material between the source or drain area of the substrate for one transistor and the source or drain of another transistor may act as a channel between such other sources or drains. This channel may be turned on by the voltage applied to the gate connection or lead, causing improper operation of the several transistors. To prevent this, the surface of the doped silicon is more highly doped between the sources and drains of adjacent transistors than it is at the channel area of the substrate for the several transistors. This may be accomplished by applying a doped silicon dioxide or glass over the whole surface of the doped silicon substrate, this doped glass then being removed from the channel areas of the substrate.

Patent
D Page1
05 May 1970
TL;DR: In this article, an electrical circuit for conducting a signal from a high impedance ceramic pick-up cartridge, as used in a phonograph, to a thin film field effect transistor and then to a speaker via a matching transformer is described.
Abstract: This disclosure relates to an electrical circuit for conducting a signal from a high impedance ceramic pick-up cartridge, as is used in a phonograph, to a thin film field effect transistor and then to a speaker via a matching transformer.

Patent
Michael T. Duffy1
28 Oct 1970
TL;DR: In this paper, a method of making an MOS TRANSISTOR having a FILM OF AL2O3 as its gate ELECTrode INSULator, COMPRISING DEPOSITING the OXIDE by a VAPOR DEPOSITION PROCESS, then HEATING the DEPOSITED FILM at a TEMPERATURE OF ABOVE 700*C. in a WET GAS ATMOSPHERE.
Abstract: A METHOD OF MAKING AN MOS TRANSISTOR HAVING A FILM OF AL2O3 AS ITS GATE ELECTRODE INSULATOR, COMPRISING DEPOSITING THE OXIDE BY A VAPOR DEPOSITION PROCESS, THEN HEATING THE DEPOSITED FILM AT A TEMPERATURE OF ABOVE ABOUT 700*C. IN A WET GAS ATMOSPHERE.