Showing papers on "Thin-film transistor published in 1999"

Mechanics of rollable and foldable film-on-foil electronics

Abstract: The mechanics of film-on-foil devices is presented in the context of thin-film transistors on steel and plastic foils Provided the substrates are thin, such transistors function well after the foils are rolled to small radii of curvature When a substrate with a lower elastic modulus is used, smaller radii of curvature can be achieved Furthermore, when the transistors are placed in the neutral surface by sandwiching between a substrate and an encapsulation layer, even smaller radii of curvature can be attained Transistor failure clearly shows when externally forced and thermally induced strains add to, or subtract from, each other

A novel ultrathin elevated channel low-temperature poly-Si TFT

Abstract: A novel ultrathin elevated channel thin-film transistor (UT-ECTFT) made using low-temperature poly-Si is proposed. The structure has an ultrathin channel region (300 /spl Aring/) and a thick drain/source region. The thin channel is connected to the heavily doped drain/source through a lightly doped overlapped region. The lightly doped overlapped region provides an effective way to spread out the electric field at the drain, thereby reducing significantly the lateral electric field there at high drain bias. Thus, the UT-ECTFT exhibits excellent current saturation characteristics even at high bias (V/sub ds/=30 V, V/sub gs/=20 V). Moreover, the UT-ECTFT has more than two times increase in on-state current and 3.5 times reduction in off-state current compared to conventional thick channel TFT's.

Pentacene organic thin-film transistors for circuit and display applications

Abstract: We have fabricated organic thin-film transistors (TFT's) using the small-molecule polycyclic aromatic hydrocarbon pentacene as the active material. Devices were fabricated on glass substrates using low-temperature ion-beam deposited silicon dioxide as the gate dielectric, ion-beam deposited palladium for the source and drain contacts, and vacuum-evaporated pentacene to form the active layer. Excellent electrical characteristics were obtained, including carrier mobility as large as 0.6 cm/sup 2//V-s, on/off current ratio as large as 10/sup 8/, and subthreshold slope as low as 0.7 V/dec, all record values for organic transistors fabricated on nonsingle-crystal substrates.

Solvent-induced phase transition in thermally evaporated pentacene films

Abstract: We report a solvent-induced phase transition in pentacene thin films, from a “thin film” phase to a bulk-like phase. X-ray diffraction indicates that as-deposited thermally evaporated pentacene films consist mainly of (001)-oriented pentacene with an elongated (001) plane spacing of 15.5±0.1 A, and a minor amount with a (001) plane spacing of 14.5±0.1 A. When such films are exposed to solvents such as acetone, isopropanol, or ethanol, the plane spacing of the entire layer shifts abruptly from the elongated (001) plane spacing to the bulk value and this shift is accompanied by a macroscopic change in film morphology. While molecular ordering is maintained as indicated by x-ray diffraction, thin film transistor performance is severely degraded, most likely as a result of the morphological changes in the film.

Failure resistance of amorphous silicon transistors under extreme in-plane strain

Abstract: We have applied strain on thin-film transistors (TFTs) made of hydrogenated amorphous silicon on polyimide foil. In tension, the amorphous layers of the TFT fail by periodic cracks at a strain of ∼0.5%. In compression, the TFTs do not fail when strained by up to 2%, which is the highest value we can set controllably. The amorphous transistor materials can support such large strains because they lack a mechanism for dislocation motion. While the tensile driving force is sufficient to overcome the resistance to crack formation, the compressive failure mechanism of delamination is not activated because of the large delamination length required between transistor layers and polymer substrate.

Technique to obtain increased channel mobilities in NMOS transistors by gate electrode engineering

Abstract: A method of modifying the mobility of a transistor. First, a transistor having a gate is formed. A substance is then implanted in the gate. The transistor is annealed such that the implanted substance forms at least one void in the transistor's gate.

Active matrix display device

Abstract: In an active matrix display device, a circuit including at least five thin film transistors (TFTs) which are provided with an approximately M-shaped semiconductor region for a single pixel electrode and gate lines and a capacitances line which cross the M-shaped semiconductor region, is used as a switching element. Each of the TFT have offset regions and lightly doped drain (LDD) regions. Then, by supplying a selection signal to the gate lines, the TFTs are operated, thereby writing data to the pixel, while a suitable voltage is supplied to the capacitance line, a channel is formed thereunder and it becomes a capacitor. Thus the amount of discharge from the pixel electrode is reduced by the capacitor.

Fast organic thin-film transistor circuits

Abstract: We have fabricated organic thin-film transistors and integrated circuits using pentacene as the active material. Devices were fabricated on glass substrates using low-temperature ion-beam sputtered silicon dioxide as the gate dielectric and a double-layer photoresist process to isolate devices. These transistors have carrier mobility near 0.5 cm/sup 2//V-s and on/off current ratio larger than 10/sup 7/. Using a level-shifting design that allows circuits to operate over a wide range of threshold voltages, we have fabricated ring oscillators with propagation delay below 75 /spl mu/s per stage, limited by the level-shifting circuitry. When driven directly, inverters without level shifting show submicrosecond rise and fall time constants.

Color display apparatus having electroluminescence elements

Abstract: A color display apparatus comprises a substrate; thin film transistors formed on the substrate, each of the thin film transistors having a source electrode and a drain electrode; electroluminescence elements respectively formed over the thin film transistors and driven by the thin film transistors, each of the electroluminescence elements having a cathode connected to a source electrode or drain electrode of a thin film transistor, a luminous element layer, and an anode electrode sequentially disposed thereover. A color filter or fluorescent color conversion layer acting as a color element is formed on the side of the anode electrode of an electroluminescence element. The same luminous layer material is used for each display pixel to display a color image.

Thin-film transistor monolithically integrated with an organic light-emitting diode

Abstract: A device in which one or more thin film transistors are monolithically integrated with a light emitting diode is disclosed. The thin film transistor has an organic semiconductor layer. The light emitting layer of the light emitting diode is also an organic material. The device is fabricated economically by integrating the fabrication of the thin film transistor and the light emitting diode on the substrate and by employing low cost fabrication techniques.

Thin film transistors

Abstract: The specification describes thin film transistor (TFT) devices with source/drain contacts made by a metallo organic deposition (MOD) method wherein a metallo organic compound/metal particulate mixture is deposited to form a base pattern, and the base pattern is then plated with gold. The porous, relatively high resistance base pattern is thereby converted to a corrosion resistant, low resistance contact. The plating covers the sidewalls of the base pattern, thus allowing the final channel length to be less than the minimum design rule used for depositing the base pattern.

Excimer laser annealing of amorphous and solid-phase-crystallized silicon films

Abstract: Very thin (25–50-nm-thick) amorphous silicon (a-Si) films were crystallized into polycrystalline silicon (polysilicon) films by the combination of low temperature solid phase crystallization (SPC) and subsequent excimer laser annealing (ELA). These films are, then, subjected to a standard low temperature process (<600 °C) of thin film transistor (TFT) fabrication. The performance of resultant TFTs was compared to those fabricated on polysilicon films obtained by simple excimer laser annealing of amorphous silicon films. The electrical characteristics of the TFTs were correlated with the structural characteristics of the polysilicon films, using transmission electron microscopy and x-ray diffraction as analytical tools. The polysilicon films obtained by the SPC process consist of large and heavily defected crystalline grains. These defects, however, could be eliminated by melting and solidifying the polysilicon films during the ELA process. As a result, the electrical properties of the 50-nm-thick polysili...

Method of increasing the mobility of MOS transistors by use of localized stress regions

Abstract: A method of modifying the mobility of a transistor. First, a substance is implanted into a substrate. The substrate is then annealed such that the implanted substance forms at least one void in the substrate. Then, a transistor is formed on the substrate.

Method of separating thin film device, method of transferring thin film device, thin film device, active matrix substrate and liquid crystal display device

Abstract: A separation layer (120) is provided on a substrate (100), and a thin film device (140) such as TFT is formed thereon. Separation accelerating ions such as hydrogen ions are implanted into the separation layer (120) in the course of the process for forming the thin film device (140). After the formation of the thin film device (140), the thin film device (140) is preferably joined to a transfer material (180) through an adhesive layer (160), and irradiated with laser light from the substrate side. This causes separation in the separation layer (120) by using also the action of the separation accelerating ions. The thin film device (140) is separated from the substrate (100). This permits transfer of a desired thin film device to any substrate.

Color electroluminescence display device

Abstract: An electroluminescence display device is provided in which a plurality of pixels are arranged in row and column directions, including: a gate line extending in the row direction; a first thin film transistor whose gate is connected to the gate line; a drain line extending in the column direction; a capacitor connected to the drain line via the first thin film transistor; a second thin film transistor whose control electrode is connected to the capacitor; and an EL element connected to a supply line via the second thin film transistor and having a luminescent layer between an anode and a cathode. The first thin film transistor is disposed in a region between the gate line and the capacitor.

Low-temperature polysilicon thin-film transistor driving with integrated driver for high-resolution light emitting polymer display

Abstract: A high-resolution low-temperature polysilicon thin-film transistor driven light emitting polymer display (LT p-Si TFT LEPD) with integrated drivers has been developed. We adopted conductance control of the TFT and optimized design and voltage in order to achieve good gray scale and simple pixel circuit. A p-channel TFT is used in order to guarantee reliability in dc bias. An inter-layer reduces parasitic capacitance of bus lines. Because of the combination of the LT p-Si TFT and LEP, the display is thin, compact, and lightweight, as well as having low power consumption, wide viewing angle, and fast response.

Semiconductor device having deposited silicon regions and a method of fabrication

Abstract: The present invention describes an MOS device having deposited silicon regions and its a method of fabrication. In one embodiment of the present invention a substrate having a thin oxide layer formed on a silicon surface is heated and exposed to an ambient comprising germane (GeH4) to remove the thin oxide from the silicon surface. A silicon or silicon alloy film can then be deposited onto the silicon surface of the substrate.

Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications

Abstract: We report on 100-nm channel-length thin-film transistors (TFTs) that are fabricated using germanium-seeded lateral crystallization of amorphous silicon. Germanium seeding allows the fabrication of devices with control over grain boundary location. Its effectiveness improves with reduced device geometry, allowing "single-grain" device fabrication. In the first application of this technology to deep submicron devices, we report on 100-nm devices having excellent performance compared to conventional TFTs, which have randomly located grains. Devices have on-off ratio >10/sup 6/ and subthreshold slope of 107 mV/decade, attesting to the suitability of germanium-seeding for the fabrication of high-performance TFTs, suitable for use in vertically integrated three-dimensional (3-D) circuits.

Thin film transistor and display

Abstract: A gate electrode (2), a gate insulating film (3), and an active layer (4) made of a poly silicon film and having a source (5), a channel (7), and a drain (6) are formed on an insulating substrate (1) and an interlayer insulating film (9) is formed over the whole of the gate insulating film (3), the active layer (4), and a stopper insulating film (8). A drain electrode (10) is formed by filling a contact hole made in the interlayer insulating film (9), the position of which corresponds to the drain (6), with a metal, such as Al. Simultaneously with the drain electrode (10), a conductive layer (11) is formed on the interlayer insulating film (9) over the channel (7). The conductive layer (11) is connected to gate signal line G on the insulating substrate (1) via a contact hole (15) made in the gate insulating film (3) and the interlayer insulating film (9). The width of the conductive layer (11) along the length of the channel (7) is narrower than the actual length of the channel (7) and narrower than the width along the channel length of the gate electrode (2). The conductive layer (11) can therefore shield the channel (7). As a result, even if impurities or the like become attached to the surface of the interlayer insulating film (9), the occurrence of a back channel, for example, is reliably prevented.

Thin-film transistor circuitry with reduced sensitivity to variance in transistor threshold voltage

Abstract: A circuit design technique polysilicon thin-film transistor (TFT) circuitry produces circuits that are relatively less sensitive to threshold variations among the TFT's than circuits designed using conventional techniques. The circuit is designed such that thin-film transistors that are sensitive to threshold variations are made larger than other thin-film transistors in the circuitry to minimize threshold variations among similar transistors implemented in the circuit. In one embodiment, a pixel structure for an active matrix display device implemented in polysilicon includes two transistors, a select transistor and a drive transistor. The drive transistor in the pixel structure is a thin film metal oxide silicon (MOS) transistor that includes a gate to source capacitance sufficient to hold an electrical potential which keeps the transistor in a conducting state for an image field interval. One embodiment of the pixel structure includes only the select transistor and the drive transistor. The pixel storage capacitance is entirely realized by the gate to source capacitance of the drive transistor. Another embodiment of the pixel structure includes a capacitor which is much smaller than the capacitor of a conventional active matrix pixel structure. This capacitor holds the pixel in a non-illuminated state when the drive transistor is turned off. This pixel structure may be used with any display technology that uses an active matrix and stores image data on a capacitance in the pixel, including without limitation, organic light emitting diodes, electroluminescent devices, and inorganic light emitting diodes.

Plasma-assisted chemical vapor deposition of dielectric thin films for ULSI semiconductor circuits

Abstract: Plasma-assisted deposition of thin films is widely used in microelectronic circuit manufacturing. Materials deposited include conductors such as tungsten, copper, aluminum, transition-metal silicides, and refractory metals, semiconductors such as gallium arsenide, epitaxial and polycrystalline silicon, and dielectrics such as silicon oxide, silicon nitride, and silicon oxynitride. This paper reviews plasma-assisted chemical vapor deposition (CVD) applications and techniques for dielectric thin films. In particular, we focus on the integration, process, and reliability requirements for dielectric films used for isolation, passivation, barrier, and antireflectivecoating applications in ultralargescale integrated (ULSI) semiconductor circuits. In addition, manufacturing issues and considerations for further work are discussed.

Electro-optical device having silicon nitride interlayer insulating film

Abstract: Using thin film transistors (TFTs), an active matrix circuit, a driver circuit for driving the active matrix circuit or the like are formed on one substrate. Circuits such as a central processing unit (CPU) and a memory, necessary to drive an electric device, are formed using single crystalline semiconductor integrated circuit chips. After the semiconductor integrated circuit chips are adhered to the substrate, the chips are connected with wirings formed on the substrate by a chip on glass (COG) method, a wire bonding method or the like, to manufacture the electric device having a liquid crystal display (LCD) on one substrate.

Semiconductor device and manufacturing method thereof

Abstract: A semiconductor device in accordance with the present invention, for example, is a thin film transistor provided on a transparent substrate. The semiconductor device made of a polysilicon film is provided with (1) a semiconductor layer having a source region and a drain region and (2) a gate electrode provided on a region between the source region and the drain region of the semiconductor layer via a gate insulating film. The semiconductor device is further provided with an organic insulating film made of a condensation polymer having an imide ring such that the organic insulating film covers the gate electrode, the source region, and the drain region. The organic insulating film is formed by applying an organic insulating material such as polyimide, polyamic acid, and other materials, and thereafter by carrying out a calcining process, thereby reducing a trap density of the polysilicon film constituting the semiconductor layer without lowering the productivity due to low throughput, and realizing a semiconductor device which can be suitably adopted as a thin film transistor constituting a matrix circuit section of an active-matrix type liquid crystal display device.

Amorphous silicon thin-film transistors on compliant polyimide foil substrates

Abstract: Much of the mechanical strain in semiconductor devices can be relieved when they are made on compliant substrates. We demonstrate this strain relief with amorphous silicon thin-film transistors made on 25-/spl mu/m thick polyimide foil, which can be bent to radii of curvature R down to 0.5 mm without substantial change in electrical characteristics.

Low temperature thin film transistor fabrication

Abstract: The invention broadens the range of materials and processes that are available for Thin Film Transistor (TFT) devices by providing in the device structure an organic semiconductor layer that is in contact with an inorganic mixed oxide gate insulator involving room temperature processing at up to 150 degrees C. A TFT of the invention has a pentacene semiconductor layer in contact with a barium zirconate titanate gate oxide layer formed on a polycarbonate transparent substrate employing at least one of the techniques of sputtering, evaporation and laser ablation.

Process for fabricating integrated circuit devices having thin film transistors

Abstract: A process for fabricating an integrated circuit device is disclosed. The integrated circuit has a plurality of TFTs and an electrical interconnect structure. In the process, at least some constituents of the TFTs are formed on a first substrate. At least the interconnect structure is formed on a second substrate. The two substrates are laminated together to form the integrated circuit device having fully formed TFTs.

Material and method for printing high conductivity electrical conductors and other components on thin film transistor arrays

Abstract: A process sequence is disclosed for fabricating arrays of Thin Film Transistors by printing metallic conductors for the gate and data lines and possibly the Indium Tin Oxide Pixel electrode as well. The process eliminates conventional step-and-repeat photolithographic patterning, and provides high conductivity metallization for large arrays. These arrays may be used in displays, detectors and scanners.

Semiconductor device and method for fabricating the same

Abstract: In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer. Accordingly, high resistance impurity regions are formed in both sides of a channel forming region.

a-Silicon (a-Si)

Abstract: Optical properties of amorphous silicon (a-Si) depend strongly on preparation techniques and conditions. Structural studies suggested that a-Si films contain microvoids on the order of 5–10 A [1]. These structural defects give rise to a large density of states in the gap of the semiconductor. It has, however, been found [2] that hydrogen incorporation reduces the density of defect states by orders of magnitude with corresponding changes in the optical, transport, and recombination properties. Hydrogen incorporation has been found to have quite dramatic effects in amorphous Si, i.e., it makes possible to obtain n- and P-type materials and thus pn junctions [3,4]. Since then, hydrogenated amorphous Si (a-Si:H) has received much attention as a promising material for wider application to electronic devices, such as low-cost solar cells, thin film transistors, and imaging devices [5].