Showing papers on "Thin-film transistor published in 2006"

Amorphous Oxide Semiconductors for High-Performance Flexible Thin-Film Transistors

Abstract: Recently, we have demonstrated the potential of amorphous oxide semiconductors (AOSs) for developing flexible thin-film transistors (TFTs). A material exploration of AOSs desired as the channel layer in TFTs is most important for developing high-performance devices. Here, we report our concept of material exploration for AOSs in high-performance flexible and transparent TFTs from the viewpoints of chemical bonding and electronic structure in oxide semiconductors. We find that amorphous In–Ga–Zn–O (a-IGZO) exhibits good carrier transport properties such as reasonably high Hall mobilities (>10 cm2V-1s-1) and a good controllability of carrier concentration from <1015 to 1020 cm-3. In addition, a-IGZO films have better chemical stabilities in ambient atmosphere and at temperatures up to 500 °C. The flexible and transparent TFT fabricated using a-IGZO channel layer at room temperature operated with excellent performances, such as normally-off characteristics, on/off current ratios (~106) and field-effect mobilities (~10 cm2V-1s-1), which are higher by an order of magnitude than those of amorphous Si:H and organics TFTs.

High-mobility thin-film transistor with amorphous InGaZnO4 channel fabricated by room temperature rf-magnetron sputtering

Abstract: Thin-film transistors (TFTs) were fabricated using amorphous indium gallium zinc oxide (a-IGZO) channels by rf-magnetron sputtering at room temperature. The conductivity of the a-IGZO films was controlled from ∼10−3to10−6Scm−1 by varying the mixing ratio of sputtering gases, O2∕(O2+Ar), from ∼3.1% to 3.7%. The top-gate-type TFTs operated in n-type enhancement mode with a field-effect mobility of 12cm2V−1s−1, an on-off current ratio of ∼108, and a subthreshold gate voltage swing of 0.2Vdecade−1. It is demonstrated that a-IGZO is an appropriate semiconductor material to produce high-mobility TFTs at low temperatures applicable to flexible substrates by a production-compatible means.

Method for making electronic devices using metal oxide nanoparticles

Abstract: A method of making a thin film transistor comprises (a) solution depositing a dispersion comprising semiconducting metal oxide nanoparticles onto a substrate, (b) sintering the nanoparticles to form a semiconductor layer, and (c) optionally subjecting the resulting semiconductor layer to post-deposition processing.

Field-effect transistor including transparent oxide and light-shielding member, and display utilizing the transistor

Abstract: A field-effect transistor includes a substrate, a source electrode, a drain electrode, a gate electrode, a gate-insulating film, and an active layer. The active layer contains an oxide having a transmittance of 70% or more in the wavelength range of 400 to 800 nm. A light-shielding member is provided as a light-shielding structure for the active layer, for example, on the bottom face of the substrate.

Oxide semiconductor thin film transistor and method of manufacturing the same

Abstract: Provided is a thin film transistor comprising a channel layer comprised of an oxide semiconductor containing In, M, Zn, and O, M including at least one selected from the group consisting of Ga, Al, and Fe. The channel layer is covered with a protective film.

Low voltage flexible organic/transparent transistor for selective gas sensing, photodetecting and CMOS device applications

Abstract: A thin film transistor (TFT) includes a source electrode, a drain electrode, and a gate electrode. A gate insulator is coupled to the source electrode, drain electrode, and gate electrode. The gate insulator includes room temperature deposited high-K materials so as to allow said thin film transistor to operate at low operating voltage.

Thin-film transistor and thin-film diode having amorphous-oxide semiconductor layer

Abstract: A thin-film transistor including a channel layer being formed of an oxide semiconductor transparent to visible light and having a refractive index of nx, a gate-insulating layer disposed on one face of the channel layer, and a transparent layer disposed on the other face of the channel layer and having a refractive index of nt, where there is a relationship of nx>nt. A thin-film transistor including a substrate having a refractive index of no, a transparent layer disposed on the substrate and having a refractive index of nt, and a channel layer disposed on the transparent layer and having a refractive index of nx, where there is a relationship of nx>nt>no.

Thin film transistor having oxide semiconductor layer and manufacturing method thereof

Abstract: A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.

Ionic amorphous oxide semiconductors: Material design, carrier transport, and device application

Abstract: Recently we have reported the room temperature fabrication of transparent and flexible thin film transistors on a polyethylene terephthalate (PET) film substrate using an ionic amorphous oxide semiconductor (IAOS) in an In2O3–ZnO–Ga2O3 system. These transistors exhibit a field effect mobility of ∼10 cm2 (V s)−1, which is higher by an order of magnitude than those of hydrogenated amorphous Si and pentacene transistors. This article describes a chemical design concept of IAOS, and its unique electron transport properties, and electronic structure, by comparing them with those of conventional amorphous semiconductors. High potential of IAOS for flexible electronics is addressed.

Highly oriented crystals at the buried interface in polythiophene thin-film transistors

Abstract: Thin films of polymer semiconductors are being intensively investigated for large-area electronics applications such as light-emitting diodes, photovoltaic cells and thin-film transistors. Understanding the relationship between film morphology and charge transport is key to improving the performance of thin-film transistors. Here we use X-ray diffraction rocking curves to provide direct evidence for highly oriented crystals at the critical buried interface between the polymer and the dielectric where the current flows in thin-film transistors. Treating the substrate surface with self-assembled monolayers significantly varies the concentration of these crystals. We show that the polymer morphology at the buried interface can be different from that in the bulk of the thin films, and provide insight into the processes that limit charge transport in polythiophene films. These results are used to build a more complete model of the relationship between chain packing in polymer thin-films and charge transport.

All-organic active matrix flexible display

Abstract: We have fabricated pentacene organic thin-film transistor (OTFT) driven active matrix organic light-emitting diode (OLED) displays on flexible polyethylene terephthalete substrates These displays have 48×48 bottom-emission OLED pixels with two pentacene OTFTs used per pixel Parylene is used to isolate the OTFTs and OLEDs with good OTFT yield and uniformity

Realization of a silicon nanowire vertical surround-gate field-effect transistor.

Abstract: Semiconducting nanowires have recently attracted considerable attention. With their unique electrical and optical properties, they offer interesting perspectives for basic research as well as for technology. A variety of technical applications, such as nanowires as parts of sensors, and electronic and photonic devices have already been demonstrated. In particular, electronic applications come more and more into focus, as the ongoing miniaturization in microelectronics demands new innovative solutions. Semiconducting nanowires, in particular epitaxially grown silicon (Si) nanowires, are considered as promising candidates for post-CMOS (CMOS: complementary metal–oxide semiconductor) logic elements owing to their potential compatibility with existing CMOS technology. One major advantage of vapor–liquid– solid(VLS-) grown nanowires compared to top-down fabricated devices is that they have well-defined surfaces. This reduces surface scattering, an issue which becomes important for devices on the nanoscale. Moreover, epitaxially grown nanowires circumvent the problem of handling and positioning nanometer-sized objects that arises in the conventional pick-and-place approach, where devices are fabricated by manipulating horizontally lying VLS-grown nanowires. The first step towards a technical realization of a nanowire logic element is the design and manufacturing of a nanowire transistor. The epitaxial growth of vertical nanowires offers advantages over other approaches: For example, the transistor gate can be wrapped around the vertically oriented nanowire. Such a wrapped-around gate allows better electrostatic gate control of the conducting channel and offers the potential to drive more current per device area than is possible in a conventional planar architecture. In this Communication, a generic process for fabricating a vertical surround-gate field-effect transistor (VS-FET) based on epitaxially grown nanowires is described. Exemplarily, we used Si nanowires and present a first electrical characterization proving the feasibility of the process developed and the basic functionality of this device. Figure 1a shows a schematic cross section through a conventional p-type MOSFET. In such a device, an inversion channel can be created close to the gate by applying a negative gate voltage. This forms a conducting channel that connects the p-doped regions between the source and drain contacts electrically. Using this concept, a silicon nanowire VS-FET would ideally require a nanowire that is n-doped in the region of the gate and p-doped elsewhere. Unfortunately, such a p-n-p structure with abrupt transitions appears difficult to realize if the nanowires are grown by means of the vapor–liquid–solid mechanism using gold as a catalyst. The difficulty here is that the dopant atoms, which are dissolved in the catalyst droplet, might act as a reservoir, thus creating a graded transition when switching to another dopant. Therefore, we used a structure consisting of an n-doped silicon nanowire grown on a p-type substrate (see Figure 1b). If the gate–drain and gate–source distances are not too long, it is electrostatically still possible to create an inversion channel along the length of the entire wire. In the proposed configuration, the p–n junction at the source contact (Figure 1a) is replaced by a Au/n-Si Schottky contact at the nanowire tip. In order to investigate the influence of the Au/n-Si Schottky contact on the nanowire (current–voltage) I–V characteristics, an array of n-doped nanowires vertically grown on an n-type (111)-oriented substrate was imbedded in a spin-coated SiO2 matrix. After removing the thin SiO2 coverage from the Au tips by a short reactive ion etching, contacts 0.6 mm in size were defined by evaporating aluminum onto the sample, such that approximately 10 nanowires were contacted in parallel. The temperature-dependent measurements (shown in Figure 2) were performed by applying a voltage to the Si substrate, while the Al top contact was held at a constant potential. The measurements reveal a strong rectifying behavior with a thermally activated current possessing an activation energy of 0.6 eV. This can be explained by the Au/n-Si Schottky contact dominating the I–V behavior. The fact that the Schottky contact is forward-biased for negative voltages furthermore proves that, as expected, electrons act as majority charge carries. Figure 1. Schematics of a) a conventional p-channel MOSFET and b) a silicon nanowire vertical surround-gate field-effect transistor.

Solution-processed silicon films and transistors.

Abstract: The manufacture of silicon semiconductor devices involves complicated photolithography and expensive machinery, so many researchers are seeking alternative semiconductor materials that can be handled by simple processes such as spin-coating or printing. Organic semiconductors are the most promising candidates but they still lack performance and reliability. Shimoda et al. have taken a different approach, printing a silicon transistor itself, not a substitute. They successfully fabricated polycrystalline silicon transistors by spin-coating a novel liquid precursor. This solution-based approach can also be adapted for ‘ink-jet’ printing of transistors. The development of a process whereby silicon can be prepared from a liquid allows the printing of semiconductor devices directly from solution. The use of solution processes—as opposed to conventional vacuum processes and vapour-phase deposition—for the fabrication of electronic devices has received considerable attention for a wide range of applications1,2,3,4,5,6,7, with a view to reducing processing costs. In particular, the ability to print semiconductor devices using liquid-phase materials could prove essential for some envisaged applications, such as large-area flexible displays. Recent research in this area has largely been focused on organic semiconductors8,9,10,11, some of which have mobilities comparable to that of amorphous silicon11 (a-Si); but issues of reliability remain. Solution processing of metal chalcogenide semiconductors to fabricate stable and high-performance transistors has also been reported12,13. This class of materials is being explored as a possible substitute for silicon, given the complex and expensive manufacturing processes required to fabricate devices from the latter. However, if high-quality silicon films could be prepared by a solution process, this situation might change drastically. Here we demonstrate the solution processing of silicon thin-film transistors (TFTs) using a silane-based liquid precursor. Using this precursor, we have prepared polycrystalline silicon (poly-Si) films by both spin-coating and ink-jet printing, from which we fabricate TFTs with mobilities of 108 cm2 V-1 s-1 and 6.5 cm2 V-1 s-1, respectively. Although the processing conditions have yet to be optimized, these mobilities are already greater than those that have been achieved in solution-processed organic TFTs, and they exceed those of a-Si TFTs (≤ 1 cm2 V-1 s-1).

Highly bendable, transparent thin-film transistors that use carbon-nanotube-based conductors and semiconductors with elastomeric dielectrics

Abstract: We report the use of networks of single-walled carbon nanotubes (SWNTs) with high and moderate coverages (measured as number of tubes per unit area) for all of the conducting (i.e., source, drain, and gate electrodes) and semiconducting layers, respectively, of a type of transparent, mechanically flexible, thin-film transistor (TFT). The devices are fabricated on plastic substrates using layer-by-layer transfer printing of SWNT networks grown using optimized chemical vapor deposition (CVD) procedures. The unique properties of the SWNT networks lead to electrical (e.g., good performance on plastic), optical (e.g., transparent at visible wavelengths), and mechanical (e.g., extremely bendable) characteristics in this “all-tube” TFT that would be difficult, or impossible, to achieve with conventional materials.

Towards See-Through Displays: Fully Transparent Thin-Film Transistors Driving Transparent Organic Light-Emitting Diodes**

Abstract: Fully transparent computer displays have, until now, been the vision of science-fiction movies. Nevertheless, there are numerous applications for these devices ranging, for example, from head-mounted displays to their integration in automotive windshields. In this paper we demonstrate that this vision is on the verge of becoming reality. The realization of entirely transparent displays requires both transparent light-emitting devices, in our case organic light-emitting diodes (OLEDs) with transparent contacts, and a driving scheme based on transparent thin-film transistors (TTFTs). Since the early reports on electroluminescence from multilayer, thin-film devices composed of vacuum-sublimed small organic molecules [1] and spin-coated conjugated polymers, [2] substantial research has been devoted to the improvement of device efficiencies, color purity, and lifetime. Incitement of this development is the potential use of OLEDs in future commercial flat-panel displays. OLEDs usually consist of a layer sequence of organic functional materials (charge transporters/blockers/emitters) with an overall thickness of the order of 100 nm. Most of these materials absorb light in the deep-blue or ultraviolet spectral region and are nearly transparent in the visible part of the spectrum. Organic layers applied to emit visible light are often based on so-called guest–host systems, in which a wide-bandgap host material (absorbing in the UVonly) is doped with a few weight percent of a light-emitting dye. [3] As a result, the emitting layer appears transparent. Transparent conductive oxides, most prominently indium tin oxide (ITO) and aluminum-doped ZnO (AZO), may be used as electrical contacts to OLEDs. Therefore, OLEDs seem to be promising devices for the realization of entirely transparent visible-light emitters. [4–6] OLED displays driven in passive-matrix mode are based on conventional bottom-emitting OLEDs and are considered as an approach to fabricate small-sized, low-information-content displays with moderate pixel counts. To accomplish largerarea, high-resolution OLED displays an active-matrix-addressing scheme has been suggested. [7] Conventional a-Si:H or poly-Si TFT backplanes are not suitable as drivers for transparent displays because they are opaque in the visible part of the spectrum. Putting pixels and transistors next to each other would compromise the displays’ fill factor. Organic field-effect transistors (OFETs) as pixel drivers for OLEDs have been discussed by Sirringhaus et al. [8] Transparent OFETs have also been reported. [9] However, their performance is still poor; transparent active pixels using OFETs have not yet been demonstrated. Therefore, in this paper we focus on the production of TTFTs based on the wide-bandgap oxide semiconductor zinc tin oxide (ZnO)x(SnO2)1–x ,a s a viable alternative to previously fabricated devices. Recently, research on TTFTs with channels made from ox

Liquid Crystal Display Device and Method for Fabricating the Same

Abstract: A liquid crystal display (LCD) device includes an array substrate; a gate line formed on the array substrate; a data line formed on the array substrate crossing the gate lines; a thin film transistor formed on the array substrate, the thin film transistor being formed at an intersection between the gate line and the data line; a pixel electrode formed on the array substrate and connected to the thin film transistor; an insulating interlayer formed on an entire surface of the array substrate; a common electrode formed on the insulating interlayer and having a plurality of slits; a metal line formed on the insulating interlayer overlapping the data line and the common electrode; a color filter substrate attached to the array substrate; and a liquid crystal layer formed between the array substrate and the color filter substrate.

High-performance ZnO thin-film transistors on gate dielectrics grown by atomic layer deposition

Abstract: We fabricated high-performance ZnO thin-film transistors on gate dielectrics of HfO2, HfSiOx, and Al2O3, grown by atomic layer deposition (ALD). Devices on HfO2 had a mobility of 12.2cm2∕Vs with a threshold voltage of 2.6V and subthreshold slope of 0.5V∕decade. Device performance on Al2O3 depended on synthesis temperature. For 100nm thick Al2O3, synthesized at 200°C, ZnO devices had a mobility of 17.6cm2∕Vs with a threshold voltage of 6V and less than ∼0.1nA gate leakage at 20V. The overall trends were that devices on Hf oxides had a lower threshold voltage, while the gate leakage current density was lower on Al2O3. Device characteristics for all ALD dielectrics exhibited negligibly small hysteresis, suggesting a low defect density at the interface of ZnO with the gate dielectric.

High mobility n-type thin-film transistors based on N,N′-ditridecyl perylene diimide with thermal treatments

Abstract: The authors demonstrated that N,N′-ditridecyl-3,4,9,10-perylenetetracarboxylic diimide (PTCDI-C13) thin-film transistors (TFTs) exhibited high field-effect electron mobility of 2.1cm2∕Vs by just annealing at an adequate temperature (140°C) after the TFT fabrications. While PTCDI-C13 formed c-axis oriented thin films, the thermal treatments improved crystallinity of the thin films as revealed by x-ray diffraction. The thermal treatment also affected thin-film morphologies; the morphologies changed from oval ball-like grains to flat and large tilelike grains, which had molecular height steps and whose size reached several micrometers.

Improved organic thin-film transistor performance using novel self-assembled monolayers

Abstract: Pentacene-based organic thin-film transistors have been fabricated using a phosphonate-linked anthracene self-assembled monolayer as a buffer between the silicon dioxide gate dielectric and the active pentacene channel region. Vast improvements in the subthreshold slope and threshold voltage are observed compared to control devices fabricated without the buffer. Both observations are consistent with a greatly reduced density of charge trapping states at the semiconductor-dielectric interface effected by introduction of the self-assembled monolayer.

Backplanes for display applications, and components for use therein

Abstract: A thin-film transistor includes a gate electrode having a first gate electrode edge and a second gate electrode edge opposite the first gate electrode edge. The TFT also includes a drain electrode having a first drain electrode edge that overlaps the first gate electrode edge, and a second drain electrode edge that overlaps the second gate electrode edge. A method for fabricating a diode array for use in a display includes deposition of a conductive layer adjacent to a substrate, deposition of a doped semiconductor layer adjacent to the substrate, and deposition of an undoped semiconductor layer adjacent to the substrate. A display pixel unit provides reduced capacitative coupling between a pixel electrode and a source line. The unit includes a transistor, the pixel electrode, and the source line. The source line includes an extension that provides a source for the transistor. A patterned conductive portion is disposed adjacent to the source line. Another display pixel unit provides reduced pixel electrode voltage shifts. The unit includes a transistor, a pixel electrode, a source line and a balance line. The invention also provides a driver for driving a display provided with such a balance line.

Field effect transistor using amorphous oxide film as channel layer, manufacturing method of field effect transistor using amorphous oxide film as channel layer, and manufacturing method of amorphous oxide film

Abstract: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like. Furthermore, as a method for manufacturing a channel layer made of an amorphous oxide, film formation is performed in an atmosphere containing a hydrogen gas and an oxygen gas, so that the carrier concentration of the amorphous oxide can be controlled.

Influence of the semiconductor thickness on the electrical properties of transparent TFTs based on indium zinc oxide

Abstract: Multicomponent amorphous oxides are starting to emerge as a class of appealing semiconductor materials for application in transparent electronics. In this work, a high performance bottom-gate n-type transparent thin-film transistors are reported, being the discussion primarily focused on the influence of the indium zinc oxide active layer thickness on the properties of the devices. For this purpose, transparent transistors with active layer thicknesses ranging from 15 nm to 60 nm were produced at room temperature using rf magnetron sputtering. Optical transmittance data in the visible range reveals average transmittance higher than 80%, including the glass substrate. The devices work in the enhancement mode and exhibit excellent saturation drain currents. On–off ratios above 107 are achieved, but this value tends to be lower for devices with thicker semiconductor films, as a result of the decrease in the resistance of the channel region with increasing thickness. Channel mobilities are also quite respectable, with some devices presenting values around 40 cm2/V s, even without any annealing or other post-deposition improvement processes. Concerning the evolution of threshold voltage with the thickness, this work shows that it increases from about 3 V in thicker films up to about 10 V in the thinnest ones. The interesting electrical properties obtained and the versatility arising from the fact that it is possible to modify them changing only the thickness of the semiconductor makes this new transparent transistors quite promising for future transparent ICs.

High-mobility amorphous In2O3–10wt%ZnO thin film transistors

Abstract: The authors report on the fabrication and characterization of thin film transistors that use sputter deposited amorphous indium zinc oxide both for the channel and source-drain metallizations in a gate-down configuration. The channel and source-drain layers were deposited from a single In2O3–10wt%ZnO ceramic target using dc magnetron sputtering onto an unheated substrate. The carrier densities in the channel (2.1×1017∕cm3) and source/drain regions (3.3×1020∕cm3) were adjusted by changing the reactive oxygen content in the sputter chamber during deposition. The resulting transistors operate as depletion mode n-channel field effect devices with saturation mobility of 20cm2∕Vs and on/off current ratio of 108.

Radio frequency rectifiers based on organic thin-film transistors

Abstract: One important technical hurdle that has to be overcome for using organic transistors in radio-frequency identification tags is for these devices to operate at rf frequencies (typically 13.56MHz) in the front end. It was long thought that organic transistors are too slow for this. In this letter we show that organic transistor based full-wave rectifier circuits utilizing pentacene, a p-channel organic semiconductor, can operate at this frequency with a useful efficiency. In order to achieve such high-frequency operation, we make use of the nonquasistatic state of the transistors.

Mechanically flexible thin-film transistors that use ultrathin ribbons of silicon derived from bulk wafers

Abstract: This letter introduces a type of thin-film transistor that uses aligned arrays of thin (submicron) ribbons of single-crystal silicon created by lithographic patterning and anisotropic etching of bulk silicon (111) wafers. Devices that incorporate such ribbons printed onto thin plastic substrates show good electrical properties and mechanical flexibility. Effective device mobilities, as evaluated in the linear regime, were as high as 360cm2V−1s−1, and on/off ratios were >103. These results may represent important steps toward a low-cost approach to large-area, high-performance, mechanically flexible electronic systems for structural health monitors, sensors, displays, and other applications.

Integrated circuit and method for its manufacture

Abstract: An integrated circuit and methods for its manufacture are provided. The integrated circuit (20) comprises a bulk silicon substrate (24) having a first region (64, 66) of (100) crystalline orientation and a second region (66, 64) of (110) crystalline orientation. A layer (62) of silicon on insulator overlies a portion of the bulk silicon substrate. At least one field effect transistor (96, 98) is formed in the layer (62) of silicon on insulator, at least one P-channel field effect transistor (90, 92) is formed in the second region (66, 64) of (110) crystalline orientation, and at least one N-channel field effect transistor (90, 92) is formed in the first region (64, 66) of (100) crystalline orientation.

High-speed mechanically flexible single-crystal silicon thin-film transistors on plastic substrates

Abstract: This letter describes the fabrication and properties of bendable single-crystal-silicon thin film transistors formed on plastic substrates. These devices use ultrathin single-crystal silicon ribbons for the semiconductor, with optimized device layouts and low-temperature gate dielectrics. The level of performance that can be achieved approaches that of traditional silicon transistors on rigid bulk wafers: effective mobilities>500cm/sup 2//V/spl middot/s, ON/OFF ratios >10/sup 5/, and response frequencies > 500 MHz at channel lengths of 2 /spl mu/m. This type of device might provide a promising route to flexible digital circuits for classes of applications whose performance requirements cannot be satisfied with organic semiconductors, amorphous silicon, or other related approaches.

Film and contact resistance in pentacene thin-film transistors: Dependence on film thickness, electrode geometry, and correlation with hole mobility

Abstract: We describe variable temperature contact resistance measurements on pentacene organic thin-film transistors via a gated four-probe technique. The transistors consist of Au source and drain electrodes contacting a pentacene film deposited on a dielectric/gate electrode assembly. Additional voltage sensing leads penetrating into the source-drain channel were used to monitor potentials in the pentacene film while passing current between the source and drain electrodes during gate voltage sweeps. Using this device structure, we investigated contact resistance as a function of film thickness (60–3000A), deposition temperature (25 or 80°C), gate voltage, electrode geometry (top or bottom contact), and temperature. Contact resistance values were approximately 2×103–7×106Ωcm, depending on film thickness. In the temperature range of 77–295K, the contact resistance displayed activated behavior with activation energies of 15–160meV. Importantly, it was observed that the activation energies for the source and drain r...

Flexible ferroelectret field-effect transistor for large-area sensor skins and microphones

Abstract: Ferroelectrets generate an electric field large enough to modulate the conductance of the source-drain channel of a thin-film field-effect transistor. Integrating a ferroelectret with a thin-film transistor produces a ferroelectret field-effect transistor. The authors made such transistors by laminating cellular polypropylene films and amorphous silicon thin-film transistors on polyimide substrates. They show that these ferrroelectret field-effect transistors respond in a static capacitive or dynamic piezoelectric mode. A touch sensor, a pressure-activated switch, and a microphone are demonstrated. The structure can be scaled up to large-area flexible transducer arrays, such as roll-up steerable compliant sensor skin.