Showing papers on "Thin-film transistor published in 2022"

Vertical MoS2 transistors with sub-1-nm gate lengths

Abstract: Ultra-scaled transistors are of interest in the development of next-generation electronic devices1-3. Although atomically thin molybdenum disulfide (MoS2) transistors have been reported4, the fabrication of devices with gate lengths below 1 nm has been challenging5. Here we demonstrate side-wall MoS2 transistors with an atomically thin channel and a physical gate length of sub-1 nm using the edge of a graphene layer as the gate electrode. The approach uses large-area graphene and MoS2 films grown by chemical vapour deposition for the fabrication of side-wall transistors on a 2-inch wafer. These devices have On/Off ratios up to 1.02 × 105 and subthreshold swing values down to 117 mV dec-1. Simulation results indicate that the MoS2 side-wall effective channel length approaches 0.34 nm in the On state and 4.54 nm in the Off state. This work can promote Moore's law of the scaling down of transistors for next-generation electronics.

High-mobility hydrogenated polycrystalline In2O3 (In2O3:H) thin-film transistors

Abstract: Oxide semiconductors have been extensively studied as active channel layers of thin-film transistors (TFTs) for electronic applications. However, the field-effect mobility (μFE) of oxide TFTs is not sufficiently high to compete with that of low-temperature-processed polycrystalline-Si TFTs (50-100 cm2V-1s-1). Here, we propose a simple process to obtain high-performance TFTs, namely hydrogenated polycrystalline In2O3 (In2O3:H) TFTs grown via the low-temperature solid-phase crystallization (SPC) process. In2O3:H TFTs fabricated at 300 °C exhibit superior switching properties with µFE = 139.2 cm2V-1s-1, a subthreshold swing of 0.19 Vdec-1, and a threshold voltage of 0.2 V. The hydrogen introduced during sputter deposition plays an important role in enlarging the grain size and decreasing the subgap defects in SPC-prepared In2O3:H. The proposed method does not require any additional expensive equipment and/or change in the conventional oxide TFT fabrication process. We believe these SPC-grown In2O3:H TFTs have a great potential for use in future transparent or flexible electronics applications.

High-mobility hydrogenated polycrystalline In2O3 (In2O3:H) thin-film transistors

Abstract: Oxide semiconductors have been extensively studied as active channel layers of thin-film transistors (TFTs) for electronic applications. However, the field-effect mobility (μFE) of oxide TFTs is not sufficiently high to compete with that of low-temperature-processed polycrystalline-Si TFTs (50-100 cm2V-1s-1). Here, we propose a simple process to obtain high-performance TFTs, namely hydrogenated polycrystalline In2O3 (In2O3:H) TFTs grown via the low-temperature solid-phase crystallization (SPC) process. In2O3:H TFTs fabricated at 300 °C exhibit superior switching properties with µFE = 139.2 cm2V-1s-1, a subthreshold swing of 0.19 Vdec-1, and a threshold voltage of 0.2 V. The hydrogen introduced during sputter deposition plays an important role in enlarging the grain size and decreasing the subgap defects in SPC-prepared In2O3:H. The proposed method does not require any additional expensive equipment and/or change in the conventional oxide TFT fabrication process. We believe these SPC-grown In2O3:H TFTs have a great potential for use in future transparent or flexible electronics applications.

Artificial Vision Adaption Mimicked by an Optoelectrical In2O3 Transistor Array.

Abstract: Simulation of biological visual perception has gained considerable attention. In this paper, an optoelectrical In2O3 transistor array with a negative photoconductivity behavior is designed using a side-gate structure and a screen-printed ion-gel as the gate insulator. This paper is the first to observe a negative photoconductivity in electrolyte-gated oxide devices. Furthermore, an artificial visual perception system capable of self-adapting to environmental lightness is mimicked using the proposed device array. The transistor device array shows a self-adaptive behavior of light under different levels of light intensity, successfully demonstrating the visual adaption with an adjustable threshold range to the external environment. This study provides a new way to create an environmentally adaptive artificial visual perception system and has far-reaching significance for the future of neuromorphic electronics.

Ultraviolet-Assisted Low-Thermal-Budget-Driven α-InGaZnO Thin Films for High-Performance Transistors and Logic Circuits.

Abstract: Developing a low-temperature fabrication strategy of an amorphous InGaZnO (α-IGZO) channel layer is a prerequisite for high-performance oxide-based thin film transistor (TFT) flexible device applications. Herein, an ultraviolet-assisted oxygen ambient rapid thermal annealing method (UV-ORTA), which combines ultraviolet irradiation with rapid annealing treatment in an oxygen atmosphere, was proposed to realize the achievement of high-performance α-IGZO TFTs at low temperature. Experimental results have confirmed that UV-ORTA treatment has the ability to suppress defects and obtain high-quality films similar to high-temperature-annealing-treated samples. α-IGZO/HfAlO TFTs with high-performance and low-voltage operating have been achieved at a low temperature of 180 °C for 200 s, including a high μsat of 23.12 cm2 V-1 S-1, large Ion/off of 1.1 × 108, small subthreshold swing of 0.08 V/decade, and reliable stability under bias stress, respectively. As a demonstration of complex logic applications, a low-voltage resistor-loaded unipolar inverter based on an α-IGZO/HfAlO TFT has been built, demonstrating full swing characteristics and a high gain of 13.8. Low-frequency noise (LFN) characteristics of α-IGZO/HfAlO TFTs have been presented and concluded that the noise source tended to a carrier number fluctuation (ΔN) model from a carrier number and correlated mobility fluctuation (ΔN-Δμ) model. As a result, it can be inferred that the low-temperature UV-ORTA technique to improve α-IGZO thin film quality provides a facile and designable process for the integration of α-IGZO TFTs into a flexible electronic system.

High-performance hysteresis-free perovskite transistors through anion engineering

Abstract: Abstract Despite the impressive development of metal halide perovskites in diverse optoelectronics, progress on high-performance transistors employing state-of-the-art perovskite channels has been limited due to ion migration and large organic spacer isolation. Herein, we report high-performance hysteresis-free p-channel perovskite thin-film transistors (TFTs) based on methylammonium tin iodide (MASnI 3 ) and rationalise the effects of halide (I/Br/Cl) anion engineering on film quality improvement and tin/iodine vacancy suppression, realising high hole mobilities of 20 cm 2 V −1 s −1 , current on/off ratios exceeding 10 7 , and threshold voltages of 0 V along with high operational stabilities and reproducibilities. We reveal ion migration has a negligible contribution to the hysteresis of Sn-based perovskite TFTs; instead, minority carrier trapping is the primary cause. Finally, we integrate the perovskite TFTs with commercialised n-channel indium gallium zinc oxide TFTs on a single chip to construct high-gain complementary inverters, facilitating the development of halide perovskite semiconductors for printable electronics and circuits.

Vacuum-Free Liquid-Metal-Printed 2D Indium-Tin Oxide Thin-Film Transistor for Oxide Inverters.

Abstract: A cost-effective, vacuum-free, liquid-metal-printed two-dimensional (2D) (∼1.9 nm-thick) tin-doped indium oxide (ITO) thin-film transistor (TFT) was developed at the maximum process temperature of 200 °C. A large-sized 2D-ITO channel layer with an electron density of ∼1.2 × 1019 cm-3 was prepared in an ambient atmosphere. The 2D-ITO-TFT operated in full depletion with a threshold voltage of -2.1 V and demonstrated good TFT device characteristics such as a high saturation mobility of ∼27 cm2 V-1 s-1, a small subthreshold slope of <382 mV decade-1, and a large on/off-current ratio of >109. The TFT device simulation analysis found that the 2D-ITO-TFT performances were controlled by the shallow acceptor-like in-gap defects spreading in the midgap region of over 1.0 eV below the conduction band minimum. Post-thermal annealing tuned the electron density of the 2D-ITO channel and enabled it to produce enhancement and depletion-mode 2D-ITO-TFTs. A full signal swing zero-VGS-load n-type metal-oxide semiconductor (NMOS) inverter composed of depletion-load/enhancement-driver 2D-ITO-TFTs and a complementary inverter with p-channel 2D-SnO-TFT were successfully demonstrated using all 2D-oxide-TFTs.

High Operation Frequency and Strain Tolerance of Fully Printed Oxide Thin Film Transistors and Circuits on PET Substrates.

Abstract: The major limitations of solution-processed oxide electronics include high process temperatures and the absence of necessary strain tolerance that would be essential for flexible electronic applications. Here, a combination of low temperature (<100 °C) curable indium oxide nanoparticle ink and a conductive silver nanoink, which are used to fabricate fully-printed narrow-channel thin film transistors (TFTs) on polyethylene terephthalate (PET) substrates, is proposed. The metal ink is printed onto the In2 O3 nanoparticulate channel to narrow the effective channel lengths down to the thickness of the In2 O3 layer and thereby obtain near-vertical transport across the semiconductor layer. The TFTs thus prepared show On/Off ratio ≈106 and simultaneous maximum current density of 172 µA µm-1 . Next, the depletion-load inverters fabricated on PET substrates demonstrate signal gain >200 and operation frequency >300 kHz at low operation voltage of VDD = 2 V. In addition, the near-vertical transport across the semiconductor layer is found to be largely strain tolerant with insignificant change in the TFT and inverter performance observed under bending fatigue tests performed down to a bending radius of 1.5 mm, which translates to a strain value of 5%. The devices are also found to be robust against atmospheric exposure when remeasured after a month.

Nanoscale flexible organic thin-film transistors.

Abstract: Direct-write electron-beam lithography has been used to fabricate low-voltage p-channel and n-channel organic thin-film transistors with channel lengths as small as 200 nm and gate-to-contact overlaps as small as 100 nm on glass and on flexible transparent polymeric substrates. The p-channel transistors have on/off current ratios as large as 4 × 109 and subthreshold swings as small as 70 mV/decade, and the n-channel transistors have on/off ratios up to 108 and subthreshold swings as low as 80 mV/decade. These are the largest on/off current ratios reported to date for nanoscale organic transistors. Inverters based on two p-channel transistors with a channel length of 200 nm and gate-to-contact overlaps of 100 nm display characteristic switching-delay time constants between 80 and 40 ns at supply voltages between 1 and 2 V, corresponding to a supply voltage-normalized frequency of about 6 MHz/V. This is the highest voltage-normalized dynamic performance reported to date for organic transistors fabricated by maskless lithography.

Intrinsically flexible displays: key materials and devices

Abstract: Abstract Continuous progress in flexible electronics is bringing more convenience and comfort to human lives. In this field, interconnection and novel display applications are acknowledged as important future directions. However, it is a huge scientific and technical challenge to develop intrinsically flexible displays due to the limited size and shape of the display panel. To address this conundrum, it is crucial to develop intrinsically flexible electrode materials, semiconductor materials and dielectric materials, as well as the relevant flexible transistor drivers and display panels. In this review, we focus on the recent progress in this field from seven aspects: background and concept, intrinsically flexible electrode materials, intrinsically flexible organic semiconductors and dielectric materials for organic thin film transistors (OTFTs), intrinsically flexible organic emissive semiconductors for electroluminescent devices, and OTFT-driven electroluminescent devices for intrinsically flexible displays. Finally, some suggestions and prospects for the future development of intrinsically flexible displays are proposed.

Excessive Oxygen Peroxide Model‐Based Analysis of Positive‐Bias‐Stress and Negative‐Bias‐Illumination‐Stress Instabilities in Self‐Aligned Top‐Gate Coplanar In–Ga–Zn–O Thin‐Film Transistors

Abstract: An excess oxygen‐peroxide‐based model that can simultaneously analyze the positive‐bias‐stress (PBS) and negative‐bias‐illumination‐stress (NBIS) instabilities in commercial self‐aligned top‐gate (SA‐TG) coplanar indium–gallium–zinc oxide (IGZO) thin‐film transistors (TFTs) is proposed herein. Existing studies have reported that the transition of oxygen vacancy (VO) charge states from VO0 to VO2+ is the dominant physical mechanism responsible for the negative shift of threshold voltage (VTH) under NBIS. However, in this study, it is observed that both the PBS and the NBIS stabilities of IGZO TFTs deteriorate at a faster rate as the amount of oxygen increases within the channel layer, implying that the conventional VO‐related defect model is inappropriate in elucidating the PBS and NBIS instabilities of commercial SA‐TG coplanar IGZO TFTs, where the channel layers are formed under high oxygen flow rates (OFRs) to make VTH positive. On the basis of the full‐energy range subgap density of states extracted before and after each stress from IGZO TFTs with different OFRs, it is determined that the generation and annihilation of the subgap states in the excess oxygen peroxide configuration are the dominant physical mechanisms for PBS and NBIS instabilities in commercial SA‐TG coplanar IGZO TFTs, respectively.

OUP accepted manuscript

Abstract: Continuous progress in flexible electronics is bringing more convenience and comfort to human lives. In this field, interconnection and novel display applications are acknowledged as important future directions. However, it is a huge scientific and technical challenge to develop intrinsically flexible displays due to the limited size and shape of the display panel. To address this conundrum, it is crucial to develop intrinsically flexible electrode materials, semiconductor materials and dielectric materials, as well as the relevant flexible transistor drivers and display panels. In this review, we focus on the recent progress in this field from seven aspects: background and concept, intrinsically flexible electrode materials, intrinsically flexible organic semiconductors and dielectric materials for organic thin film transistors (OTFTs), intrinsically flexible organic emissive semiconductors for electroluminescent devices, and OTFT-driven electroluminescent devices for intrinsically flexible displays. Finally, some suggestions and prospects for the future development of intrinsically flexible displays are proposed.

Comparative Study of Atomic Layer Deposited Indium-Based Oxide Transistors with a Fermi Energy Level-Engineered Heterojunction Structure Channel through a Cation Combinatorial Approach.

Abstract: Amorphous indium-gallium-zinc oxide (a-IGZO) has become a standard channel ingredient of switching/driving transistors in active-matrix organic light-emitting diode (AMOLED) televisions. However, mobile AMOLED displays with a high pixel density (≥500 pixels per inch) and good form factor do not often employ a-IGZO transistors due to their modest mobility (10-20 cm2/(V s)). Hybrid low-temperature polycrystalline silicon and oxide transistor (LTPO) technology is being adapted in high-end mobile AMOLED devices due to its ultralow power consumption and excellent current drivability. The critical issues of LTPO (including a complicated structure and high fabrication costs) require a search for alternative all-oxide thin-film transistors (TFTs) with low-cost processability and simple device architecture. The atomic layer deposition (ALD) method is a promising route for high-performance all-oxide TFTs due to its unique features, such as in situ cation composition tailoring ability, precise nanoscale thickness controllability, and excellent step coverage. Here, we report an in-depth comparative investigation of TFTs with indium-gallium oxide (IGO)/gallium-zinc oxide (GZO) and indium-zinc oxide (IZO)/GZO heterojunction stacks using an ALD method. IGO and IZO layers with different compositions were tested as a confinement layer (CL), whereas the GZO layer was used as a barrier layer (BL). Optimal IGO/GZO and IZO/GZO channels were carefully designed on the basis of their energy band properties, where the formation of a quasi-two-dimensional electron gas (q2DEG) near the CL/BL interface is realized by rational design of the band gaps and work-functions of the IGO, IZO, and GZO thin films. To verify the effect of q2DEG formation, the device performances and stabilities of TFTs with CL/BL oxide heterojunction stacks were examined and compared to those of TFTs with a single CL layer. The optimized device with the In0.75Zn0.25O/Ga0.80Zn0.20O stack showed remarkable electrical performance: μFE of 76.7 ± 0.51 cm2/(V s), VTH of -0.37 ± 0.19 V, SS of 0.13 ± 0.01 V/dec, and ION/OFF of 2.5 × 1010 with low operation voltage range of ≥2 V and excellent stabilities (ΔVTH of +0.35, -0.67, and +0.08 V for PBTS, NBIS, and CCS, respectively). This study suggests the feasibility of using high-performance ALD-derived oxide TFTs (which can compete with the performance of LTPO transistors) for high-end mobile AMOLED displays.

Vertical Phase Separation Structure for High‐Performance Organic Thin‐Film Transistors: Mechanism, Optimization Strategy, and Large‐Area Fabrication toward Flexible and Stretchable Electronics

Abstract: Organic thin‐film transistors (OTFTs) exhibit great potential applications in flexible logic circuits, sensors, nonvolatile memory, etc. The vertical phase separation (VPS) structure, deriving from the blends of small molecules and polymers, can produce a high‐quality crystalline semiconducting layer and an intrinsic and trap‐free semiconductor/insulator interface. OTFTs with a VPS structure provide a promising route to accelerate their commercialization due to these desirable features including excellent device performance, good uniformity and reproducibility, environmental and mechanical stability, low‐cost and large‐area fabrication. Additionally, VPS OTFTs also exhibit a good balance between electronical properties and stretchability for intrinsic stretchable OTFTs. Herein, a comprehensive review is given on VPS structure for flexible and stretchable OTFTs. First, the evolution history of VPS structures and its formation mechanism are summarized. Based on the understanding of the VPS structure, the optimization strategies of VPS structures for high‐performance OTFTs are presented. Subsequently, the large‐area fabrication techniques of VPS structures, as well as the potential applications in flexible and stretchable OTFTs, are discussed. Finally, conclusions and outlook are provided for the further development of VPS structure in OTFTs. This review would promote the understanding and development of VPS structures in OTFTs, accelerating its applications in flexible and stretchable electronics.

A printed proximity-sensing surface based on organic pyroelectric sensors and organic thin-film transistor electronics

Abstract: Large-area, flexible proximity-sensing surfaces are useful in a range of applications including process control, work security and robotics. However, current systems typically require rigid and thick electronics, which limit how they can be used. Here we report a flexible large-area proximity-sensing surface fabricated using printed organic materials and incorporating analogue front-end electronics in each pixel. The sensing surface is built with printed thin-film pyroelectric sensors based on poly(vinylidene fluoride-co-trifluoroethylene) co-polymers and printed organic thin-film transistors. A 5 × 10 matrix frontplane, consisting of long-wavelength infrared organic pyroelectric sensors, is laminated with an organic transistor analogue front-end backplane. The electronic front end provides sensor-signal amplification and pixel addressing to maximize the detection distance and reduce pixel crosstalk. An average yield of 82% fully working pixels for the backplane and a maximum system yield of 96%, which corresponds to 768 defect-free devices, are achieved. The system can detect a human hand approaching from different directions and track the position of a movable heat source up to a distance of around 0.4 m at a readout speed of 100 frames per second. A sensing surface fabricated from printed thin-film pyroelectric sensors and printed organic thin-film transistor technology can be used for human proximity detection.

Strategies for Applications of Oxide-Based Thin Film Transistors

Abstract: Due to the untiring efforts of scientists and researchers on oxide semiconductor materials, processes, and devices, the applications for oxide-based thin film transistors (TFTs) have been researched and promoted on a large scale. With the advantages of relatively high carrier mobility, low off-current, good process compatibility, optical transparency, low cost, and especially flexibility, oxide-based TFTs have already been adapted for not only displays (e.g., liquid crystal display (LCD), organic light emitting diode (OLED), micro-light-emitting diode (Micro-LED), virtual reality/augmented reality (VR/AR) and electronic paper displays (EPD)) but also large-area electronics, analog circuits, and digital circuits. Furthermore, as the requirement of TFT technology increases, low temperature poly-silicon and oxide (LTPO) TFTs, which combine p-type LTPS and n-type oxide TFT on the same substrate, have drawn further interest for realizing the hybrid complementary metal oxide semiconductor (CMOS) circuit. This invited review provides the current progress on applications of oxide-based TFTs. Typical device configurations of TFTs are first described. Then, the strategies to apply oxide-based TFTs for improving the display quality with different compensation technologies and obtaining higher performance integrated circuits are highlighted. Finally, an outlook for the future development of oxide-based TFTs is given.

Cation Composition-Dependent Device Performance and Positive Bias Instability of Self-Aligned Oxide Semiconductor Thin-Film Transistors: Including Oxygen and Hydrogen Effect.

Abstract: Amorphous oxide semiconductor transistors control the illuminance of pixels in an ecosystem of displays from large-screen TVs to wearable devices. To satisfy application-specific requirements, oxide semiconductor transistors of various cation compositions have been explored. However, a comprehensive study has not been carried out where the influence of cation composition, oxygen, and hydrogen on device characteristics and stability is systematically quantified, using commercial-grade process technology. In this study, we fabricate self-aligned top-gate structure thin-film transistors with three oxide semiconductor materials, InGaZnO (In/Ga/Zn = 1:1:1), In-rich InGaZnO, and InZnO, having mobility values of 10, 27, and 40 cm2/V·s, respectively. Combinations of varied amounts of oxygen and hydrogen are incorporated into each transistor by controlling the fabrication process to study the effect of these gaseous elements on the physical nature of the channel material. Electrons can be captured by peroxy linkage (O22-) or undercoordinated In (In* to become In+), which are manifested in the extracted subgap density-of-states profile and first-principles calculations. Energy difference between electron-trapped In+ and O22- σ* is the smallest for IGZO, and In+-O22- annihilation occurs by electron excitation from the subgap In+ state to the O22- σ*. Furthermore, characteristic time constants during positive bias stress and recovery reveal the various microscopic physical phenomena within the transistor structure between different cation compositions.

Subthreshold Swing of 59 mV decade−1 in Nanoscale Flexible Ultralow‐Voltage Organic Transistors

Abstract: Organic thin‐film transistors (TFTs) that provide subthreshold swings near the theoretical limit together with large on/off current ratios at very low operating voltages require high‐capacitance gate dielectrics with a vanishingly small defect density. A promising approach to the fabrication of such dielectrics at temperatures sufficiently low to allow TFT fabrication on polymeric substrates are hybrid dielectrics consisting of a thin metal oxide layer in combination with a molecular self‐assembled monolayer (SAM). Here, the electrical and surface properties of titanium oxide produced by the plasma‐assisted oxidation of the surface of vacuum‐deposited titanium gate electrodes and its use as the first component of a hybrid TiOx/SAM gate dielectric in flexible organic TFTs are investigated. These transistors have a gate‐dielectric capacitance of about 1 µF cm−2, a subthreshold swing of 59 mV decade−1 (within measurement error of the physical limit at room temperature) for a wide range of channel lengths as small as 0.7 µm, and an on/off current ratio of 107 for a gate‐source‐voltage range of 1 V.

A Novel Multicategory Defect Detection Method Based on the Convolutional Neural Network Method for TFT-LCD Panels

Abstract: Defects on thin film transistor liquid crystal display (TFT-LCD) panel could be divided into either macro- or microdefects, depending on if they are easy to be detected by the naked eye or not. There have been abundant studies discussing the identification of macrodefects but very few on microones. This study proposed a multicategory classification model using a convolutional neural network model to work with automatic optical inspection (AOI) for identifying defective pixels on the TFT-LCD panel. Since the number of nondefective pixels outnumbered the defective ones, there exists a very serious class-imbalanced problem. To deal with that, this study designed a special training strategy that worked with data augmentation to increase the effectiveness of the proposed model. Actual panel images provided by a mobile manufacturer in Taiwan are used to demonstrate the efficiency and effectiveness of the proposed approach. After validation, the model constructed by this study had 98.9% total prediction accuracy and excellent specificity and sensitivity. The model could finish the detection and classification process automatically to replace the human inspection.

Remarkable Stability Improvement with a High‐Performance PEALD‐IZO/IGZO Top‐Gate Thin‐Film Transistor via Modulating Dual‐Channel Effects

Abstract: Plasma‐enhanced atomic layer deposition (PEALD)‐based bilayer IZO (back channel)/IGZO top‐gate thin‐film transistors (TFTs) with different IZO and IGZO layer thicknesses are fabricated to evaluate the correlation between thickness and electrical characteristics/reliability caused by dual‐channel modulation. The dual‐channel formed by IZO stacked on the backchannel improves both mobility and reliability of devices as the IZO layer thickness increases. In the TCAD simulation, as the thickness of IZO increases, the current flowing through the IZO channel among the dual channels increases and the main channel transition from IGZO to IZO occurs above a certain IZO layer thickness. The main channel transition to IZO, which has high mobility and is located in the backchannel away from the gate insulator (GI), leads to a mobility increase with a lower threshold voltage (Vth) shift and a remarkable improvement of reliability deteriorated by the GI. As a result, PEALD‐based IZO/IGZO TG TFTs exhibit both high mobility (≈40 cm2 V−1 s−1) and high stability (ΔVth = ‐0.07 V) of a positive bias temperature stress up to 10 800 s. This suggests that ALD‐based dual‐channel regulation by nanoscale thickness control of the stacking oxide semiconductor can overcome the trade‐off between mobility and reliability.

Neuromorphic Implementation of Logic Functions Based on Parallel Dual-Gate Thin-Film Transistors

Abstract: Composed of computation units each containing a parallel, dual-gate (DG) thin-film transistor (TFT) and a memory capacitor addressed by an access TFT, a neuromorphic circuit implementing fundamental AND and OR logic functions is realized and characterized. The exceptionally low leakage current of a TFT built on indium-gallium-zinc oxide (IGZO) allows the capacitor to be used as a quasi-static memory element. Appropriate weight signals for the realization of the two logic functions are obtained using a gradient-descent training algorithm. The circuit can be configured to execute one of the two functions by the setting of the weight signals.

Synaptic Emulation via Ferroelectric P(VDF-TrFE) Reinforced Charge Trapping/Detrapping in Zinc-Tin Oxide Transistor.

Abstract: Brain inspired artificial synapses are highly desirable for neuromorphic computing and are an alternative to a conventional computing system. Here, we report a simple and cost-effective ferroelectric capacitively coupled zinc-tin oxide (ZTO) thin-film transistor (TFT) topped with ferroelectric copolymer poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) for artificial synaptic devices. Ferroelectric dipoles enhance the charge trapping/detrapping effect in ZTO TFT, as confirmed by the transfer curve (ID-VG) analysis. This substantiates superior artificial synapse responses in ferroelectric-coupled ZTO TFT because the current potentiation and depression are individually improved. The ferroelectric-coupled ZTO TFT successfully emulates the essential features of the artificial synapse, including pair-pulsed facilitation (PPF) and potentiation/depression (P/D) characteristics. In addition, the device also mimics the memory consolidation behavior through intensified stimulation. This work demonstrates that the ferroelectric-coupled ZTO synaptic transistor possesses great potential as a hardware candidate for neuromorphic computing.

2D transistors rapidly printed from the crystalline oxide skin of molten indium

Abstract: Abstract Ultrathin single-nm channels of transparent metal oxides offer unparalleled opportunities for boosting the performance of low power, multifunctional thin-film electronics. Here we report a scalable and low-temperature liquid metal printing (LMP) process for unlocking the ultrahigh mobility of 2-dimensional (2D) InO x . These continuous nanosheets are rapidly (60 cm s −1 ) printed over large areas (30 cm 2 ) directly from the native oxide skin spontaneously formed on molten indium. These nanocrystalline LMP InO x films exhibit unique 2D grain morphologies leading to exceptional conductivity as deposited . Quantum confinement and low-temperature oxidative postannealing control the band structure and electronic density of states of the 2D InO x channels, yielding thin-film transistors with ultrahigh mobility (μ 0 = 67 cm 2 V −1 s −1 ), excellent current saturation, and low hysteresis at temperatures down to 165 °C. This work establishes LMP 2D InO x as an ideal low-temperature transistor technology for high-performance, large area electronics such as flexible displays, active interposers, and thin-film sensors.

Transparent, P‐channel CuISn Thin‐film Transistor with Field Effect Mobility of 45 cm2 V–1 s–1 and Excellent Bias Stability

Abstract: The p‐type semiconducting materials are essential building blocks for high performance complementary metal‐oxide semiconductor (CMOS) thin‐film transistor (TFT) circuits. Here, the development of the transparent and high performance of p‐channel copper‐iodide‐tin (CuISn) TFTs is reported. Sn alloy in CuI exhibits remarkable changes in structural and physical properties, which are studied by scanning electron microscopy, high‐resolution transmission electron microscopy, and X‐ray photoelectron spectroscopy, and Hall effect measurements. It is confirmed that 25% Sn‐alloyed CuI has p‐type conductivity with carrier concentration of 2.1 × 1017 cm–3 and Hall mobility of 63.8 cm2 V–1 s–1. The TFT made with 25% CuISn exhibits the high field‐effect mobility (μFE) of 45.5 cm2 V–1 s–1, which is 10‐fold higher than that of the pristine CuI TFT. The CuISn TFT on polyimide substrate exhibits the μFE of 42.5 cm2 V–1 s–1 and ON/OFF current ratio of ≈107. In addition, the CuISn TFT shows excellent stability with the threshold voltage shift of 0.6 V under negative gate bias stress. In addition, the hetrojunction with Li doped ZnO, CuISn/LZO p‐n junction exhibit excellent rectifying characteristics with the diode ideality factor of 1.3 and forward to reverse current ratio of ≈107, which is three order higher than that of CuI/LZO diode. Therefore, the p‐channel CuISn TFTs can be widely used to open up cost‐effective transparent CMOS TFT circuits, displays, and flexible electronics.