Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.

Relative importance of the Si–Si bond and Si–H bond for the stability of amorphous silicon thin film transistors

Abstract: We investigate the mechanism for Si dangling bond defect creation in amorphous silicon thin film transistors as a result of bias stress. We show that the rate of defect creation does not depend on the total hydrogen content or the type of hydrogen bonding in the amorphous silicon. However, the rate of defect creation does show a clear correlation with the Urbach energy and the intrinsic stress in the film. These important results support a localized model for defect creation, i.e., where a Si–Si bond breaks and a nearby H atom switches to stabilize the broken bond, as opposed to models involving the long-range diffusion of hydrogen. Our experimental results demonstrate the importance of optimizing the intrinsic stress in the films to obtain maximum stability and mobility. An important implication is that a deposition process where intrinsic stress can be independently controlled, such as an ion-energy controlled deposition should be beneficial, particularly for deposition temperatures below 300 °C.

Non-volatile Ferroelectric Poly(vinylidene fluoride-co-trifluoroethylene) Memory Based on a Single-Crystalline Tri-isopropylsilylethynyl Pentacene Field-Effect Transistor

Abstract: A new type of nonvolatile ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) (P(VDF-TrFE)) memory based on an organic thin-film transistor (OTFT) with a single crystal of tri-isopropylsilylethynyl pentacene (TIPS-PEN) as the active layer is developed. A bottom-gate OTFT is fabricated with a thin P(VDF-TrFE) film gate insulator on which a one-dimensional ribbon-type TIPS-PEN single crystal, grown via a solvent-exchange method, is positioned between the Au source and drain electrodes. Post-thermal treatment optimizes the interface between the flat, single-crystalline ab plane of TIPS-PEN and the polycrystalline P(VDF-TrFE) surface with characteristic needle-like crystalline lamellae. As a consequence, the memory device exhibits a substantially stable source–drain current modulation with an ON/OFF ratio hysteresis greater than 103, which is superior to a ferroelectric P(VDF-TrFE) OTFT that has a vacuum-evaporated pentacene layer. Data retention longer than 5 × 104 s is additionally achieved in ambient conditions by incorporating an interlayer between the gate electrode and P(VDF-TrFE) thin film. The device is environmentally stable for more than 40 days without additional passivation. The deposition of a seed solution of TIPS-PEN on the chemically micropatterned surface allows fabrication arrays of TIPS-PEN single crystals that can be potentially useful for integrated arrays of ferroelectric polymeric TFT memory.

Organic n-Channel Field-Effect Transistors Based on Arylenediimide-Thiophene Derivatives

Abstract: The synthesis, structural, electrochemical, and thin film electrical and electronic structural properties of a series of arylene diimide-oligothiophene n-type semiconductors are reported. This family of compounds allows analysis of the effects on thin film transistor performance of the following: (i) oligothiophene backbone catenation; (ii) naphthalenediimide vs perylenediimide core interchange; (iii) phenylene group introduction in the oligothiophene backbone. Electrochemical experiments indicate similar redox energetics for all members of this series, while thin film transistor measurements reveal markedly different charge transport performances. The highest electron mobility of 0.35 cm2 V−1 s−1 is recorded for films of benzo[lmn]thieno[3′,4′:4,5]imidazo[2,1-b][3,8]phenanthroline-1,3,6(2H)-trione, 2-octyl (NDI-1T). Solution-processed field effect transistors were also fabricated and surprisingly exhibit electrical performances surpassing that of the vapor-deposited films in the case of isoquino[6′,5′,4′...

Significant dependence of morphology and charge carrier mobility on substrate surface chemistry in high performance polythiophene semiconductor films

Abstract: The authors report a significant dependence of the morphology and charge carrier mobility of poly(2,5-bis(3-dodecylthiophene-2-yl)thieno[3,2-b]thiophene) (pBTTT) films on the substrate surface chemistry upon heating into its liquid crystal phase. In contrast with films on bare silicon oxide surfaces, pBTTT films on oxide functionalized with octyltrichlorosilane exhibit substantial increases in the lateral dimensions of molecular terraces from nanometers to micrometers, increased orientational order, and higher charge carrier mobility. The large-scale crystallinity of this polymer plays an important role in the high carrier mobility observed in devices, but renders it more sensitive to substrate surface chemistry than other conjugated polymers.

Manufacture of thin-film transistor

Abstract: PURPOSE:To improve the characteristics of a transistor to a large extent, by depositing a silicon dioxide film on a silicon thin film from the outside, thereafter performing thermal oxidation, thereby making the thickness of the silicon thin film further thin. CONSTITUTION:A silicon thin film 302 is deposited on an n insulating substrate 301. The film thickness is made to be, e.g. t0=500Angstrom . Then, a silicon dioxide film 303 is deposited on the entire surface. The film thickness is made to be, e.g. toxo=1,300Angstrom . In this case, the silicon dioxide film can be formed by any method if the film is not formed by oxidizing the silicon thin film but is directly depsited from the outside. Thermal oxidation treatment is performed, and a film thickness 304 of the silicon dioxide film on the silicon thin fil is grown. The final film thickness of the silicon thin film becomes t1=400Angstrom by the thermal oxidation. After a gate electrode 305 has been formed, impurities are introduced into the silicon thin film, and a source region 306 and a drain region 307 are formed. Then, an interlayer insulating film 308 is deposited, contact holes are provided, and a source electrode 309 and a drain electrode 310 are formed.