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Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.


Papers
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Journal ArticleDOI
TL;DR: In this paper, an extraction technique for subgap density of states (DOS) in an n-channel amorphous InGaZnO thin-film transistor (TFT) by using multifrequency capacitancevoltage (C -V) characteristics is proposed and verified by comparing the measured I-V characteristics with the technology computer-aided design simulation results incorporating the extracted DOS as parameters.
Abstract: An extraction technique for subgap density of states (DOS) in an n-channel amorphous InGaZnO thin-film transistor (TFT) by using multifrequency capacitance-voltage (C -V) characteristics is proposed and verified by comparing the measured I- V characteristics with the technology computer-aided design simulation results incorporating the extracted DOS as parameters. It takes on the superposition of exponential tail states and exponential deep states with characteristic parameters for N TA = 1.1 × 1017 cm-3 · eV-1, N DA = 4 × 1015 cm-3 · eV-1, kT TA = 0.09 eV, and kT DA = 0.4 eV. The proposed technique allows obtaining the frequency-independent C-V curve, which is very useful for oxide semiconductor TFT modeling and characterization, and considers the nonlinear relation between the energy level of DOS and the gate voltage V GS. In addition, it is a simple, fast, and accurate extraction method for DOS in amorphous InGaZnO TFTs without optical illumination, temperature dependence, and numerical iteration.

139 citations

Journal ArticleDOI
TL;DR: In this paper, the gate hysteresis of carbon nanotube field effect transistors (CNFETs) on silicon oxide substrates in an ultrahigh vacuum (UHV) at low temperatures was investigated.
Abstract: We have studied gate hysteresis of carbon nanotube field-effect transistors (CNFETs) on silicon oxide substrates in an ultrahigh vacuum (UHV) at low temperatures. It is found that the hysteresis is neither reduced by thermal annealing at temperatures over 300 °C under UHV nor significantly affected by independent adsorption of ammonia or water at T = 56 K. However, the hysteresis decreases greatly upon coadsorption of water and ammonia below condensation temperatures and restores completely with desorption of the adsorbed water layer. On the basis of these results, it is concluded that the main cause of gate hysteresis in CNFETs on silicon oxide substrate is charge transfer between the carbon nanotube and charge traps at the silicon oxide/ambient interface. We propose a mechanism for gate hysteresis that involves surface silanol groups as the major sources of screening charges. This surface silanol model is supported by results from scanning surface potential microscopy (SSPM).

139 citations

Journal ArticleDOI
TL;DR: A new design of highly flexible vertical TFTs (VTFTs) with superior electrical performance and mechanical robustness is reported, using the graphene as a work-function tunable contact for amorphous indium gallium zinc oxide (IGZO) thin film.
Abstract: Flexible thin-film transistors (TFTs) are of central importance for diverse electronic and particularly macroelectronic applications. The current TFTs using organic or inorganic thin film semiconductors are usually limited by either poor electrical performance or insufficient mechanical flexibility. Here, we report a new design of highly flexible vertical TFTs (VTFTs) with superior electrical performance and mechanical robustness. By using the graphene as a work-function tunable contact for amorphous indium gallium zinc oxide (IGZO) thin film, the vertical current flow across the graphene–IGZO junction can be effectively modulated by an external gate potential to enable VTFTs with a highest on–off ratio exceeding 105. The unique vertical transistor architecture can readily enable ultrashort channel devices with very high delivering current and exceptional mechanical flexibility. With large area graphene and IGZO thin film available, our strategy is intrinsically scalable for large scale integration of VTF...

138 citations

Patent
Woon-Yong Park1, Jong-Soo Yoon1
03 Sep 2004
TL;DR: In this paper, a conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and moly bdenum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate.
Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, a passivation layer is deposited and patterned to form contact holes respectively exposing the drain electrode, the gate pad, and the data pad. At this time, the contact hole on the gate pad only exposes the lower layer of the gate pad, and the gate insulating layer and the passivation layer completely cover the upper layer of the gate pad. Next, indium tin oxide is deposited and patterned to form a pixel electrode, a redundant gate pad, and a redundant data pad respectively connected to the pixel electrode, the gate pad, and the data pad.

138 citations

Journal ArticleDOI
01 Feb 1998
TL;DR: The use of organic semiconductors as active layers in thin-film transistors has raised a large interest, both for the fundamental understanding of the charge transport processes in organic materials, and also for the potential applications of these devices in the new field of flexible electronics.
Abstract: The use of organic semiconductors as active layers in thin-film transistors has raised in the recent years a large interest, both for the fundamental understanding of the charge transport processes in organic materials, and also for the potential applications of these devices in the new field of flexible electronics. Short conjugated oligomers have been shown to possess much higher field-effect mobilities than their parent conjugated polymers. The origin of such increase in the efficiency of charge transport is mainly attributed to the close-packing and long-range structural organization displayed in thin films of conjugated oligomers. The various routes for controlling this organization are described, which allow to realize liquid crystal-like two-dimensional structures for these semiconductors, whose carrier mobility has now become equivalent to that of amorphous silicon. It is also shown that the effect of conjugation length on carrier mobility is not as critical as previously thought, but the associated increase of the band gap energy effects the efficiency of charge injection at the metal/semiconductor interface. This problem can be answered by realizing a local doping of the semiconductor, which allows the injection of charge to operate through an efficient tunneling mechanism. Organic-based thin-film transistors have now become viable devices.

138 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023341
2022918
2021640
20201,333
20192,015
20182,080