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Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.


Papers
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Patent
01 Nov 2000
TL;DR: In this article, a thin film transistor (TFT) device structure based on an organic-inorganic hybrid semiconductor material was proposed, which exhibits high field effect mobility, high current modulation at lower operating voltages than the current state-of-the-art OI hybrid TFT devices.
Abstract: A thin film transistor (TFT) device structure based on an organic-inorganic hybrid semiconductor material, that exhibits a high field effect mobility, high current modulation at lower operating voltages than the current state of the art organic-inorganic hybrid TFT devices. The structure comprises a suitable substrate disposed with the following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic-inorganic hybrid semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the gate voltage dependence of the organic-inorganic hybrid semiconductor to achieve high field effect mobility levels at very low operating voltages. Judicious combinations of the choice of this high dielectric constant gate insulator material and the means to integrate it into the organic-inorganic hybrid based TFT structure are taught that would enable easy fabrication on glass or plastic substrates and the use of such devices in flat panel display applications.

117 citations

Patent
21 Mar 1994
TL;DR: Amorphous silicon in impurity regions (source and drain regions or N-type or p-type regions) of TFT and TFD are crystallized and activated to lower electric resistance, by depositing film having a catalyst element such as nickel (Ni), iron (Fe), cobalt (Co) or platinum (Pt) on or beneath an amorphous silicon film.
Abstract: Amorphous silicon in impurity regions (source and drain regions or N-type or p-type regions) of TFT and TFD are crystallized and activated to lower electric resistance, by depositing film having a catalyst element such as nickel (Ni), iron (Fe), cobalt (Co) or platinum (Pt) on or beneath an amorphous silicon film, or introducing such a catalyst element into the amorphous silicon film by ion implantation and subsequently crystallizing the same by applying heat annealing at an appropriate temperature.

116 citations

Patent
30 Mar 1993
TL;DR: In this paper, a three-dimensional multichannel structure of a thin-film transistor gate with a 3D multi-channel structure is described, where the source/drain electrodes are formed so as to be spaced from and opposite to each other on a substrate, and the whole outer layer of each sub-semiconductive layer is used as channel regions.
Abstract: A thin film transistor gate structure with a three-dimensional multichannel structure is disclosed. The thin film transistor gate structure according to the present invention comprises source/drain electrodes formed so as to be spaced from and opposite to each other on a substrate; semiconductive layers, comprised of a plurality of sub-semiconductive layers, each formed in a row, each end of the sub-semiconductive layers being in ohmic-contact with the source/drain electrodes; gate insulating layers surrounding each of the semiconductive layers; and gate electrodes surrounding each of the gate insulating layers. Accordingly, the whole outerlayers of each sub-semiconductive layer surrounded by the gate electrodes serve as channel regions. As a result, the effective channel area increases, thereby improving the channel conductance and current driving ability.

116 citations

Journal ArticleDOI
TL;DR: In this paper, a gate-induced charge significantly reduced the contact resistance and increased source-drain current in a four-terminal device equipped with a gate electrode for channel formation of a pentacene thin-film transistor.
Abstract: We established a dry-etching patterning process for the channel formation of pentacene thin-film transistor, and fabricated a four-terminal device equipped with a gate electrode. The four-terminal device enabled us to divide two-terminal source–drain resistance into two components of contact resistance and pentacene channel resistance. We obtained direct evidence of a gate-voltagedependent contact resistance change: the gate-induced charge significantly reduced the contact resistance and increased source–drain current. Furthermore, the temperature dependence of the device clearly indicated that the contact resistance was much higher than the channel resistance and was dominated in the two-terminal total resistance of the device below 120 K. An observed activation energy of 80 meV for contact resistance was higher than that of 42 meV for pentacene channel resistance.

116 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023341
2022918
2021640
20201,333
20192,015
20182,080