Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.

Method of forming dielectric layers on a substrate and apparatus therefor

Abstract: Methods of forming dielectric layers on a substrate comprising silicon and oxygen are disclosed herein. In some embodiments, a method of forming a dielectric layer on a substrate includes provide a substrate having an exposed silicon oxide layer; treating an upper surface of the silicon oxide layer with a plasma; and depositing a silicon nitride layer on the treated silicon oxide layer via atomic layer deposition. The silicon nitride layer may be exposed to a plasma nitridation process. The silicon oxide and silicon nitride layers may be subsequently thermally annealed. The dielectric layers may be used as part of a gate structure.

Tft-lcd array substrate and manufacturing method thereof

Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a first gate line, a second gate line and a data line, which are formed on a substrate and define a pixel region, the first and second gate lines being parallel to each other, a pixel electrode, and a first thin film transistor (TFT) and a second TFT provided in the pixel region. The first TFT comprises a first gate electrode and a first drain electrode, the second TFT comprises a second gate electrode and a second drain electrode, and parasitic capacitance generated between the first drain electrode and the first gate electrode is equal to parasitic capacitance generated between the second drain electrode and the second gate electrode. Both the first drain electrode and the second drain electrode are connected with the pixel electrode. When an “ON” voltage is supplied to the first TFT via the first gate line, a first voltage is supplied to the second TFT via the second gate line; when an “OFF” voltage is supplied to the first TFT via the first gate line, a second voltage is supplied to the second TFT via the second gate line, wherein the “ON” voltage−the “OFF” voltage=the second voltage−the first voltage.

Effect of channel thickness on density of states in amorphous InGaZnO thin film transistor

Abstract: We report on the origin of threshold voltage shift with the thickness of amorphous InGaZnO channel layer deposited by rf magnetron sputter at room temperature, using density of states extracted from multi frequency method and falling rates of activation energy, which of trends are entirely consistent each other in respect of the reduction of total traps with increasing the channel thickness. Furthermore, we shows that the behavior of ΔVth under the positive gate bias stress and thermal stress can be explained by charge trapping mechanism based on total trap variation.

Performance of thin-film transistors on polysilicon films grown by low-pressure chemical vapor deposition at various pressures

Abstract: Defect properties of undoped low-pressure chemical-vapor-deposited (LPCVD) polysilicon films have been investigated by capacitance techniques on a simple metal-oxide-semiconductor (MOS) capacitor structure. The results show that the effective density of bulk and interface trap states is almost independent of the deposition pressure. After reducing the polysilicon film thickness by etching, although the grain size decreases due to the columnar mode of growth at low pressures, the trap states density reduces significantly. This finding could be explained by the hypothesis that, during the growth of the material, impurities are segregated at the film surface by fast diffusion through the grain boundaries. The transport properties of 0.5- mu m-thick polysilicon films deposited at a pressure ranging from 100 to 0.5 mtorr were evaluated from measurements on thin-film transistors (TFTs). The results demonstrate that at high pressures the grain boundaries and at low pressures the polysilicon-SiO/sub 2/ interface roughness scattering are the main factors in determining the transistor performance. >

Water-soluble thin film transistors and circuits based on amorphous indium-gallium-zinc oxide.

Abstract: This paper presents device designs, circuit demonstrations, and dissolution kinetics for amorphous indium–gallium–zinc oxide (a-IGZO) thin film transistors (TFTs) comprised completely of water-soluble materials, including SiNx, SiOx, molybdenum, and poly(vinyl alcohol) (PVA). Collections of these types of physically transient a-IGZO TFTs and 5-stage ring oscillators (ROs), constructed with them, show field effect mobilities (∼10 cm2/Vs), on/off ratios (∼2 × 106), subthreshold slopes (∼220 mV/dec), Ohmic contact properties, and oscillation frequency of 5.67 kHz at supply voltages of 19 V, all comparable to otherwise similar devices constructed in conventional ways with standard, nontransient materials. Studies of dissolution kinetics for a-IGZO films in deionized water, bovine serum, and phosphate buffer saline solution provide data of relevance for the potential use of these materials and this technology in temporary biomedical implants.