Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.

Thin film transistor array panel and method for manufacturing the same

Abstract: The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.

Fully Transparent and Rollable Electronics

Abstract: Major obstacles toward the manufacture of transparent and flexible display screens include the difficulty of finding transparent and flexible semiconductors and electrodes, temperature restrictions of flexible plastic substrates, and bulging or warping of the flexible electronics during processing. Here we report the fabrication and performance of fully transparent and rollable thin-film transistor (TFT) circuits for display applications. The TFTs employ an amorphous indium-gallium-zinc oxide semiconductor (with optical band gap of 3.1 eV) and amorphous indium-zinc oxide transparent conductive electrodes, and are built on 15-μm-thick solution-processed colorless polyimide (CPI), resulting in optical transmittance >70% in the visible range. As the CPI supports processing temperatures >300 °C, TFT performance on plastic is similar to that on glass, with typical field-effect mobility, turn-on voltage, and subthreshold voltage swing of 12.7 ± 0.5 cm(2)/V·s, -1.7 ± 0.2 V, and 160 ± 29 mV/dec, respectively. There is no significant degradation after rolling the TFTs 100 times on a cylinder with a radius of 4 mm or when shift registers, each consisting of 40 TFTs, are operated while bent to a radius of 2 mm. For handling purposes, carrier glass is used during fabrication, together with a very thin (∼1 nm) solution-processed carbon nanotube (CNT)/graphene oxide (GO) backbone that is first spin-coated on the glass to decrease adhesion of the CPI to the glass; peel strength of the CPI from glass decreases from 0.43 to 0.10 N/cm, which eases the process of detachment performed after device fabrication. Given that the CNT/GO remains embedded under the CPI after detachment, it minimizes wrinkling and decreases the substrate's tensile elongation from 8.0% to 4.6%. Device performance is also stable under electrostatic discharge exposures up to 10 kV, as electrostatic charge can be released via the conducting CNTs.

LTPS TFT Process on Polyimide Substrate for Flexible AMOLED

Abstract: For conventional active-matrix organic light-emitting diode (AMOLED) flat panel displays, low temperature poly-silicon thin-film transistor (LTPS TFT) on rigid glass substrate process has already been well established. However, this technology cannot be applied directly on polyimide (PI) substrate for flexible display. This is because PI has the different coefficient of thermal expansion (CTE) from the glass, which will result in PI film peeling-off and/or warpage issues under conventional LTPS-TFT process technology. In this paper, a process flow of LTPS TFT on PI substrate for flexible display application was discussed. A flexible display demo system was successfully made by optimizing the LTPS TFT process.

Transistor with silicon and carbon layer in the channel region

Abstract: A transistor and method of manufacturing thereof having stressed material layers formed in the channel to increase the speed and improve performance of the transistor. A layer of silicon and carbon is epitaxially grown in the channel region. A thin semiconductor material may be formed over the layer of silicon and carbon, and a stressed semiconductor layer may be epitaxially grown prior to forming the layer of silicon and carbon.

Solution-deposited organic-inorganic hybrid multilayer gate dielectrics. Design, synthesis, microstructures, and electrical properties with thin-film transistors.

Abstract: We report here on the rational synthesis, processing, and dielectric properties of novel layer-by-layer organic/inorganic hybrid multilayer dielectric films enabled by polarizable π-electron phosphonic acid building blocks and ultrathin ZrO2 layers. These new zirconia-based self-assembled nanodielectric (Zr-SAND) films (5–12 nm thick) are readily fabricated via solution processes under ambient atmosphere. Attractive Zr-SAND properties include amenability to accurate control of film thickness, large-area uniformity, well-defined nanostructure, exceptionally large electrical capacitance (up to 750 nF/cm2), excellent insulating properties (leakage current densities as low as 10–7 A/cm2), and excellent thermal stability. Thin-film transistors (TFTs) fabricated with pentacene and PDIF-CN2 as representative organic semiconductors and zinc–tin–oxide (Zn–Sn–O) as a representative inorganic semiconductor function well at low voltages (<±4.0 V). Furthermore, the TFT performance parameters of representative organic ...