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Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.


Papers
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Proceedings ArticleDOI
02 Dec 2001
TL;DR: In this article, a stable scanning DPSS CW laser lateral crystallization without introduction of thermal damage to 300/spl times/300 mm/sup 2/ glass substrates with process temperature below 450/spl deg/C.
Abstract: We have developed high performance poly-Si TFTs, which have comparable performance to that of [100] Si-MOSFETs, by using a stable scanning DPSS CW laser lateral crystallization without introduction of thermal damage to 300/spl times/300 mm/sup 2/ glass substrates with process temperature below 450/spl deg/C.

102 citations

Journal ArticleDOI
TL;DR: In this article, an inkjet-printed single-droplet of a semiconducting/insulating polymer blend holds substantial promise as a means for implementing direct-write fabrication of organic transistors.
Abstract: Fabrication of organic field-effect transistors (OFETs) using a high-throughput printing process has garnered tremendous interest for realizing low-cost and large-area flexible electronic devices. Printing of organic semiconductors for active layer of transistor is one of the most critical steps for achieving this goal. The charge carrier transport behavior in this layer, dictated by the crystalline microstructure and molecular orientations of the organic semiconductor, determines the transistor performance. Here, it is demonstrated that an inkjet-printed single-droplet of a semiconducting/insulating polymer blend holds substantial promise as a means for implementing direct-write fabrication of organic transistors. Control of the solubility of the semiconducting component in a blend solution can yield an inkjet-printed single-droplet blend film characterized by a semiconductor nanowire network embedded in an insulating polymer matrix. The inkjet-printed blend films having this unique structure provide effective pathways for charge carrier transport through semiconductor nanowires, as well as significantly improve the on-off current ratio and the environmental stability of the printed transistors.

102 citations

Journal ArticleDOI
TL;DR: The nanostructures of P3HT thin film were controlled by changing the solvent vapor pressure in a spin-coating chamber during solidification by improving the field-effect mobilities in poly(3-hexylthiophene) (P3HT) thin film transistors.
Abstract: With the aim of improving the field-effect mobilities in poly(3-hexylthiophene) (P3HT) thin film transistors, we controlled the nanostructures of P3HT thin film by changing the solvent vapor pressure in a spin-coating chamber during solidification. The transistors with P3HT thin films spin-coated under a high solvent vapor pressure (56.5 KPa), showing the one-dimensional nanowire morphologies, resulted in the relatively high field-effect mobilities (0.02 cm2/(V·s)) that are typically more than 1 order of magnitude higher than those prepared under ambient conditions, showing the featureless morphologies. This can be attributed to the higher solvent vapor pressure during film formation, providing the solvent is allowed to evaporate slowly and the degree of ordering within the P3HT crystalline domains is dramatically improved.

102 citations

Patent
30 Sep 2003
TL;DR: In this article, it was shown that it is possible to avoid deterioration in short-channel characteristics caused by a silicon germanium layer coming into contact with the channel of a strained SOI transistor.
Abstract: With the invention, it is possible to avoid deterioration in short-channel characteristics, caused by a silicon germanium layer coming into contact with the channel of a strained SOI transistor. Further, it is possible to fabricate a double-gate type of strained SOI transistor or to implement mixedly mounting the strained SOI transistor and a conventional silicon or SOI transistor on the same wafer. According to the invention, for example, a strained silicon layer is grown on a strain-relaxed silicon germanium layer, and subsequently, portions of the silicon germanium layer are removed, thereby constituting a channel layer in the strained silicon layer.

102 citations

Journal ArticleDOI
TL;DR: In this article, the authors investigated the use of copper oxides for active layer of p-channel field effect transistors (TFTs) in a p-type enhancement mode with an on/off ratio of ∼104 and field effect mobility of 0.4 cm2/V⋅s.
Abstract: We investigated copper oxides for use as an active layer of p-channel field-effect thin-film transistors (TFTs). Cu2O thin films deposited at room temperature using rf magnetron sputtering were transformed to a CuO phase after an annealing treatment in air above 200 °C. The optical bandgaps of the Cu2O and CuO were 2.44 and 1.41 eV, respectively. The bottom gate structured TFTs fabricated using CuO active layers operated in a p-type enhancement mode with an on/off ratio of ∼104 and field-effect mobility of 0.4 cm2/V⋅s.

102 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023341
2022918
2021640
20201,333
20192,015
20182,080