Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.

Electrical Properties of Amorphous Silicon Transistors and MIS‐Devices: Comparative Study of Top Nitride and Bottom Nitride Configurations

Abstract: The electrical properties of silicon nitride/amorphous silicon structures were investigated using thin film transistors (TFTs) and metal insulator semiconductor (MIS) devices employing either a top nitride (TN) or bottom nitride (BN) as gate insulator. The density of states (DOS) deduced from the subthreshold transfer characteristic of the TFTs is one to two orders of magnitude higher than that obtained from quasistatic C(V) measurements on the MIS structures. This difference is discussed by considering the different thickness of the a‐Si:H layers of the two devices and the role of a fixed charge at the rear interface. Both techniques indicate a DOS in BN devices which is only slightly lower than in TN devices, by less than a factor of two. The measured field effect mobility of BN TFTs is about 70% higher. The differences in the measured field effect mobility for TN and BN configuration are discussed and ascribed to the source and drain parasitic resistances. The conclusion is verified by the fabrication of a TN TFT with a pure phosphine rear surface treatment, which exhibits performance comparable to BN TFTs.

High-Performance a-IGZO TFT With $\hbox{ZrO}_{2}$ Gate Dielectric Fabricated at Room Temperature

Abstract: We have investigated the high-performance oxide thin-film transistor (TFT) with an amorphous indium gallium zinc oxide (a-IGZO) channel and ZrO2 gate dielectrics. The a-IGZO TFT is fully fabricated at room temperature without any thermal treatments. ZrO2 is one of the most promising high-k materials. The a-IGZO TFT (channel W/L = 240/30 ?m) with ZrO2 shows high performance such as high on current of 2.11 mA and high field effect mobility of 28 cm2/(V·s) at the gate voltage 10 V. The threshold voltage and the subthreshold swing are 3.2 V and 0.56 V/decade, respectively. Note that the high-performance a-IGZO TFT is higher than ever shown in previous researches.

Potassium ion-sensitive field effect transistor

Abstract: The construction and theory of operation of a potassiumsensitive field effect transistor Is described, and Its performance is characterized both as a solid-state field-effect device and as an electrochemical sensor. The performance of this device is comparable with the correspondlng PVC-type ion selective electrodes. The transistor operates satisfactorliy in the presence of proteins and it has been used for determination of potassium ion concentration in blood serum. A new type of electrochemical sensor, an ion-sensitive field-effect transistor (ISFET), was introduced when Bergveld removed the metal gate from a metal oxide semiconductor field-effect transistor (MOSFET) and exposed the silicon oxide gate insulator to a measured solution (I). A similar approach was followed later by Matsuo and Wise (Z), and this new subject area has been recently reviewed by Zemel (3). In the broader sense of chemically sensitive field-effect transistors, one sensitive to molecular hydrogen has also been reported (4). The ISFET is a result of the integration of two technologies: ion-selective electrodes and solid state microelectronics. This development opens several new possibilities, such as miniaturization, development of multiprobes, all solidstate design and in situ signal processing. Because of its small size, it presents a difficult encapsulation and packaging problem which is, however, amply offset by the elimination of electrical pick-up noise by in situ impedance conversion and on site signal amplification. Bergveld did not modify the ion-sensitive layer in any way although he considered introducing impurities in order to render the device ion selective. In this paper, we introduce a class of devices having a chemically-sensitive layer placed over the gate region, and we report our results with valinomycin/plasticizer/poly(vinylchloride) membrane

Method for forming a thin layer on a semiconductor substrate and apparatus therefor

Abstract: A method and apparatus for manufacturing a semiconductor device having a thin layer of material formed on a semiconductor substrate with a much improved interface between them are disclosed. A silicon substrate is heated up to a temperature around 300° C. in the presence of ozone gas under exposure to UV light. Through this process, organic contaminants that might be present on the surface of the silicon substrate are dissipated by oxidation, and a thin oxide film is formed on the substrate surface on the other. The silicon substrate with the thin oxide film coated thereon is then heated up to temperatures of 200°-700° C. in the presence of HCl gas under illumination to UV light to strip the oxide film off the substrate surface, thereby exposing the cleaned substrate surface. Finally, HCl cleaned surface of the silicon substrate is coated with a thin layer of material such as monocrystalline silicon without exposing the cleaned substrate surface. The method provides a semiconductor with the thin layer of material formed thereon having a well-controlled, well organized interface between them.

Improved organic thin-film transistor performance using novel self-assembled monolayers

Abstract: Pentacene-based organic thin-film transistors have been fabricated using a phosphonate-linked anthracene self-assembled monolayer as a buffer between the silicon dioxide gate dielectric and the active pentacene channel region. Vast improvements in the subthreshold slope and threshold voltage are observed compared to control devices fabricated without the buffer. Both observations are consistent with a greatly reduced density of charge trapping states at the semiconductor-dielectric interface effected by introduction of the self-assembled monolayer.