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Thin-film transistor

About: Thin-film transistor is a research topic. Over the lifetime, 48425 publications have been published within this topic receiving 680879 citations. The topic is also known as: TFT.


Papers
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Journal ArticleDOI
TL;DR: In this paper, the authors improved the operation characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) to a sub-threshold voltage swing (S) of 217 mV (decade)−1, a mobility of ∼11.4 cm2 (Vs) −1, and a threshold voltage (Vth) of 0.1 V by O3 annealing at a temperature as low as 150 °C.
Abstract: Operation characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) were improved to a subthreshold voltage swing (S) of 217 mV (decade)−1, a mobility of ∼11.4 cm2 (Vs)−1, and a threshold voltage (Vth) of 0.1 V by O3 annealing at a temperature as low as 150 °C. However, the O3 annealing at 300 °C caused serious deterioration and exhibited a bistable transition between a large S state and a large Vth state. This transition is attributed to incorporation of excess oxygen and associated subgap defects with a negative-U characteristic. It also explains why a-IGZO channels deposited at high oxygen pressures do not produce operating TFTs.

191 citations

Journal ArticleDOI
TL;DR: The advantages of printed electronics and semiconducting single-walled carbon nanotubes (SWCNTs) are combined for the first time for display electronics and the successful control over external OLED is demonstrated.
Abstract: The advantages of printed electronics and semi- conducting single-walled carbon nanotubes (SWCNTs) are combined for the first time for display electronics. Conductive silver ink and 98% semiconductive SWCNT solutions are used to print back-gated thin film transistors with high mobility, high on/off ratio, and high current carrying capacity. In addition, with printed polyethylenimine with LiClO4 as the gating material, fully printed top-gated devices have been made to work as excellent current switches for organic light emitting diodes (OLEDs). An OLED driving circuit composed of two top-gated fully printed transistors has been fabricated, and the successful control over external OLED is demonstrated. Our work demonstrates the significant potential of using printed carbon nanotube electronics for display backplane applications.

190 citations

Patent
02 Feb 2007
TL;DR: In this article, a pair of low-resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes, and an oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of LRS thin films and extends along the gap defined between the low-Resistance thin films so as to function as a channel.
Abstract: A thin film transistor includes a substrate (1, 11) , and a pair of source/drain electrodes (2, 14) (i.e. , a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films (10, 20) are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer (3, 15) is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.

190 citations

Patent
Hyuk Lim1, Takashi Noguchi1, Jong-man Kim1, Kyung-Bae Park1, Huaxiang Yin1 
07 Nov 2006
TL;DR: In this paper, a thin film transistor with an offset or a lightly doped drain (LDD) structure by self alignment is presented. But this is not the case for all thin-film transistor architectures.
Abstract: A thin film transistor having an offset or a lightly doped drain (LDD) structure by self alignment and a method of fabricating the same comprises a substrate, a silicon layer disposed on the substrate and including a channel region, a source region and a drain region at both sides of the channel region, and offset regions, each offset regions disposed between the channel region and one of the source and drain regions at both sides of the channel region, a gate insulating layer covering the channel region and the offset regions disposed at both sides of the channel region excluding the source and drain regions, and a gate layer formed on the channel region excluding the offset regions. The thin film transistor has the structure in which an offset or LDD is obtained without an additional mask process.

190 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023341
2022918
2021640
20201,333
20192,015
20182,080