Timer

About: Timer is a research topic. Over the lifetime, 33559 publications have been published within this topic receiving 191389 citations.

TIMER: A Web Server for Comprehensive Analysis of Tumor-Infiltrating Immune Cells

Abstract: Recent clinical successes of cancer immunotherapy necessitate the investigation of the interaction between malignant cells and the host immune system. However, elucidation of complex tumor-immune interactions presents major computational and experimental challenges. Here, we present Tumor Immune Estimation Resource (TIMER; cistrome.shinyapps.io/timer) to comprehensively investigate molecular characterization of tumor-immune interactions. Levels of six tumor-infiltrating immune subsets are precalculated for 10,897 tumors from 32 cancer types. TIMER provides 6 major analytic modules that allow users to interactively explore the associations between immune infiltrates and a wide spectrum of factors, including gene expression, clinical outcomes, somatic mutations, and somatic copy number alterations. TIMER provides a user-friendly web interface for dynamic analysis and visualization of these associations, which will be of broad utilities to cancer researchers. Cancer Res; 77(21); e108-10. ©2017 AACR.

First-order incremental block-based statistical timing analysis

Abstract: Variability in digital integrated circuits makes timing verification an extremely challenging task. In this paper, a canonical first order delay model is proposed that takes into account both correlated and independent randomness. A novel linear-time block-based statistical timing algorithm is employed to propagate timing quantities like arrival times and required arrival times through the timing graph in this canonical form. At the end of the statistical timing, the sensitivities of all timing quantities to each of the sources of variation are available. Excessive sensitivities can then be targeted by manual or automatic optimization methods to improve the robustness of the design. This paper also reports the first incremental statistical timer in the literature which is suitable for use in the inner loop of physical synthesis or other optimization programs. The third novel contribution of this paper is the computation of local and global criticality probabilities. For a very small cost in CPU time, the probability of each edge or node of the timing graph being critical is computed. Numerical results are presented on industrial ASIC chips with over two million logic gates.

Time delay switch

Abstract: A time delay switch for use with an electrical load and a source of electrical power, including a multiple-position toggle switch and a user-programmable microchip. The toggle is movable among three positions: an "OFF" position, an "ON" position on one side of the OFF position, and a "TIMER" position on the other side of the OFF position. The toggle is biased from TIMER to OFF so that, whenever it is moved to TIMER, it returns to the central OFF position. When the toggle is moved to TIMER, an electrical signal is sent to the microchip that (1) starts a clock for a preselected period of time and (2) permits electricity to flow through the switch as though the toggle was in the ON position during that time. Alteratively, the microchip can be programmed to start passing current after the preselected period elapses. Thus, the device can be used to turn a light or other electrical load off after a user-determined period of time, or to turn the load on after a preselected time. The duration of the clock interval can be adjusted by means of dip switches or the like, and the duration of the time delay can be adjusted simply by toggling to the TIMER position to program the microchip for as many clock intervals as are desired. A transducer generates an audible or visible signal, or both, in response to movement of the switch to the TIMER position.

Inactivity monitoring for different traffic or service classifications

Abstract: Different types of traffic requiring different inactivity timer settings are assigned to different bearers or to different QoS classes. Different inactivity timer settings are established for different traffic types. Individual bearers or individual QoS classes are linked to a corresponding inactivity timer profile. The link may be accomplished in a number of ways. For example, an additional QoS parameter may be employed in a 3GPP QoS profile, or a new QoS class identifier may be mapped to an inactivity timer setting. Different inactivity timer settings allows both UE battery power conservation to be prioritized for some traffic and end-user experience (quick subsequent response times) to be prioritized for other traffic.

DC fan speed control

Abstract: A simple pulse width modulator speed control for a brushless DC "pancake" type fan motor utilizes a type 555 timer for driving a transistor switch, connected in series between the DC voltage supply and the fan motor, at about a 10 Hz rate. The duty cycle of the pulsed output of the timer is controllable by a variable resistor, which in the preferred embodiment comprises a thermistor for controlling the fan speed as a function of temperature. The fan motor is restarted on each cycle of full voltage amplitude pulses and consequently will start under all operating conditions.