Timing attack

About: Timing attack is a research topic. Over the lifetime, 726 publications have been published within this topic receiving 25462 citations.

Strong stationary times and its use in cryptography

Abstract: This paper presents applicability of Strong Stationary Times (SST) techniques in the area of cryptography. The applicability is in three areas: *) Propositions of a new class of cryptographic algorithms (pseudo-random permutation generators) which do not run for the predefined number of steps. Instead, these algorithms stop according to a stopping rule defined as SST, for which one can obtain provable properties: *** results are perfect samples from uniform distribution, *** immunity to timing attacks (no information about the resulting permutation leaks through the information about the number of steps SST algorithm *) We show how one can leverage properties of SST-based algorithms to construct an implementation (of a symmetric encryption scheme) which is immune to the timing-attack by reusing implementations which are not secure against timing-attacks. In symmetric key cryptography researchers mainly focus on constant time (re)implementations. Our approach goes in a different direction and explores ideas of input masking. *) Analysis of idealized (mathematical) models of existing cryptographic schemes -- i.e., we improve a result by Mironov ((Not So) Random Shuffles of RC4; Advances in Cryptology -- CRYPTO 2002)

Easy verifiable primitives and practical public key cryptosystems

Abstract: At Crypto'99, Fujisaki and Okamoto [8] presented a nice generic transformation from weak asymmetric and symmetric schemes into an IND-CCA hybrid encryption scheme in the Random Oracle Model Two specific candidates for standardization were designed from this transformation: PSEC-2 [14] and EPOC-2 [7], based on El Gamal and Okamoto-Uchiyama primitives, respectively Since then, several cryptanalysis of EPOC have been published, one in the Chosen Ciphertext Attack game, and others making use of a poor implementation that is vulnerable to reject timing attacks The aim of this work is to prevent such attacks from generic transformation by identifying the properties that an asymmetric scheme must have in order to obtain a secure hybrid scheme To achieve this, some ambiguities in the proof of the generic transformation [8] which could lead to false claims are described As a result, the original conversion is modified and the class of asymmetric primitives that can be used is shortened Secondly, the concept of Easy Verifiable Primitive is formalized, showing its connection with Gap problems Using these ideas, a new security proof for the modified transformation is given The good news is that the reduction is tight, improving the concrete security claimed in the original work for the Easy Verifiable Primitives For the rest of primitives, the concrete security is improved at the cost of stronger assumptions Finally, the new conversion's resistance to reject timing attacks is addressed

The Use of Performance-Countersto Perform Side-Channel Attacks

Abstract: Performance and power counters were invented to allow optimizing applications, but they can also be used to expose private information about the system and the user that uses it; thus, they have the potential to become a major privacy threat. This work shows that performance traces, achieved with performance counters, are sufficient for three efficient privacy attacks on a computer. The first attack allows the identification of webpages the user uses with a high success rate of up to 100%. This attack may expose private information about the user, like political views and affiliations. The second attack allows browser version identification. Browsers are updated regularly to protect against known cyber-attacks. An attacker can use this information to choose the best attack method to achieve successful cyber-attacks. The attack is unique since it is the first study to demonstrate the detection of the browser version using a side-channel attack. The third attack allows the recovery of structural elements of Neural Networks, like the number of layers and activation functions being used. This information may assist in preparing adversarial examples against the Neural Network or in creating a similar copy of the Neural Network. To evaluate these attacks, we collected performance traces using Intel Power Gadget software-based performance counter tool. We collect traces of power consumption, utilization percentage, and clock frequency of the Intel CPU and its internal parts like DRAM memory and GPU.

Concealing CAN Message Sequences to Prevent Schedule-based Bus-off Attacks

Abstract: This work focuses on eliminating timing-side channels in real-time safety-critical cyber-physical network protocols like Controller Area Networks (CAN). Automotive Electronic Control Units (ECUs) implement predictable scheduling decisions based on task level response time estimation. Such levels of determinism exposes timing information about task executions and therefore corresponding message transmissions via the network buses (that connect the ECUs and actuators). With proper analysis, such timing side channels can be utilized to launch several schedule-based attacks that can lead to eventual denial-of-service or man-in-the-middle-type attacks. To eliminate this determinism, we propose a novel schedule obfuscation strategy by skipping certain control task executions and related data transmissions along with random shifting of the victim task instance. While doing this, our strategy contemplates the performance of the control task as well by bounding the number of control execution skips. We analytically demonstrate how the attack success probability (ASP) is reduced under this proposed attack-aware skipping and randomization. We also demonstrate the efficacy and real-time applicability of our attack-aware schedule obfuscation strategy Hide-n-Seek by applying it to synthesized automotive task sets in a real-time Hardware-in-loop (HIL) setup.

Timing Attack on Random Forests for Generating Adversarial Examples

Abstract: The threat of implementation attacks to machine learning has become an issue recently. These attacks include side-channel attacks that use information acquired from implemented devices and fault attacks that inject faults into implemented devices using external tools such as lasers. Thus far, these attacks have targeted mainly deep neural networks; however, other popular methods such as random forests can also be targets. In this paper, we investigate the threat of implementation attacks to random forests. Specifically, we propose a novel timing attack that generates adversarial examples, and experimentally evaluate its attack success rate. The proposed attack exploits a fundamental property of random forests: the response time from the input to the output depends on the number of conditional branches invoked during prediction. More precisely, we generate adversarial examples by optimizing the response time. This optimization affects predictions because changes in the response time imply changes in the results of the conditional branches. For the optimization, we use an evolution strategy that tolerates measurement error in the response time. Experiments are conducted in a black-box setting where attackers can use only prediction labels and response times. Experimental results show that the proposed attack generates adversarial examples with higher probability than a state-of-the-art attack that uses only predicted labels. This suggests the attacker motivation for implementation attacks on random forests.